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Sandrine Bailleux01b916b2014-07-17 16:06:39 +01001/*
Dan Handleyf8b0b222015-03-19 19:22:44 +00002 * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved.
Sandrine Bailleux01b916b2014-07-17 16:06:39 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef __PLATFORM_DEF_H__
32#define __PLATFORM_DEF_H__
33
Dan Handleyf8b0b222015-03-19 19:22:44 +000034#include <arm_def.h>
35#include <board_arm_def.h>
36#include <board_css_def.h>
37#include <common_def.h>
38#include <css_def.h>
39#include <soc_css_def.h>
40#include <tzc400.h>
41#include <v2m_def.h>
Sandrine Bailleuxedfda102014-07-17 09:56:29 +010042#include "../juno_def.h"
Sandrine Bailleux01b916b2014-07-17 16:06:39 +010043
Soby Mathew5f3a6032015-05-08 10:18:59 +010044/* Juno supports system power domain */
45#define PLAT_MAX_PWR_LVL ARM_PWR_LVL2
46#define PLAT_NUM_PWR_DOMAINS (ARM_SYSTEM_COUNT + \
47 ARM_CLUSTER_COUNT + \
48 PLATFORM_CORE_COUNT)
Dan Handleyf8b0b222015-03-19 19:22:44 +000049/*
Soby Mathew5f3a6032015-05-08 10:18:59 +010050 * Other platform porting definitions are provided by included headers
Dan Handleyf8b0b222015-03-19 19:22:44 +000051 */
Sandrine Bailleux01b916b2014-07-17 16:06:39 +010052
Dan Handleyf8b0b222015-03-19 19:22:44 +000053/*
54 * Required ARM standard platform porting definitions
55 */
56#define PLAT_ARM_CLUSTER0_CORE_COUNT 2
57#define PLAT_ARM_CLUSTER1_CORE_COUNT 4
Sandrine Bailleux01b916b2014-07-17 16:06:39 +010058
Dan Handleyf8b0b222015-03-19 19:22:44 +000059/* Use the bypass address */
60#define PLAT_ARM_TRUSTED_ROM_BASE V2M_FLASH0_BASE + BL1_ROM_BYPASS_OFFSET
Sandrine Bailleux01b916b2014-07-17 16:06:39 +010061
Dan Handleyf8b0b222015-03-19 19:22:44 +000062/*
63 * Actual ROM size on Juno is 64 KB, but TBB currently requires at least 80 KB
64 * in debug mode. We can test TBB on Juno bypassing the ROM and using 128 KB of
65 * flash
66 */
Juan Castillo01df3c12015-01-07 13:49:59 +000067#if TRUSTED_BOARD_BOOT
Dan Handleyf8b0b222015-03-19 19:22:44 +000068#define PLAT_ARM_TRUSTED_ROM_SIZE 0x00020000
69#else
70#define PLAT_ARM_TRUSTED_ROM_SIZE 0x00010000
Juan Castillo01df3c12015-01-07 13:49:59 +000071#endif /* TRUSTED_BOARD_BOOT */
72
Sandrine Bailleux01b916b2014-07-17 16:06:39 +010073
Dan Handleyf8b0b222015-03-19 19:22:44 +000074/* CCI related constants */
75#define PLAT_ARM_CCI_BASE 0x2c090000
76#define PLAT_ARM_CCI_CLUSTER0_SL_IFACE_IX 4
77#define PLAT_ARM_CCI_CLUSTER1_SL_IFACE_IX 3
78
79/* TZC related constants */
80#define PLAT_ARM_TZC_NS_DEV_ACCESS ( \
81 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_CCI400) | \
82 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_PCIE) | \
83 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_HDLCD0) | \
84 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_HDLCD1) | \
85 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_USB) | \
86 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_DMA330) | \
87 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_THINLINKS) | \
88 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_AP) | \
89 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_GPU) | \
90 TZC_REGION_ACCESS_RDWR(TZC400_NSAID_CORESIGHT))
Juan Castillo1217d282014-11-07 09:44:58 +000091
92/*
Dan Handleyf8b0b222015-03-19 19:22:44 +000093 * Required ARM CSS based platform porting definitions
Juan Castillo1217d282014-11-07 09:44:58 +000094 */
Sandrine Bailleux01b916b2014-07-17 16:06:39 +010095
Dan Handleyf8b0b222015-03-19 19:22:44 +000096/* GIC related constants (no GICR in GIC-400) */
97#define PLAT_CSS_GICD_BASE 0x2c010000
98#define PLAT_CSS_GICR_BASE 0x0
99#define PLAT_CSS_GICC_BASE 0x2c02f000
100#define PLAT_CSS_GICH_BASE 0x2c04f000
101#define PLAT_CSS_GICV_BASE 0x2c06f000
102
Vikram Kanigiria7270d32015-06-24 17:51:09 +0100103#define PLAT_CSS_IRQ_SEC_LIST CSS_IRQ_MHU, \
104 CSS_IRQ_GPU_SMMU_0, \
105 CSS_IRQ_TZC, \
106 CSS_IRQ_TZ_WDOG, \
107 CSS_IRQ_SEC_SYS_TIMER, \
108 JUNO_IRQ_DMA_SMMU, \
109 JUNO_IRQ_HDLCD0_SMMU, \
110 JUNO_IRQ_HDLCD1_SMMU, \
111 JUNO_IRQ_USB_SMMU, \
112 JUNO_IRQ_THIN_LINKS_SMMU, \
113 JUNO_IRQ_SEC_I2C, \
114 JUNO_IRQ_GPU_SMMU_1, \
115 JUNO_IRQ_ETR_SMMU
Dan Handleyf8b0b222015-03-19 19:22:44 +0000116
Juan Castillo1217d282014-11-07 09:44:58 +0000117/*
Dan Handleyf8b0b222015-03-19 19:22:44 +0000118 * Required ARM CSS SoC based platform porting definitions
Juan Castillo1217d282014-11-07 09:44:58 +0000119 */
Sandrine Bailleux01b916b2014-07-17 16:06:39 +0100120
Dan Handleyf8b0b222015-03-19 19:22:44 +0000121/* CSS SoC NIC-400 Global Programmers View (GPV) */
122#define PLAT_SOC_CSS_NIC400_BASE 0x2a000000
Sandrine Bailleux01b916b2014-07-17 16:06:39 +0100123
Soby Mathew8c5fe0b2015-01-08 18:02:19 +0000124
Sandrine Bailleux01b916b2014-07-17 16:06:39 +0100125#endif /* __PLATFORM_DEF_H__ */