Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 1 | /* |
Dan Handley | e83b0ca | 2014-01-14 18:17:09 +0000 | [diff] [blame] | 2 | * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #include <stdio.h> |
| 32 | #include <string.h> |
| 33 | #include <assert.h> |
| 34 | #include <arch_helpers.h> |
| 35 | #include <console.h> |
| 36 | #include <platform.h> |
| 37 | #include <psci.h> |
| 38 | #include <psci_private.h> |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 39 | #include <context_mgmt.h> |
Achin Gupta | c8afc78 | 2013-11-25 18:45:02 +0000 | [diff] [blame] | 40 | #include <runtime_svc.h> |
James Morrissey | 40a6f64 | 2014-02-10 14:24:36 +0000 | [diff] [blame] | 41 | #include "debug.h" |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 42 | |
Achin Gupta | 607084e | 2014-02-09 18:24:19 +0000 | [diff] [blame] | 43 | /* |
Jeenu Viswambharan | 7f36660 | 2014-02-20 17:11:00 +0000 | [diff] [blame] | 44 | * SPD power management operations, expected to be supplied by the registered |
| 45 | * SPD on successful SP initialization |
Achin Gupta | 607084e | 2014-02-09 18:24:19 +0000 | [diff] [blame] | 46 | */ |
Jeenu Viswambharan | 7f36660 | 2014-02-20 17:11:00 +0000 | [diff] [blame] | 47 | const spd_pm_ops *psci_spd_pm; |
Achin Gupta | 607084e | 2014-02-09 18:24:19 +0000 | [diff] [blame] | 48 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 49 | /******************************************************************************* |
| 50 | * Arrays that contains information needs to resume a cpu's execution when woken |
| 51 | * out of suspend or off states. 'psci_ns_einfo_idx' keeps track of the next |
Achin Gupta | a59caa4 | 2013-12-05 14:21:04 +0000 | [diff] [blame] | 52 | * free index in the 'psci_ns_entry_info' & 'psci_suspend_context' arrays. Each |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 53 | * cpu is allocated a single entry in each array during startup. |
| 54 | ******************************************************************************/ |
Achin Gupta | a59caa4 | 2013-12-05 14:21:04 +0000 | [diff] [blame] | 55 | suspend_context psci_suspend_context[PSCI_NUM_AFFS]; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 56 | ns_entry_info psci_ns_entry_info[PSCI_NUM_AFFS]; |
| 57 | unsigned int psci_ns_einfo_idx; |
| 58 | |
| 59 | /******************************************************************************* |
| 60 | * Grand array that holds the platform's topology information for state |
| 61 | * management of affinity instances. Each node (aff_map_node) in the array |
| 62 | * corresponds to an affinity instance e.g. cluster, cpu within an mpidr |
| 63 | ******************************************************************************/ |
| 64 | aff_map_node psci_aff_map[PSCI_NUM_AFFS] |
| 65 | __attribute__ ((section("tzfw_coherent_mem"))); |
| 66 | |
| 67 | /******************************************************************************* |
| 68 | * In a system, a certain number of affinity instances are present at an |
| 69 | * affinity level. The cumulative number of instances across all levels are |
| 70 | * stored in 'psci_aff_map'. The topology tree has been flattenned into this |
| 71 | * array. To retrieve nodes, information about the extents of each affinity |
| 72 | * level i.e. start index and end index needs to be present. 'psci_aff_limits' |
| 73 | * stores this information. |
| 74 | ******************************************************************************/ |
| 75 | aff_limits_node psci_aff_limits[MPIDR_MAX_AFFLVL + 1]; |
| 76 | |
| 77 | /******************************************************************************* |
| 78 | * Pointer to functions exported by the platform to complete power mgmt. ops |
| 79 | ******************************************************************************/ |
| 80 | plat_pm_ops *psci_plat_pm_ops; |
| 81 | |
| 82 | /******************************************************************************* |
Achin Gupta | a45e397 | 2013-12-05 15:10:48 +0000 | [diff] [blame] | 83 | * Routine to return the maximum affinity level to traverse to after a cpu has |
| 84 | * been physically powered up. It is expected to be called immediately after |
| 85 | * reset from assembler code. It has to find its 'aff_map_node' instead of |
| 86 | * getting it as an argument. |
| 87 | * TODO: Calling psci_get_aff_map_node() with the MMU disabled is slow. Add |
| 88 | * support to allow faster access to the target affinity level. |
| 89 | ******************************************************************************/ |
| 90 | int get_power_on_target_afflvl(unsigned long mpidr) |
| 91 | { |
| 92 | aff_map_node *node; |
| 93 | unsigned int state; |
Vikram Kanigiri | 759ec93 | 2014-04-01 19:26:26 +0100 | [diff] [blame^] | 94 | int afflvl; |
Achin Gupta | a45e397 | 2013-12-05 15:10:48 +0000 | [diff] [blame] | 95 | |
| 96 | /* Retrieve our node from the topology tree */ |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 97 | node = psci_get_aff_map_node(mpidr & MPIDR_AFFINITY_MASK, |
| 98 | MPIDR_AFFLVL0); |
Achin Gupta | a45e397 | 2013-12-05 15:10:48 +0000 | [diff] [blame] | 99 | assert(node); |
| 100 | |
| 101 | /* |
| 102 | * Return the maximum supported affinity level if this cpu was off. |
| 103 | * Call the handler in the suspend code if this cpu had been suspended. |
| 104 | * Any other state is invalid. |
| 105 | */ |
Achin Gupta | 75f7367 | 2013-12-05 16:33:10 +0000 | [diff] [blame] | 106 | state = psci_get_state(node); |
Achin Gupta | a45e397 | 2013-12-05 15:10:48 +0000 | [diff] [blame] | 107 | if (state == PSCI_STATE_ON_PENDING) |
| 108 | return get_max_afflvl(); |
| 109 | |
Vikram Kanigiri | 759ec93 | 2014-04-01 19:26:26 +0100 | [diff] [blame^] | 110 | if (state == PSCI_STATE_SUSPEND) { |
| 111 | afflvl = psci_get_aff_map_node_suspend_afflvl(node); |
| 112 | assert(afflvl != PSCI_INVALID_DATA); |
| 113 | return afflvl; |
| 114 | } |
Achin Gupta | a45e397 | 2013-12-05 15:10:48 +0000 | [diff] [blame] | 115 | return PSCI_E_INVALID_PARAMS; |
| 116 | } |
| 117 | |
| 118 | /******************************************************************************* |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 119 | * Simple routine to retrieve the maximum affinity level supported by the |
| 120 | * platform and check that it makes sense. |
| 121 | ******************************************************************************/ |
| 122 | int get_max_afflvl() |
| 123 | { |
| 124 | int aff_lvl; |
| 125 | |
| 126 | aff_lvl = plat_get_max_afflvl(); |
| 127 | assert(aff_lvl <= MPIDR_MAX_AFFLVL && aff_lvl >= MPIDR_AFFLVL0); |
| 128 | |
| 129 | return aff_lvl; |
| 130 | } |
| 131 | |
| 132 | /******************************************************************************* |
| 133 | * Simple routine to set the id of an affinity instance at a given level in the |
| 134 | * mpidr. |
| 135 | ******************************************************************************/ |
| 136 | unsigned long mpidr_set_aff_inst(unsigned long mpidr, |
| 137 | unsigned char aff_inst, |
| 138 | int aff_lvl) |
| 139 | { |
| 140 | unsigned long aff_shift; |
| 141 | |
| 142 | assert(aff_lvl <= MPIDR_AFFLVL3); |
| 143 | |
| 144 | /* |
| 145 | * Decide the number of bits to shift by depending upon |
| 146 | * the affinity level |
| 147 | */ |
| 148 | aff_shift = get_afflvl_shift(aff_lvl); |
| 149 | |
| 150 | /* Clear the existing affinity instance & set the new one*/ |
| 151 | mpidr &= ~(MPIDR_AFFLVL_MASK << aff_shift); |
| 152 | mpidr |= aff_inst << aff_shift; |
| 153 | |
| 154 | return mpidr; |
| 155 | } |
| 156 | |
| 157 | /******************************************************************************* |
Achin Gupta | 0959db5 | 2013-12-02 17:33:04 +0000 | [diff] [blame] | 158 | * This function sanity checks a range of affinity levels. |
| 159 | ******************************************************************************/ |
| 160 | int psci_check_afflvl_range(int start_afflvl, int end_afflvl) |
| 161 | { |
| 162 | /* Sanity check the parameters passed */ |
| 163 | if (end_afflvl > MPIDR_MAX_AFFLVL) |
| 164 | return PSCI_E_INVALID_PARAMS; |
| 165 | |
| 166 | if (start_afflvl < MPIDR_AFFLVL0) |
| 167 | return PSCI_E_INVALID_PARAMS; |
| 168 | |
| 169 | if (end_afflvl < start_afflvl) |
| 170 | return PSCI_E_INVALID_PARAMS; |
| 171 | |
| 172 | return PSCI_E_SUCCESS; |
| 173 | } |
| 174 | |
| 175 | /******************************************************************************* |
| 176 | * This function is passed an array of pointers to affinity level nodes in the |
| 177 | * topology tree for an mpidr. It picks up locks for each affinity level bottom |
| 178 | * up in the range specified. |
| 179 | ******************************************************************************/ |
| 180 | void psci_acquire_afflvl_locks(unsigned long mpidr, |
| 181 | int start_afflvl, |
| 182 | int end_afflvl, |
| 183 | mpidr_aff_map_nodes mpidr_nodes) |
| 184 | { |
| 185 | int level; |
| 186 | |
| 187 | for (level = start_afflvl; level <= end_afflvl; level++) { |
| 188 | if (mpidr_nodes[level] == NULL) |
| 189 | continue; |
| 190 | bakery_lock_get(mpidr, &mpidr_nodes[level]->lock); |
| 191 | } |
| 192 | } |
| 193 | |
| 194 | /******************************************************************************* |
| 195 | * This function is passed an array of pointers to affinity level nodes in the |
| 196 | * topology tree for an mpidr. It releases the lock for each affinity level top |
| 197 | * down in the range specified. |
| 198 | ******************************************************************************/ |
| 199 | void psci_release_afflvl_locks(unsigned long mpidr, |
| 200 | int start_afflvl, |
| 201 | int end_afflvl, |
| 202 | mpidr_aff_map_nodes mpidr_nodes) |
| 203 | { |
| 204 | int level; |
| 205 | |
| 206 | for (level = end_afflvl; level >= start_afflvl; level--) { |
| 207 | if (mpidr_nodes[level] == NULL) |
| 208 | continue; |
| 209 | bakery_lock_release(mpidr, &mpidr_nodes[level]->lock); |
| 210 | } |
| 211 | } |
| 212 | |
| 213 | /******************************************************************************* |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 214 | * Simple routine to determine whether an affinity instance at a given level |
| 215 | * in an mpidr exists or not. |
| 216 | ******************************************************************************/ |
| 217 | int psci_validate_mpidr(unsigned long mpidr, int level) |
| 218 | { |
| 219 | aff_map_node *node; |
| 220 | |
| 221 | node = psci_get_aff_map_node(mpidr, level); |
| 222 | if (node && (node->state & PSCI_AFF_PRESENT)) |
| 223 | return PSCI_E_SUCCESS; |
| 224 | else |
| 225 | return PSCI_E_INVALID_PARAMS; |
| 226 | } |
| 227 | |
| 228 | /******************************************************************************* |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 229 | * This function retrieves all the stashed information needed to correctly |
| 230 | * resume a cpu's execution in the non-secure state after it has been physically |
| 231 | * powered on i.e. turned ON or resumed from SUSPEND |
| 232 | ******************************************************************************/ |
Achin Gupta | c8afc78 | 2013-11-25 18:45:02 +0000 | [diff] [blame] | 233 | void psci_get_ns_entry_info(unsigned int index) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 234 | { |
| 235 | unsigned long sctlr = 0, scr, el_status, id_aa64pfr0; |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 236 | uint64_t mpidr = read_mpidr(); |
| 237 | cpu_context *ns_entry_context; |
| 238 | gp_regs *ns_entry_gpregs; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 239 | |
| 240 | scr = read_scr(); |
| 241 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 242 | /* Find out which EL we are going to */ |
| 243 | id_aa64pfr0 = read_id_aa64pfr0_el1(); |
| 244 | el_status = (id_aa64pfr0 >> ID_AA64PFR0_EL2_SHIFT) & |
| 245 | ID_AA64PFR0_ELX_MASK; |
| 246 | |
| 247 | /* Restore endianess */ |
| 248 | if (psci_ns_entry_info[index].sctlr & SCTLR_EE_BIT) |
| 249 | sctlr |= SCTLR_EE_BIT; |
| 250 | else |
| 251 | sctlr &= ~SCTLR_EE_BIT; |
| 252 | |
| 253 | /* Turn off MMU and Caching */ |
| 254 | sctlr &= ~(SCTLR_M_BIT | SCTLR_C_BIT | SCTLR_M_BIT); |
| 255 | |
| 256 | /* Set the register width */ |
| 257 | if (psci_ns_entry_info[index].scr & SCR_RW_BIT) |
| 258 | scr |= SCR_RW_BIT; |
| 259 | else |
| 260 | scr &= ~SCR_RW_BIT; |
| 261 | |
| 262 | scr |= SCR_NS_BIT; |
| 263 | |
| 264 | if (el_status) |
| 265 | write_sctlr_el2(sctlr); |
| 266 | else |
| 267 | write_sctlr_el1(sctlr); |
| 268 | |
| 269 | /* Fulfill the cpu_on entry reqs. as per the psci spec */ |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 270 | ns_entry_context = (cpu_context *) cm_get_context(mpidr, NON_SECURE); |
| 271 | assert(ns_entry_context); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 272 | |
Achin Gupta | c8afc78 | 2013-11-25 18:45:02 +0000 | [diff] [blame] | 273 | /* |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 274 | * Setup general purpose registers to return the context id and |
| 275 | * prevent leakage of secure information into the normal world. |
Achin Gupta | c8afc78 | 2013-11-25 18:45:02 +0000 | [diff] [blame] | 276 | */ |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 277 | ns_entry_gpregs = get_gpregs_ctx(ns_entry_context); |
| 278 | write_ctx_reg(ns_entry_gpregs, |
| 279 | CTX_GPREG_X0, |
| 280 | psci_ns_entry_info[index].context_id); |
| 281 | |
| 282 | /* |
| 283 | * Tell the context management library to setup EL3 system registers to |
| 284 | * be able to ERET into the ns state, and SP_EL3 points to the right |
| 285 | * context to exit from EL3 correctly. |
| 286 | */ |
| 287 | cm_set_el3_eret_context(NON_SECURE, |
| 288 | psci_ns_entry_info[index].eret_info.entrypoint, |
| 289 | psci_ns_entry_info[index].eret_info.spsr, |
| 290 | scr); |
| 291 | |
| 292 | cm_set_next_eret_context(NON_SECURE); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 293 | } |
| 294 | |
| 295 | /******************************************************************************* |
| 296 | * This function retrieves and stashes all the information needed to correctly |
| 297 | * resume a cpu's execution in the non-secure state after it has been physically |
| 298 | * powered on i.e. turned ON or resumed from SUSPEND. This is done prior to |
| 299 | * turning it on or before suspending it. |
| 300 | ******************************************************************************/ |
| 301 | int psci_set_ns_entry_info(unsigned int index, |
| 302 | unsigned long entrypoint, |
| 303 | unsigned long context_id) |
| 304 | { |
| 305 | int rc = PSCI_E_SUCCESS; |
| 306 | unsigned int rw, mode, ee, spsr = 0; |
| 307 | unsigned long id_aa64pfr0 = read_id_aa64pfr0_el1(), scr = read_scr(); |
| 308 | unsigned long el_status; |
| 309 | |
| 310 | /* Figure out what mode do we enter the non-secure world in */ |
| 311 | el_status = (id_aa64pfr0 >> ID_AA64PFR0_EL2_SHIFT) & |
| 312 | ID_AA64PFR0_ELX_MASK; |
| 313 | |
| 314 | /* |
| 315 | * Figure out whether the cpu enters the non-secure address space |
| 316 | * in aarch32 or aarch64 |
| 317 | */ |
| 318 | rw = scr & SCR_RW_BIT; |
| 319 | if (rw) { |
| 320 | |
| 321 | /* |
| 322 | * Check whether a Thumb entry point has been provided for an |
| 323 | * aarch64 EL |
| 324 | */ |
| 325 | if (entrypoint & 0x1) |
| 326 | return PSCI_E_INVALID_PARAMS; |
| 327 | |
| 328 | if (el_status && (scr & SCR_HCE_BIT)) { |
| 329 | mode = MODE_EL2; |
| 330 | ee = read_sctlr_el2() & SCTLR_EE_BIT; |
| 331 | } else { |
| 332 | mode = MODE_EL1; |
| 333 | ee = read_sctlr_el1() & SCTLR_EE_BIT; |
| 334 | } |
| 335 | |
| 336 | spsr = DAIF_DBG_BIT | DAIF_ABT_BIT; |
| 337 | spsr |= DAIF_IRQ_BIT | DAIF_FIQ_BIT; |
| 338 | spsr <<= PSR_DAIF_SHIFT; |
| 339 | spsr |= make_spsr(mode, MODE_SP_ELX, !rw); |
| 340 | |
| 341 | psci_ns_entry_info[index].sctlr |= ee; |
| 342 | psci_ns_entry_info[index].scr |= SCR_RW_BIT; |
| 343 | } else { |
| 344 | |
| 345 | /* Check whether aarch32 has to be entered in Thumb mode */ |
| 346 | if (entrypoint & 0x1) |
| 347 | spsr = SPSR32_T_BIT; |
| 348 | |
| 349 | if (el_status && (scr & SCR_HCE_BIT)) { |
| 350 | mode = AARCH32_MODE_HYP; |
| 351 | ee = read_sctlr_el2() & SCTLR_EE_BIT; |
| 352 | } else { |
| 353 | mode = AARCH32_MODE_SVC; |
| 354 | ee = read_sctlr_el1() & SCTLR_EE_BIT; |
| 355 | } |
| 356 | |
| 357 | /* |
| 358 | * TODO: Choose async. exception bits if HYP mode is not |
| 359 | * implemented according to the values of SCR.{AW, FW} bits |
| 360 | */ |
| 361 | spsr |= DAIF_ABT_BIT | DAIF_IRQ_BIT | DAIF_FIQ_BIT; |
| 362 | spsr <<= PSR_DAIF_SHIFT; |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 363 | if (ee) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 364 | spsr |= SPSR32_EE_BIT; |
| 365 | spsr |= mode; |
| 366 | |
| 367 | /* Ensure that the CSPR.E and SCTLR.EE bits match */ |
| 368 | psci_ns_entry_info[index].sctlr |= ee; |
| 369 | psci_ns_entry_info[index].scr &= ~SCR_RW_BIT; |
| 370 | } |
| 371 | |
| 372 | psci_ns_entry_info[index].eret_info.entrypoint = entrypoint; |
| 373 | psci_ns_entry_info[index].eret_info.spsr = spsr; |
| 374 | psci_ns_entry_info[index].context_id = context_id; |
| 375 | |
| 376 | return rc; |
| 377 | } |
| 378 | |
| 379 | /******************************************************************************* |
Achin Gupta | 75f7367 | 2013-12-05 16:33:10 +0000 | [diff] [blame] | 380 | * This function takes a pointer to an affinity node in the topology tree and |
| 381 | * returns its state. State of a non-leaf node needs to be calculated. |
| 382 | ******************************************************************************/ |
| 383 | unsigned short psci_get_state(aff_map_node *node) |
| 384 | { |
| 385 | assert(node->level >= MPIDR_AFFLVL0 && node->level <= MPIDR_MAX_AFFLVL); |
| 386 | |
| 387 | /* A cpu node just contains the state which can be directly returned */ |
| 388 | if (node->level == MPIDR_AFFLVL0) |
| 389 | return (node->state >> PSCI_STATE_SHIFT) & PSCI_STATE_MASK; |
| 390 | |
| 391 | /* |
| 392 | * For an affinity level higher than a cpu, the state has to be |
| 393 | * calculated. It depends upon the value of the reference count |
| 394 | * which is managed by each node at the next lower affinity level |
| 395 | * e.g. for a cluster, each cpu increments/decrements the reference |
| 396 | * count. If the reference count is 0 then the affinity level is |
| 397 | * OFF else ON. |
| 398 | */ |
| 399 | if (node->ref_count) |
| 400 | return PSCI_STATE_ON; |
| 401 | else |
| 402 | return PSCI_STATE_OFF; |
| 403 | } |
| 404 | |
| 405 | /******************************************************************************* |
| 406 | * This function takes a pointer to an affinity node in the topology tree and |
| 407 | * a target state. State of a non-leaf node needs to be converted to a reference |
| 408 | * count. State of a leaf node can be set directly. |
| 409 | ******************************************************************************/ |
| 410 | void psci_set_state(aff_map_node *node, unsigned short state) |
| 411 | { |
| 412 | assert(node->level >= MPIDR_AFFLVL0 && node->level <= MPIDR_MAX_AFFLVL); |
| 413 | |
| 414 | /* |
| 415 | * For an affinity level higher than a cpu, the state is used |
| 416 | * to decide whether the reference count is incremented or |
| 417 | * decremented. Entry into the ON_PENDING state does not have |
| 418 | * effect. |
| 419 | */ |
| 420 | if (node->level > MPIDR_AFFLVL0) { |
| 421 | switch (state) { |
| 422 | case PSCI_STATE_ON: |
| 423 | node->ref_count++; |
| 424 | break; |
| 425 | case PSCI_STATE_OFF: |
| 426 | case PSCI_STATE_SUSPEND: |
| 427 | node->ref_count--; |
| 428 | break; |
| 429 | case PSCI_STATE_ON_PENDING: |
| 430 | /* |
| 431 | * An affinity level higher than a cpu will not undergo |
| 432 | * a state change when it is about to be turned on |
| 433 | */ |
| 434 | return; |
| 435 | default: |
| 436 | assert(0); |
| 437 | } |
| 438 | } else { |
| 439 | node->state &= ~(PSCI_STATE_MASK << PSCI_STATE_SHIFT); |
| 440 | node->state |= (state & PSCI_STATE_MASK) << PSCI_STATE_SHIFT; |
| 441 | } |
| 442 | } |
| 443 | |
| 444 | /******************************************************************************* |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 445 | * An affinity level could be on, on_pending, suspended or off. These are the |
Achin Gupta | 3140a9e | 2013-12-02 16:23:12 +0000 | [diff] [blame] | 446 | * logical states it can be in. Physically either it is off or on. When it is in |
| 447 | * the state on_pending then it is about to be turned on. It is not possible to |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 448 | * tell whether that's actually happenned or not. So we err on the side of |
| 449 | * caution & treat the affinity level as being turned off. |
| 450 | ******************************************************************************/ |
Achin Gupta | 75f7367 | 2013-12-05 16:33:10 +0000 | [diff] [blame] | 451 | unsigned short psci_get_phys_state(aff_map_node *node) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 452 | { |
Achin Gupta | 75f7367 | 2013-12-05 16:33:10 +0000 | [diff] [blame] | 453 | unsigned int state; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 454 | |
Achin Gupta | 75f7367 | 2013-12-05 16:33:10 +0000 | [diff] [blame] | 455 | state = psci_get_state(node); |
| 456 | return get_phys_state(state); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 457 | } |
| 458 | |
| 459 | /******************************************************************************* |
Achin Gupta | 0959db5 | 2013-12-02 17:33:04 +0000 | [diff] [blame] | 460 | * This function takes an array of pointers to affinity instance nodes in the |
| 461 | * topology tree and calls the physical power on handler for the corresponding |
| 462 | * affinity levels |
| 463 | ******************************************************************************/ |
| 464 | static int psci_call_power_on_handlers(mpidr_aff_map_nodes mpidr_nodes, |
| 465 | int start_afflvl, |
| 466 | int end_afflvl, |
| 467 | afflvl_power_on_finisher *pon_handlers, |
| 468 | unsigned long mpidr) |
| 469 | { |
| 470 | int rc = PSCI_E_INVALID_PARAMS, level; |
| 471 | aff_map_node *node; |
| 472 | |
| 473 | for (level = end_afflvl; level >= start_afflvl; level--) { |
| 474 | node = mpidr_nodes[level]; |
| 475 | if (node == NULL) |
| 476 | continue; |
| 477 | |
| 478 | /* |
| 479 | * If we run into any trouble while powering up an |
| 480 | * affinity instance, then there is no recovery path |
| 481 | * so simply return an error and let the caller take |
| 482 | * care of the situation. |
| 483 | */ |
| 484 | rc = pon_handlers[level](mpidr, node); |
| 485 | if (rc != PSCI_E_SUCCESS) |
| 486 | break; |
| 487 | } |
| 488 | |
| 489 | return rc; |
| 490 | } |
| 491 | |
| 492 | /******************************************************************************* |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 493 | * Generic handler which is called when a cpu is physically powered on. It |
Achin Gupta | 0959db5 | 2013-12-02 17:33:04 +0000 | [diff] [blame] | 494 | * traverses through all the affinity levels performing generic, architectural, |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 495 | * platform setup and state management e.g. for a cluster that's been powered |
| 496 | * on, it will call the platform specific code which will enable coherency at |
| 497 | * the interconnect level. For a cpu it could mean turning on the MMU etc. |
| 498 | * |
Achin Gupta | 0959db5 | 2013-12-02 17:33:04 +0000 | [diff] [blame] | 499 | * The state of all the relevant affinity levels is changed after calling the |
| 500 | * affinity level specific handlers as their actions would depend upon the state |
| 501 | * the affinity level is exiting from. |
| 502 | * |
| 503 | * The affinity level specific handlers are called in descending order i.e. from |
| 504 | * the highest to the lowest affinity level implemented by the platform because |
| 505 | * to turn on affinity level X it is neccesary to turn on affinity level X + 1 |
| 506 | * first. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 507 | * |
| 508 | * CAUTION: This function is called with coherent stacks so that coherency and |
| 509 | * the mmu can be turned on safely. |
| 510 | ******************************************************************************/ |
Achin Gupta | 0959db5 | 2013-12-02 17:33:04 +0000 | [diff] [blame] | 511 | void psci_afflvl_power_on_finish(unsigned long mpidr, |
| 512 | int start_afflvl, |
| 513 | int end_afflvl, |
| 514 | afflvl_power_on_finisher *pon_handlers) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 515 | { |
Achin Gupta | 0959db5 | 2013-12-02 17:33:04 +0000 | [diff] [blame] | 516 | mpidr_aff_map_nodes mpidr_nodes; |
| 517 | int rc; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 518 | |
Jeenu Viswambharan | caa8493 | 2014-02-06 10:36:15 +0000 | [diff] [blame] | 519 | mpidr &= MPIDR_AFFINITY_MASK; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 520 | |
| 521 | /* |
Achin Gupta | 0959db5 | 2013-12-02 17:33:04 +0000 | [diff] [blame] | 522 | * Collect the pointers to the nodes in the topology tree for |
| 523 | * each affinity instance in the mpidr. If this function does |
| 524 | * not return successfully then either the mpidr or the affinity |
| 525 | * levels are incorrect. Either case is an irrecoverable error. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 526 | */ |
Achin Gupta | 0959db5 | 2013-12-02 17:33:04 +0000 | [diff] [blame] | 527 | rc = psci_get_aff_map_nodes(mpidr, |
| 528 | start_afflvl, |
| 529 | end_afflvl, |
| 530 | mpidr_nodes); |
James Morrissey | 40a6f64 | 2014-02-10 14:24:36 +0000 | [diff] [blame] | 531 | if (rc != PSCI_E_SUCCESS) |
| 532 | panic(); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 533 | |
| 534 | /* |
Achin Gupta | 0959db5 | 2013-12-02 17:33:04 +0000 | [diff] [blame] | 535 | * This function acquires the lock corresponding to each affinity |
| 536 | * level so that by the time all locks are taken, the system topology |
| 537 | * is snapshot and state management can be done safely. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 538 | */ |
Achin Gupta | 0959db5 | 2013-12-02 17:33:04 +0000 | [diff] [blame] | 539 | psci_acquire_afflvl_locks(mpidr, |
| 540 | start_afflvl, |
| 541 | end_afflvl, |
| 542 | mpidr_nodes); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 543 | |
| 544 | /* Perform generic, architecture and platform specific handling */ |
Achin Gupta | 0959db5 | 2013-12-02 17:33:04 +0000 | [diff] [blame] | 545 | rc = psci_call_power_on_handlers(mpidr_nodes, |
| 546 | start_afflvl, |
| 547 | end_afflvl, |
| 548 | pon_handlers, |
| 549 | mpidr); |
James Morrissey | 40a6f64 | 2014-02-10 14:24:36 +0000 | [diff] [blame] | 550 | if (rc != PSCI_E_SUCCESS) |
| 551 | panic(); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 552 | |
| 553 | /* |
Achin Gupta | 0959db5 | 2013-12-02 17:33:04 +0000 | [diff] [blame] | 554 | * This loop releases the lock corresponding to each affinity level |
| 555 | * in the reverse order to which they were acquired. |
| 556 | */ |
| 557 | psci_release_afflvl_locks(mpidr, |
| 558 | start_afflvl, |
| 559 | end_afflvl, |
| 560 | mpidr_nodes); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 561 | } |
Jeenu Viswambharan | 7f36660 | 2014-02-20 17:11:00 +0000 | [diff] [blame] | 562 | |
| 563 | /******************************************************************************* |
| 564 | * This function initializes the set of hooks that PSCI invokes as part of power |
| 565 | * management operation. The power management hooks are expected to be provided |
| 566 | * by the SPD, after it finishes all its initialization |
| 567 | ******************************************************************************/ |
| 568 | void psci_register_spd_pm_hook(const spd_pm_ops *pm) |
| 569 | { |
| 570 | psci_spd_pm = pm; |
| 571 | } |