- e282245 xlat_tables_v2: use ARRAY_SIZE in REGISTER_XLAT_CONTEXT_FULL_SPEC by Masahiro Yamada · 4 years, 7 months ago
- 363830d xlat_tables_v2: merge REGISTER_XLAT_CONTEXT_{FULL_SPEC,RO_BASE_TABLE} by Masahiro Yamada · 4 years, 7 months ago
- 2825946 SPMD: Adds partially supported EL2 registers. by Max Shvetsov · 4 years, 7 months ago
- 28f39f0 SPMD: save/restore EL2 system registers. by Max Shvetsov · 4 years, 7 months ago
- 562abec Merge "fconf: Fix misra issues" into integration by Sandrine Bailleux · 4 years, 7 months ago
- 845db72 fconf: Fix misra issues by Louis Mayencourt · 4 years, 7 months ago
- 60e8f3c Read-only xlat tables for BL31 memory by Petre-Ionut Tudor · 4 years, 11 months ago
- 2f39c55 Merge "Add Matterhorn CPU lib" into integration by joanna.farley · 4 years, 7 months ago
- e571211 Merge "Add CPULib for Klein Core" into integration by joanna.farley · 4 years, 7 months ago
- d4b2910 include: move MHZ_TICKS_PER_SEC to utils_def.h by Varun Wadekar · 4 years, 7 months ago
- cd0ea18 cpus: higher performance non-cacheable load forwarding by Varun Wadekar · 6 years ago
- 2fe75a2 coverity: fix MISRA violations by Zelalem · 4 years, 7 months ago
- da3b47e Add Matterhorn CPU lib by Jimmy Brisson · 4 years, 9 months ago
- f474472 Add CPULib for Klein Core by Jimmy Brisson · 4 years, 10 months ago
- 6c97231 fconf: Add mbedtls shared heap as property by Louis Mayencourt · 5 years ago
- ce85284 fconf: Add TBBR disable_authentication property by Louis Mayencourt · 5 years ago
- 25ac879 fconf: Add dynamic config DTBs info as property by Louis Mayencourt · 4 years, 9 months ago
- 9814bfc fconf: Populate properties from dtb during bl2 setup by Louis Mayencourt · 5 years ago
- 3b5ea74 fconf: Load config dtb from bl1 by Louis Mayencourt · 5 years ago
- ab1981d fconf: initial commit by Louis Mayencourt · 5 years ago
- f69a582 Merge "Use correct type when reading SCR register" into integration by Alexei Fedorov · 4 years, 8 months ago
- 8efec9e Merge changes I0fb7cf79,Ia8eb4710 into integration by Soby Mathew · 4 years, 8 months ago
- f1be00d Use correct type when reading SCR register by Louis Mayencourt · 4 years, 8 months ago
- f2d6b4e Neovers N1: added support to update presence of External LLC by Manish Pandey · 4 years, 8 months ago
- 61cbd41 qemu: Implement qemu_system_off via semihosting. by Andrew Walbran · 4 years, 8 months ago
- e76d9fc lib: utils_def: add CLAMP macro by Lionel Debieve · 4 years, 9 months ago
- 4363679 Merge "Unify type of "cpu_idx" across PSCI module." into integration by Mark Dykes · 4 years, 9 months ago
- 5b33ad1 Unify type of "cpu_idx" across PSCI module. by Deepika Bhavnani · 4 years, 9 months ago
- 45503af Merge "smccc: add get smc function id num macro" into integration by Mark Dykes · 4 years, 9 months ago
- e073e07 smccc: add get smc function id num macro by Olivier Deprez · 4 years, 9 months ago
- daa9b6e Simplify PMF helper macro definitions across header files by Madhukar Pappireddy · 4 years, 9 months ago
- 0348ee4 Merge "Workaround for Hercules erratum 1688305" into integration by Manish Pandey · 4 years, 9 months ago
- 83e9552 Workaround for Hercules erratum 1688305 by Madhukar Pappireddy · 4 years, 9 months ago
- ba4b453 lib: cpu: Add additional field definition for A72 L2 control by Sheetal Tigadoli · 5 years ago
- 86ed895 Merge "debugfs: add SMC channel" into integration by Mark Dykes · 4 years, 9 months ago
- be84a5b Merge "debugfs: add 9p device interface" into integration by Mark Dykes · 4 years, 9 months ago
- 538b002 spm: Remove SPM Alpha 1 prototype and support files by Paul Beesley · 5 years ago
- b8e1796 Merge changes from topic "bs/pmf32" into integration by György Szing · 4 years, 9 months ago
- 992f091 debugfs: add SMC channel by Ambroise Vincent · 5 years ago
- 4e0d14f Merge "arm: gicv3: Fix compiler dependent behavior" into integration by Soby Mathew · 4 years, 9 months ago
- 0531ada pmf: Make the runtime instrumentation work on AArch32 by Bence Szépkúti · 4 years, 11 months ago
- 0ca3913 debugfs: add 9p device interface by Olivier Deprez · 5 years ago
- ae4a90f libc: Fix SIZE_MAX on AArch32 by Bence Szépkúti · 4 years, 9 months ago
- fcccd35 Merge "libc: add memrchr" into integration by Alexei Fedorov · 4 years, 10 months ago
- ebff107 libc: add memrchr by Ambroise Vincent · 5 years ago
- d019691 arm: gicv3: Fix compiler dependent behavior by Ambroise Vincent · 5 years ago
- ade3f5d Merge changes from topic "bs/libc" into integration by Soby Mathew · 4 years, 10 months ago
- d45c323 libc: Consolidate the size_t and NULL definitions by Bence Szépkúti · 5 years ago
- b382ac6 libc: Consolidate unified definitions by Bence Szépkúti · 5 years ago
- d005cfb libc: Unify intmax_t and uintmax_t on AArch32/64 by Bence Szépkúti · 5 years ago
- e34cc0c Changes to support updated register usage in SMCCC v1.2 by Madhukar Pappireddy · 4 years, 11 months ago
- 89632e6 Replace deprecated __ASSEMBLY__ macro with __ASSEMBLER__ by Balint Dobszay · 5 years ago
- 25792ce Merge "Neoverse N1 Errata Workaround 1542419" into integration by Soby Mathew · 5 years ago
- 8094262 Neoverse N1 Errata Workaround 1542419 by laurenw-arm · 5 years ago
- 78f02ae Introducing support for Cortex-A65AE by Imre Kis · 5 years ago
- 6ad216d Introducing support for Cortex-A65 by Imre Kis · 5 years ago
- a4668c3 Cortex_hercules: Add support for Hercules-AE by Artsem Artsemenka · 5 years ago
- 1010770 Adding new optional PSCI hook pwr_domain_on_finish_late by Madhukar Pappireddy · 5 years ago
- 6129e9a Merge "Refactor ARMv8.3 Pointer Authentication support code" into integration by Soby Mathew · 5 years ago
- ed108b5 Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · 5 years ago
- 76eac18 Merge changes I08cf22df,I535ee414,Ie84cfc96,I8c35ce4e,If7649764, ... into integration by Soby Mathew · 5 years ago
- 2fc6ffc Merge "libc: fix sparse warning for __assert()" into integration by Soby Mathew · 5 years ago
- f906a44 libc: fix sparse warning for __assert() by Masahiro Yamada · 5 years ago
- 7352f32 mediatek: mt8183: support CPU hotplug by kenny liang · 5 years ago
- 9dd9438 Enable MTE support in both secure and non-secure worlds by Justin Chadwell · 5 years ago
- e290a8f AArch64: Disable Secure Cycle Counter by Alexei Fedorov · 5 years ago
- 402b3cf Switch AARCH32/AARCH64 to __aarch64__ by Julius Werner · 5 years ago
- d5dfdeb Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · 5 years ago
- 3d08461 Enable AMU for Cortex-Hercules by Balint Dobszay · 5 years ago
- d38613d Merge changes I0d17ba6c,I540741d2,I9e6475ad,Ifd769320,I12c04a85, ... into integration by Soby Mathew · 5 years ago
- 57bf605 Factor out cross-BL API into export headers suitable for 3rd party code by Julius Werner · 5 years ago
- b852d22 Introduce lightweight BL platform parameter library by Julius Werner · 5 years ago
- 294f9ef Cortex_hercules: Introduce preliminary cpu support by Louis Mayencourt · 5 years ago
- 70f7c4e Merge "AArch64: Add 128-bit integer types definitions" into integration by Sandrine Bailleux · 5 years ago
- 394fa5d AArch64: Add 128-bit integer types definitions by Alexei Fedorov · 5 years ago
- f363deb Rename Cortex-Deimos to Cortex-A77 by Balint Dobszay · 5 years ago
- 11c4837 Workaround for Neoverse N1 erratum 1262888 by lauwal01 · 5 years ago
- 411f495 Workaround for Neoverse N1 erratum 1262606 by lauwal01 · 5 years ago
- 335b3c7 Workaround for Neoverse N1 erratum 1257314 by lauwal01 · 5 years ago
- 9eceb02 Workaround for Neoverse N1 erratum 1220197 by lauwal01 · 5 years ago
- ef5fa7d Workaround for Neoverse N1 erratum 1207823 by lauwal01 · 5 years ago
- 2017ab2 Workaround for Neoverse N1 erratum 1165347 by lauwal01 · 5 years ago
- e34606f Workaround for Neoverse N1 erratum 1130799 by lauwal01 · 5 years ago
- a601afe Workaround for Neoverse N1 erratum 1073348 by lauwal01 · 5 years ago
- 5f5d076 Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703 by Andre Przywara · 5 years ago
- 8416741 Merge "Cortex-A55: workarounds for errata 1221012" into integration by Paul Beesley · 5 years ago
- 9af07df Cortex-A55: workarounds for errata 1221012 by Ambroise Vincent · 5 years ago
- 9fc5963 Add support for Branch Target Identification by Alexei Fedorov · 5 years ago
- e6e1d0a Cortex-A76: workarounds for errata 1257314, 1262606, 1262888, 1275112 by Soby Mathew · 5 years ago
- 632ab3e Neoverse N1: Forces cacheable atomic to near by Louis Mayencourt · 5 years ago
- 0e985d7 DSU: Implement workaround for errata 798953 by Louis Mayencourt · 5 years ago
- 2c3b76c DSU: Small fix and reformat on errata framework by Louis Mayencourt · 5 years ago
- cba71b7 Cortex-A35: Implement workaround for errata 855472 by Louis Mayencourt · 5 years ago
- 72562aa Merge "cpus: Fix Cortex-A12 MIDR mask" into integration by Antonio Niño Díaz · 5 years ago
- 9ccc5a5 Add support for Cortex-A76AE CPU by Alexei Fedorov · 5 years ago
- 8785a7c cpus: Fix Cortex-A12 MIDR mask by Heiko Stuebner · 5 years ago
- 75044d8 Merge pull request #1894 from jts-arm/e1_midr by Soby Mathew · 6 years ago
- c4187c9 Fix wrong MIDR_EL1 value for Neoverse E1 by John Tsichritzis · 6 years ago
- a4546e8 Introduce preliminary support for Neoverse Zeus by John Tsichritzis · 6 years ago
- 0b64c19 Cortex-A17: Implement workaround for errata 852421 by Ambroise Vincent · 6 years ago