1. bcc3c49 PSCI: Build option to enable D-Caches early in warmboot by Soby Mathew · 7 years ago
  2. 801cf93 Add and use plat_crash_console_flush() API by Antonio Nino Diaz · 8 years ago
  3. 510a9de Merge pull request #860 from jeenu-arm/hw-asstd-coh by davidcunado-arm · 7 years ago
  4. d50ece0 Simplify translation tables headers dependencies by Antonio Nino Diaz · 8 years ago
  5. 25a93f7 Enable data caches early with hardware-assisted coherency by Jeenu Viswambharan · 8 years ago
  6. a806dad Define and use no_ret macro where no return is expected by Jeenu Viswambharan · 8 years ago
  7. a6ef439 Cosmetic change to exception table by Douglas Raillard · 8 years ago
  8. 872be88 Add PMF instrumentation points in TF by dp-arm · 8 years ago
  9. cf0b149 Introduce PSCI Library Interface by Soby Mathew · 8 years ago
  10. 532ed61 Introduce `el3_runtime` and `PSCI` libraries by Soby Mathew · 8 years ago
  11. e0ae9fa Introduce some helper macros for exception vectors by Sandrine Bailleux · 8 years ago
  12. d448639 Add 32 bit version of plat_get_syscnt_freq by Antonio Nino Diaz · 8 years ago
  13. 9ff67fa Dump platform-defined regs in crash reporting by Gerald Lejeune · 9 years ago
  14. 6b836cf Add ISR_EL1 to crash report by Gerald Lejeune · 8 years ago
  15. adb4fcf Enable asynchronous abort exceptions during boot by Gerald Lejeune · 8 years ago
  16. 1c3ea10 Remove all non-configurable dead loops by Antonio Nino Diaz · 9 years ago
  17. 1645d3e Miscellaneous doc fixes for v1.2 by Sandrine Bailleux · 9 years ago
  18. d178637 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · 9 years ago
  19. bbf8f6f Move context management code to common location by Yatharth Kochar · 9 years ago
  20. 817ac8d Fix issue in Floating point register restore by Soby Mathew · 9 years ago
  21. 712038d Merge pull request #443 from achingupta/sb/el3_payloads-cb_single_cpu by danh-arm · 9 years ago
  22. a9bec67 Introduce COLD_BOOT_SINGLE_CPU build option by Sandrine Bailleux · 9 years ago
  23. 5471841 Remove the IMF_READ_INTERRUPT_ID build option by Soby Mathew · 9 years ago
  24. 54dc71e Make generic code work in presence of system caches by Achin Gupta · 9 years ago
  25. 85a181c PSCI: Migrate TF to the new platform API and CM helpers by Soby Mathew · 9 years ago
  26. e347e84 Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1 by danh-arm · 9 years ago
  27. bf031bb Introduce PROGRAMMABLE_RESET_ADDRESS build option by Sandrine Bailleux · 9 years ago
  28. 52010cc Rationalize reset handling code by Sandrine Bailleux · 9 years ago
  29. 5717aae Fix handling of spurious interrupts in BL3_1 by Achin Gupta · 9 years ago
  30. 8b77962 Add support to indicate size and end of assembly functions by Kévin Petit · 9 years ago
  31. 12e7c4a Initialise cpu ops after enabling data cache by Vikram Kanigiri · 10 years ago
  32. 79a97b2 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  33. ab8707e Remove coherent memory from the BL memory maps by Soby Mathew · 10 years ago
  34. 4480425 Miscellaneous documentation fixes by Sandrine Bailleux · 10 years ago
  35. d3f70af Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  36. add4035 Add CPU specific power management operations by Soby Mathew · 10 years ago
  37. 9b47684 Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  38. 0c8d4fe Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · 10 years ago
  39. c1efc4c Merge pull request #179 from jcastillo-arm/jc/tf-issues/219 by danh-arm · 10 years ago
  40. 53fdceb Call platform_is_primary_cpu() only from reset handler by Juan Castillo · 10 years ago
  41. fdfabec Optimize EL3 register state stored in cpu_context structure by Soby Mathew · 10 years ago
  42. 6397bf6 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · 10 years ago
  43. 8c10690 Add CPUECTLR_EL1 and Snoop Control register to crash reporting by Soby Mathew · 10 years ago
  44. 626ed51 Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 10 years ago
  45. ec3c100 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 10 years ago
  46. b51da82 Remove coherent stack usage from the warm boot path by Achin Gupta · 10 years ago
  47. 754a2b7 Remove coherent stack usage from the cold boot path by Achin Gupta · 10 years ago
  48. 0f21c54 Allow FP register context to be optional at build time by Juan Castillo · 10 years ago
  49. dac1235 Merge pull request #151 from vikramkanigiri/vk/t133-code-readability by Andrew Thoelke · 10 years ago
  50. 03396c4 Simplify entry point information generation code on FVP by Vikram Kanigiri · 10 years ago
  51. 167a935 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  52. ee94cc6 Remove early_exceptions from BL3-1 by Andrew Thoelke · 10 years ago
  53. 5e91007 Per-cpu data cache restructuring by Andrew Thoelke · 10 years ago
  54. dbc64b3 Merge pull request #133 from athoelke/at/crash-reporting-opt by danh-arm · 10 years ago
  55. 9c22b32 Make the BL3-1 crash reporting optional by Andrew Thoelke · 10 years ago
  56. e4d1338 Include 'platform_def.h' header file in 'crash_reporting.S' by Sandrine Bailleux · 10 years ago
  57. a378108 Fix compilation issue for IMF_READ_INTERRUPT_ID build flag by Soby Mathew · 10 years ago
  58. b460b8b Pass 'cookie' parameter to interrupt handler in BL3-1 by Soby Mathew · 10 years ago
  59. 9865ac1 Further renames of platform porting functions by Dan Handley · 10 years ago
  60. 5f0cdb0 Split platform.h into separate headers by Dan Handley · 10 years ago
  61. dce74b8 Introduce interrupt handling framework in BL3-1 by Achin Gupta · 10 years ago
  62. dbad1ba Add support for BL3-1 as a reset vector by Vikram Kanigiri · 10 years ago
  63. 4112bfa Populate BL31 input parameters as per new spec by Vikram Kanigiri · 10 years ago
  64. 29fb905 Rework handover interface between BL stages by Vikram Kanigiri · 10 years ago
  65. ec786cb Merge pull request #78 from jeenuv:tf-issues-148 by Andrew Thoelke · 10 years ago
  66. 2da8d8b Add build configuration for timer save/restore by Jeenu Viswambharan · 10 years ago
  67. a43d431 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · 10 years ago
  68. 401607c Merge pull request #63 from soby-mathew/sm/save_callee_saved_registers_in_cpu_context-1 by danh-arm · 10 years ago
  69. 18a17e6 Merge pull request #62 from athoelke/set-little-endian-v2 by danh-arm · 10 years ago
  70. c3260f9 Preserve x19-x29 across world switch for exception handling by Soby Mathew · 10 years ago
  71. 7935d0a Access system registers directly in assembler by Andrew Thoelke · 10 years ago
  72. 8cec598 Correct usage of data and instruction barriers by Andrew Thoelke · 10 years ago
  73. 40fd072 Set processor endianness immediately after RESET by Andrew Thoelke · 10 years ago
  74. 97043ac Reduce deep nesting of header files by Dan Handley · 10 years ago
  75. 35e98e5 Make use of user/system includes more consistent by Dan Handley · 10 years ago
  76. 2bf28e6 Allocate single stacks for BL1 and BL2 by Andrew Thoelke · 10 years ago
  77. 9c2c763 Merge pull request #36 from athoelke/at/gc-sections-80 by danh-arm · 10 years ago
  78. 9e86490 Define frequency of system counter in platform code by Sandrine Bailleux · 10 years ago
  79. 65a9c0e Revert "Move architecture timer setup to platform-specific code" by Sandrine Bailleux · 10 years ago
  80. 0a30cf5 Place assembler functions in separate sections by Andrew Thoelke · 10 years ago
  81. d8b07aa Move per cpu exception stack in BL31 to tzfw_normal_stacks by Vikram Kanigiri · 10 years ago
  82. 6ba0b6d Remove partially qualified asm helper functions by Vikram Kanigiri · 10 years ago
  83. 1c297bf Move architecture timer setup to platform-specific code by Jeenu Viswambharan · 11 years ago
  84. 35ca351 Add support for BL3-2 in BL3-1 by Achin Gupta · 11 years ago
  85. e4d084e Rework BL2 to BL3-1 hand over interface by Achin Gupta · 11 years ago
  86. a7934d6 Add exception vector guards by Jeenu Viswambharan · 11 years ago
  87. caa8493 Add support for handling runtime service requests by Jeenu Viswambharan · 11 years ago
  88. 07f4e07 Introduce new exception handling framework by Achin Gupta · 11 years ago
  89. 9ac63c5 Add helper library for cpu context management by Achin Gupta · 11 years ago
  90. b739f22 Setup VBAR_EL3 incrementally by Achin Gupta · 11 years ago
  91. 3a4cae0 Change comments in assembler files to help ctags by Jeenu Viswambharan · 11 years ago
  92. 4f60368 Do not trap access to floating point registers by Harry Liebel · 11 years ago
  93. e83b0ca Update year in copyright text to 2014 by Dan Handley · 11 years ago
  94. 93ca221 Make BL31's ns_entry_info a single-cpu area by Sandrine Bailleux · 11 years ago
  95. ba6980a Move RUN_IMAGE constant from bl1.h to bl_common.h by Sandrine Bailleux · 11 years ago
  96. 4a826dd rework general purpose registers save and restore by Achin Gupta · 11 years ago
  97. ab2d31e Enable third party contributions by Dan Handley · 11 years ago
  98. 65f546a Properly initialise the C runtime environment by Sandrine Bailleux · 11 years ago
  99. 8d69a03 Various improvements/cleanups on the linker scripts by Sandrine Bailleux · 11 years ago
  100. 3738274 Unmask SError and Debug exceptions. by Sandrine Bailleux · 11 years ago