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gerrit-public.fairphone.software / platform / external / arm-trusted-firmware / fd7b287cbe9147ca9e07dd9f30c49c58bbdd92a8 / bl31 / aarch64
  1. 050136d Fix restoration of PAuth context by Alexei Fedorov · 5 years ago
  2. 330ead8 PIE: Fix reloc at the beginning of bl31 entrypoint by Louis Mayencourt · 5 years ago
  3. 317d68e Restore PAuth context in case of unknown SMC call by Alexei Fedorov · 5 years ago
  4. 7dcbb4f BL31: Enable pointer authentication support in warm boot path by Alexei Fedorov · 5 years ago
  5. 88cfd9a BL31: Enable pointer authentication support by Antonio Nino Diaz · 6 years ago
  6. b86048c Add support for pointer authentication by Antonio Nino Diaz · 6 years ago
  7. 5283962 Add ARMv8.3-PAuth registers to CPU context by Antonio Nino Diaz · 6 years ago
  8. 0709055 Remove support for the SMC Calling Convention 2.0 by Antonio Nino Diaz · 6 years ago
  9. 09d40e0 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  10. e8ce60a SPM: Introduce SMC handlers for SPCI and SPRT by Antonio Nino Diaz · 6 years ago
  11. 01fc1c2 BL31: Use helper function to save registers in SMC handler by Soby Mathew · 6 years ago
  12. 931f7c6 PIE: Position Independant Executable support for BL31 by Soby Mathew · 6 years ago
  13. 81542c0 Remove some MISRA defects in common code by Antonio Nino Diaz · 6 years ago
  14. eaeaa4d RAS: Introduce handler for EL3 EAs by Jeenu Viswambharan · 6 years ago
  15. d5a23af RAS: Introduce handler for Double Faults by Jeenu Viswambharan · 6 years ago
  16. b56dc2a RAS: Introduce handler for Uncontainable errors by Jeenu Viswambharan · 6 years ago
  17. ee6ff1b RAS: Validate stack pointer after error handling by Jeenu Viswambharan · 7 years ago
  18. df8f318 RAS: Move EA handling to a separate file by Jeenu Viswambharan · 6 years ago
  19. a9203ed Add end_vector_entry assembler macro by Roberto Vargas · 6 years ago
  20. 64ee263 DynamIQ: Enable MMU without using stack by Jeenu Viswambharan · 6 years ago
  21. 14c6016 AArch64: Introduce RAS handling by Jeenu Viswambharan · 6 years ago
  22. 76454ab AArch64: Introduce External Abort handling by Jeenu Viswambharan · 7 years ago
  23. ef653d9 AArch64: Refactor GP register restore to separate function by Jeenu Viswambharan · 7 years ago
  24. 2f37046 Add support for the SMC Calling Convention 2.0 by Antonio Nino Diaz · 6 years ago
  25. c69145f Merge pull request #1286 from antonio-nino-diaz-arm/an/mmu-mismatch by davidcunado-arm · 6 years ago
  26. 883d1b5 Add comments about mismatched TCR_ELx and xlat tables by Antonio Nino Diaz · 6 years ago
  27. a6f340f Introduce the new BL handover interface by Soby Mathew · 7 years ago
  28. 4abd7fa Redefine SMC_UNK as -1 instead of 0xFFFFFFFF by Antonio Nino Diaz · 7 years ago
  29. 201ca5b runtime_exceptions: Save x4-x29 unconditionally by Dimitris Papastamos · 7 years ago
  30. 040f1e6 Merge pull request #1193 from jwerner-chromium/JW_coreboot by davidcunado-arm · 7 years ago
  31. f62ad32 Workaround for CVE-2017-5715 on Cortex A57 and A72 by Dimitris Papastamos · 7 years ago
  32. 155a100 utils_def: Add REGSZ and make BIT() assembly-compatible by Julius Werner · 7 years ago
  33. 91089f3 Move FPEXC32_EL2 to FP Context by David Cunado · 7 years ago
  34. 4d91838 Fix x30 reporting for unhandled exceptions by Julius Werner · 7 years ago
  35. 18f2efd Fully initialise essential control registers by David Cunado · 7 years ago
  36. 82cb2c1 Use SPDX license identifiers by dp-arm · 7 years ago
  37. bcc3c49 PSCI: Build option to enable D-Caches early in warmboot by Soby Mathew · 7 years ago
  38. 801cf93 Add and use plat_crash_console_flush() API by Antonio Nino Diaz · 8 years ago
  39. 510a9de Merge pull request #860 from jeenu-arm/hw-asstd-coh by davidcunado-arm · 7 years ago
  40. d50ece0 Simplify translation tables headers dependencies by Antonio Nino Diaz · 8 years ago
  41. 25a93f7 Enable data caches early with hardware-assisted coherency by Jeenu Viswambharan · 8 years ago
  42. a806dad Define and use no_ret macro where no return is expected by Jeenu Viswambharan · 8 years ago
  43. a6ef439 Cosmetic change to exception table by Douglas Raillard · 8 years ago
  44. 872be88 Add PMF instrumentation points in TF by dp-arm · 8 years ago
  45. cf0b149 Introduce PSCI Library Interface by Soby Mathew · 8 years ago
  46. 532ed61 Introduce `el3_runtime` and `PSCI` libraries by Soby Mathew · 8 years ago
  47. e0ae9fa Introduce some helper macros for exception vectors by Sandrine Bailleux · 8 years ago
  48. d448639 Add 32 bit version of plat_get_syscnt_freq by Antonio Nino Diaz · 8 years ago
  49. 9ff67fa Dump platform-defined regs in crash reporting by Gerald Lejeune · 9 years ago
  50. 6b836cf Add ISR_EL1 to crash report by Gerald Lejeune · 8 years ago
  51. adb4fcf Enable asynchronous abort exceptions during boot by Gerald Lejeune · 8 years ago
  52. 1c3ea10 Remove all non-configurable dead loops by Antonio Nino Diaz · 9 years ago
  53. 1645d3e Miscellaneous doc fixes for v1.2 by Sandrine Bailleux · 9 years ago
  54. d178637 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · 9 years ago
  55. bbf8f6f Move context management code to common location by Yatharth Kochar · 9 years ago
  56. 817ac8d Fix issue in Floating point register restore by Soby Mathew · 9 years ago
  57. 712038d Merge pull request #443 from achingupta/sb/el3_payloads-cb_single_cpu by danh-arm · 9 years ago
  58. a9bec67 Introduce COLD_BOOT_SINGLE_CPU build option by Sandrine Bailleux · 9 years ago
  59. 5471841 Remove the IMF_READ_INTERRUPT_ID build option by Soby Mathew · 9 years ago
  60. 54dc71e Make generic code work in presence of system caches by Achin Gupta · 9 years ago
  61. 85a181c PSCI: Migrate TF to the new platform API and CM helpers by Soby Mathew · 9 years ago
  62. e347e84 Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1 by danh-arm · 9 years ago
  63. bf031bb Introduce PROGRAMMABLE_RESET_ADDRESS build option by Sandrine Bailleux · 9 years ago
  64. 52010cc Rationalize reset handling code by Sandrine Bailleux · 9 years ago
  65. 5717aae Fix handling of spurious interrupts in BL3_1 by Achin Gupta · 9 years ago
  66. 8b77962 Add support to indicate size and end of assembly functions by Kévin Petit · 9 years ago
  67. 12e7c4a Initialise cpu ops after enabling data cache by Vikram Kanigiri · 10 years ago
  68. 79a97b2 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  69. ab8707e Remove coherent memory from the BL memory maps by Soby Mathew · 10 years ago
  70. 4480425 Miscellaneous documentation fixes by Sandrine Bailleux · 10 years ago
  71. d3f70af Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  72. add4035 Add CPU specific power management operations by Soby Mathew · 10 years ago
  73. 9b47684 Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  74. 0c8d4fe Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · 10 years ago
  75. c1efc4c Merge pull request #179 from jcastillo-arm/jc/tf-issues/219 by danh-arm · 10 years ago
  76. 53fdceb Call platform_is_primary_cpu() only from reset handler by Juan Castillo · 10 years ago
  77. fdfabec Optimize EL3 register state stored in cpu_context structure by Soby Mathew · 10 years ago
  78. 6397bf6 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · 10 years ago
  79. 8c10690 Add CPUECTLR_EL1 and Snoop Control register to crash reporting by Soby Mathew · 10 years ago
  80. 626ed51 Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 10 years ago
  81. ec3c100 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 10 years ago
  82. b51da82 Remove coherent stack usage from the warm boot path by Achin Gupta · 10 years ago
  83. 754a2b7 Remove coherent stack usage from the cold boot path by Achin Gupta · 10 years ago
  84. 0f21c54 Allow FP register context to be optional at build time by Juan Castillo · 10 years ago
  85. dac1235 Merge pull request #151 from vikramkanigiri/vk/t133-code-readability by Andrew Thoelke · 10 years ago
  86. 03396c4 Simplify entry point information generation code on FVP by Vikram Kanigiri · 10 years ago
  87. 167a935 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  88. ee94cc6 Remove early_exceptions from BL3-1 by Andrew Thoelke · 10 years ago
  89. 5e91007 Per-cpu data cache restructuring by Andrew Thoelke · 10 years ago
  90. dbc64b3 Merge pull request #133 from athoelke/at/crash-reporting-opt by danh-arm · 10 years ago
  91. 9c22b32 Make the BL3-1 crash reporting optional by Andrew Thoelke · 10 years ago
  92. e4d1338 Include 'platform_def.h' header file in 'crash_reporting.S' by Sandrine Bailleux · 10 years ago
  93. a378108 Fix compilation issue for IMF_READ_INTERRUPT_ID build flag by Soby Mathew · 10 years ago
  94. b460b8b Pass 'cookie' parameter to interrupt handler in BL3-1 by Soby Mathew · 10 years ago
  95. 9865ac1 Further renames of platform porting functions by Dan Handley · 10 years ago
  96. 5f0cdb0 Split platform.h into separate headers by Dan Handley · 10 years ago
  97. dce74b8 Introduce interrupt handling framework in BL3-1 by Achin Gupta · 10 years ago
  98. dbad1ba Add support for BL3-1 as a reset vector by Vikram Kanigiri · 10 years ago
  99. 4112bfa Populate BL31 input parameters as per new spec by Vikram Kanigiri · 10 years ago
  100. 29fb905 Rework handover interface between BL stages by Vikram Kanigiri · 10 years ago