Add register access info for ARM64
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
diff --git a/arch/AArch64/AArch64InstPrinter.c b/arch/AArch64/AArch64InstPrinter.c
index 83069d4..00c8ba1 100644
--- a/arch/AArch64/AArch64InstPrinter.c
+++ b/arch/AArch64/AArch64InstPrinter.c
@@ -45,6 +45,20 @@
static void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI);
static void printShifter(MCInst *MI, unsigned OpNum, SStream *O);
+static cs_ac_type get_op_access(cs_struct *h, unsigned int id, unsigned int index)
+{
+#ifndef CAPSTONE_DIET
+ cs_ac_type *arr = arm64_get_op_access(h, id);
+
+ if (arr[index] == CS_AC_IGNORE)
+ return 0;
+
+ return arr[index];
+#else
+ return 0;
+#endif
+}
+
static void set_mem_access(MCInst *MI, bool status)
{
MI->csh->doing_mem = status;
@@ -53,6 +67,12 @@
return;
if (status) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_MEM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base = ARM64_REG_INVALID;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = ARM64_REG_INVALID;
@@ -116,9 +136,20 @@
getRegisterName(getWRegFromXReg(MCOperand_getReg(Op1)), AArch64_NoRegAltName));
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
MI->flat_insn->detail->arm64.op_count++;
+#ifndef CAPSTONE_DIET
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = getWRegFromXReg(MCOperand_getReg(Op1));
MI->flat_insn->detail->arm64.op_count++;
@@ -170,12 +201,28 @@
MCInst_setOpcodePub(MI, AArch64_map_insn(AsmMnemonic));
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
MI->flat_insn->detail->arm64.op_count++;
+#ifndef CAPSTONE_DIET
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op1);
MI->flat_insn->detail->arm64.op_count++;
+#ifndef CAPSTONE_DIET
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = shift;
MI->flat_insn->detail->arm64.op_count++;
@@ -197,15 +244,36 @@
MCInst_setOpcodePub(MI, AArch64_map_insn(IsSigned ? "sbfiz" : "ubfiz"));
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
MI->flat_insn->detail->arm64.op_count++;
+#ifndef CAPSTONE_DIET
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op1);
MI->flat_insn->detail->arm64.op_count++;
+#ifndef CAPSTONE_DIET
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (Is64Bit ? 64 : 32) - (int)MCOperand_getImm(Op2);
MI->flat_insn->detail->arm64.op_count++;
+#ifndef CAPSTONE_DIET
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)MCOperand_getImm(Op3) + 1;
MI->flat_insn->detail->arm64.op_count++;
@@ -225,15 +293,36 @@
MCInst_setOpcodePub(MI, AArch64_map_insn(IsSigned ? "sbfx" : "ubfx"));
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
MI->flat_insn->detail->arm64.op_count++;
+#ifndef CAPSTONE_DIET
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op1);
MI->flat_insn->detail->arm64.op_count++;
+#ifndef CAPSTONE_DIET
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)MCOperand_getImm(Op2);
MI->flat_insn->detail->arm64.op_count++;
+#ifndef CAPSTONE_DIET
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)MCOperand_getImm(Op3) - (int)MCOperand_getImm(Op2) + 1;
MI->flat_insn->detail->arm64.op_count++;
@@ -263,15 +352,36 @@
MCInst_setOpcodePub(MI, AArch64_map_insn("bfi"));
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
MI->flat_insn->detail->arm64.op_count++;
+#ifndef CAPSTONE_DIET
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op2);
MI->flat_insn->detail->arm64.op_count++;
+#ifndef CAPSTONE_DIET
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = LSB;
MI->flat_insn->detail->arm64.op_count++;
+#ifndef CAPSTONE_DIET
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Width;
MI->flat_insn->detail->arm64.op_count++;
@@ -292,15 +402,36 @@
MCInst_setOpcodePub(MI, AArch64_map_insn("bfxil"));
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op0);
MI->flat_insn->detail->arm64.op_count++;
+#ifndef CAPSTONE_DIET
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(Op2);
MI->flat_insn->detail->arm64.op_count++;
+#ifndef CAPSTONE_DIET
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = LSB;
MI->flat_insn->detail->arm64.op_count++;
+#ifndef CAPSTONE_DIET
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Width;
MI->flat_insn->detail->arm64.op_count++;
@@ -565,6 +696,12 @@
MCInst_setOpcodePub(MI, insn_id);
SStream_concat0(O, Asm);
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_SYS;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].sys = op_ic + op_dc + op_at + op_tlbi;
MI->flat_insn->detail->arm64.op_count++;
@@ -574,6 +711,12 @@
unsigned Reg = MCOperand_getReg(MCInst_getOperand(MI, 4));
SStream_concat(O, ", %s", getRegisterName(Reg, AArch64_NoRegAltName));
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg;
MI->flat_insn->detail->arm64.op_count++;
@@ -600,6 +743,12 @@
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = Reg;
}
} else {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg;
MI->flat_insn->detail->arm64.op_count++;
@@ -622,6 +771,12 @@
if (MI->csh->doing_mem) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int32_t)imm;
} else {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm;
MI->flat_insn->detail->arm64.op_count++;
@@ -635,6 +790,12 @@
MCOperand *Op = MCInst_getOperand(MI, OpNo);
SStream_concat(O, "#%#llx", MCOperand_getImm(Op));
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)MCOperand_getImm(Op);
MI->flat_insn->detail->arm64.op_count++;
@@ -651,6 +812,12 @@
if (Reg == AArch64_XZR) {
printInt32Bang(O, Imm);
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Imm;
MI->flat_insn->detail->arm64.op_count++;
@@ -658,6 +825,12 @@
} else {
SStream_concat0(O, getRegisterName(Reg, AArch64_NoRegAltName));
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg;
MI->flat_insn->detail->arm64.op_count++;
@@ -679,6 +852,12 @@
unsigned Reg = MCOperand_getReg(Op);
SStream_concat0(O, getRegisterName(Reg, AArch64_vreg));
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = AArch64_map_vregister(Reg);
MI->flat_insn->detail->arm64.op_count++;
@@ -691,6 +870,12 @@
//assert(Op.isImm() && "System instruction C[nm] operands must be immediates!");
SStream_concat(O, "c%u", MCOperand_getImm(Op));
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_CIMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)MCOperand_getImm(Op);
MI->flat_insn->detail->arm64.op_count++;
@@ -708,6 +893,12 @@
printInt32Bang(O, Val);
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val;
MI->flat_insn->detail->arm64.op_count++;
@@ -726,6 +917,12 @@
printUInt32Bang(O, (int)Val);
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)Val;
MI->flat_insn->detail->arm64.op_count++;
@@ -754,6 +951,12 @@
}
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)Val;
MI->flat_insn->detail->arm64.op_count++;
@@ -801,6 +1004,12 @@
{
SStream_concat0(O, getRegisterName(MCOperand_getReg(MCInst_getOperand(MI, OpNum)), AArch64_NoRegAltName));
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getReg(MCInst_getOperand(MI, OpNum));
MI->flat_insn->detail->arm64.op_count++;
@@ -887,6 +1096,12 @@
SStream_concat0(O, getRegisterName(Reg, AArch64_NoRegAltName));
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Reg;
MI->flat_insn->detail->arm64.op_count++;
@@ -981,6 +1196,12 @@
if (MI->csh->doing_mem) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int)val;
} else {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)val;
MI->flat_insn->detail->arm64.op_count++;
@@ -999,6 +1220,12 @@
if (MI->csh->doing_mem) {
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = (int)val;
} else {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)val;
MI->flat_insn->detail->arm64.op_count++;
@@ -1029,6 +1256,12 @@
} else {
printInt32Bang(O, prfop);
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = prfop;
MI->flat_insn->detail->arm64.op_count++;
@@ -1044,6 +1277,12 @@
// 8 decimal places are enough to perfectly represent permitted floats.
SStream_concat(O, "#%.8f", FPImm);
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_FP;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].fp = FPImm;
MI->flat_insn->detail->arm64.op_count++;
@@ -1135,6 +1374,12 @@
if (i + 1 != NumRegs)
SStream_concat0(O, ", ");
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = AArch64_map_vregister(Reg);
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].vas = vas;
@@ -1251,6 +1496,12 @@
uint64_t imm = (MCOperand_getImm(Op) * 4) + MI->address;
printUInt64Bang(O, imm);
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm;
MI->flat_insn->detail->arm64.op_count++;
@@ -1273,6 +1524,12 @@
SStream_concat(O, "#%"PRIu64, imm);
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = imm;
MI->flat_insn->detail->arm64.op_count++;
@@ -1296,6 +1553,12 @@
if (Valid) {
SStream_concat0(O, Name);
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_BARRIER;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].barrier = Val;
MI->flat_insn->detail->arm64.op_count++;
@@ -1303,6 +1566,12 @@
} else {
printUInt32Bang(O, Val);
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val;
MI->flat_insn->detail->arm64.op_count++;
@@ -1319,6 +1588,12 @@
SStream_concat0(O, Name);
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG_MRS;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Val;
MI->flat_insn->detail->arm64.op_count++;
@@ -1334,6 +1609,12 @@
SStream_concat0(O, Name);
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG_MSR;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = Val;
MI->flat_insn->detail->arm64.op_count++;
@@ -1350,12 +1631,24 @@
if (Valid) {
SStream_concat0(O, Name);
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_PSTATE;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].pstate = Val;
MI->flat_insn->detail->arm64.op_count++;
}
} else {
printInt32Bang(O, Val);
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = Val;
MI->flat_insn->detail->arm64.op_count++;
@@ -1368,6 +1661,12 @@
uint64_t Val = AArch64_AM_decodeAdvSIMDModImmType10(RawVal);
SStream_concat(O, "#%#016llx", Val);
if (MI->csh->detail) {
+#ifndef CAPSTONE_DIET
+ uint8_t access;
+ access = get_op_access(MI->csh, MCInst_getOpcode(MI), MI->ac_idx);
+ MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].access = access;
+ MI->ac_idx++;
+#endif
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_IMM;
MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = (int)Val;
MI->flat_insn->detail->arm64.op_count++;
diff --git a/arch/AArch64/AArch64Mapping.c b/arch/AArch64/AArch64Mapping.c
index f653517..644cea1 100644
--- a/arch/AArch64/AArch64Mapping.c
+++ b/arch/AArch64/AArch64Mapping.c
@@ -1000,9324 +1000,85 @@
}
}
-#if 0
+#ifndef CAPSTONE_DIET
// map instruction to its characteristics
typedef struct insn_op {
unsigned int eflags_update; // how this instruction update status flags
- cs_ac_type operands[4];
+ cs_ac_type operands[5];
} insn_op;
static insn_op insn_ops[] = {
- { /* AArch64_ABSv16i8, ARM64_INS_ABS: abs.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ABSv1i64, ARM64_INS_ABS: abs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ABSv2i32, ARM64_INS_ABS: abs.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ABSv2i64, ARM64_INS_ABS: abs.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ABSv4i16, ARM64_INS_ABS: abs.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ABSv4i32, ARM64_INS_ABS: abs.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ABSv8i16, ARM64_INS_ABS: abs.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ABSv8i8, ARM64_INS_ABS: abs.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ADCSWr, ARM64_INS_ADCS: adcs $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADCSXr, ARM64_INS_ADCS: adcs $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADCWr, ARM64_INS_ADC: adc $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADCXr, ARM64_INS_ADC: adc $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDHNv2i64_v2i32, ARM64_INS_ADDHN: addhn.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDHNv2i64_v4i32, ARM64_INS_ADDHN2: addhn2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDHNv4i32_v4i16, ARM64_INS_ADDHN: addhn.4h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDHNv4i32_v8i16, ARM64_INS_ADDHN2: addhn2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDHNv8i16_v16i8, ARM64_INS_ADDHN2: addhn2.16b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDHNv8i16_v8i8, ARM64_INS_ADDHN: addhn.8b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDPv16i8, ARM64_INS_ADDP: addp.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDPv2i32, ARM64_INS_ADDP: addp.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDPv2i64, ARM64_INS_ADDP: addp.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDPv2i64p, ARM64_INS_ADDP: addp.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDPv4i16, ARM64_INS_ADDP: addp.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDPv4i32, ARM64_INS_ADDP: addp.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDPv8i16, ARM64_INS_ADDP: addp.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDPv8i8, ARM64_INS_ADDP: addp.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDSWri, ARM64_INS_ADDS: adds $rd, $rn, $imm */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_READ,0 }
- },
- { /* AArch64_ADDSWrs, ARM64_INS_ADDS: adds $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDSWrx, ARM64_INS_ADDS: adds $r1, $r2, $r3 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDSXri, ARM64_INS_ADDS: adds $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDSXrs, ARM64_INS_ADDS: adds $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDSXrx, ARM64_INS_ADDS: adds $r1, $r2, $r3 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDSXrx64, ARM64_INS_ADDS: adds $rd, $rn, $rm$ext */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDVv16i8v, ARM64_INS_ADDV: addv.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDVv4i16v, ARM64_INS_ADDV: addv.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDVv4i32v, ARM64_INS_ADDV: addv.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDVv8i16v, ARM64_INS_ADDV: addv.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDVv8i8v, ARM64_INS_ADDV: addv.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDWri, ARM64_INS_ADD: add $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDWrs, ARM64_INS_ADD: add $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDWrx, ARM64_INS_ADD: add $r1, $r2, $r3 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDXri, ARM64_INS_ADD: add $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDXrs, ARM64_INS_ADD: add $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDXrx, ARM64_INS_ADD: add $r1, $r2, $r3 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDXrx64, ARM64_INS_ADD: add $rd, $rn, $rm$ext */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDv16i8, ARM64_INS_ADD: add.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDv1i64, ARM64_INS_ADD: add $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDv2i32, ARM64_INS_ADD: add.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDv2i64, ARM64_INS_ADD: add.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDv4i16, ARM64_INS_ADD: add.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDv4i32, ARM64_INS_ADD: add.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDv8i16, ARM64_INS_ADD: add.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADDv8i8, ARM64_INS_ADD: add.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ADR, ARM64_INS_ADR: adr $xd, $label */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ADRP, ARM64_INS_ADRP: adrp $xd, $label */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_AESDrr, ARM64_INS_AESD: aesd.16b $rd, $rn */
- 0,
- { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_AESErr, ARM64_INS_AESE: aese.16b $rd, $rn */
- 0,
- { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_AESIMCrr, ARM64_INS_AESIMC: aesimc.16b $rd, $rn */
- 0,
- { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_AESMCrr, ARM64_INS_AESMC: aesmc.16b $rd, $rn */
- 0,
- { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ANDSWri, ARM64_INS_ANDS: ands $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ANDSWrs, ARM64_INS_ANDS: ands $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ANDSXri, ARM64_INS_ANDS: ands $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ANDSXrs, ARM64_INS_ANDS: ands $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ANDWri, ARM64_INS_AND: and $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ANDWrs, ARM64_INS_AND: and $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ANDXri, ARM64_INS_AND: and $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ANDXrs, ARM64_INS_AND: and $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ANDv16i8, ARM64_INS_AND: and.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ANDv8i8, ARM64_INS_AND: and.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ASRVWr, ARM64_INS_ASR: asr $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ASRVXr, ARM64_INS_ASR: asr $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_B, ARM64_INS_B: b $addr */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_BFMWri, ARM64_INS_BFM: bfm $rd, $rn, $immr, $imms */
- 0,
- { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_BFMXri, ARM64_INS_BFM: bfm $rd, $rn, $immr, $imms */
- 0,
- { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_BICSWrs, ARM64_INS_BICS: bics $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_BICSXrs, ARM64_INS_BICS: bics $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_BICWrs, ARM64_INS_BIC: bic $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_BICXrs, ARM64_INS_BIC: bic $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_BICv16i8, ARM64_INS_BIC: bic.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_BICv2i32, ARM64_INS_BIC: bic.2s $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_BICv4i16, ARM64_INS_BIC: bic.4h $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_BICv4i32, ARM64_INS_BIC: bic.4s $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_BICv8i16, ARM64_INS_BIC: bic.8h $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_BICv8i8, ARM64_INS_BIC: bic.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_BIFv16i8, ARM64_INS_BIF: bif.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_BIFv8i8, ARM64_INS_BIF: bif.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_BITv16i8, ARM64_INS_BIT: bit.16b $rd, $rn, $rm */
- 0,
- { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_BITv8i8, ARM64_INS_BIT: bit.8b $rd, $rn, $rm */
- 0,
- { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_BL, ARM64_INS_BL: bl $addr */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_BLR, ARM64_INS_BLR: blr $rn */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_BR, ARM64_INS_BR: br $rn */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_BRK, ARM64_INS_BRK: brk $imm */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_BSLv16i8, ARM64_INS_BSL: bsl.16b $rd, $rn, $rm */
- 0,
- { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_BSLv8i8, ARM64_INS_BSL: bsl.8b $rd, $rn, $rm */
- 0,
- { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_Bcc, ARM64_INS_B: b.$cond $target */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_CBNZW, ARM64_INS_CBNZ: cbnz $rt, $target */
- 0,
- { CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CBNZX, ARM64_INS_CBNZ: cbnz $rt, $target */
- 0,
- { CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CBZW, ARM64_INS_CBZ: cbz $rt, $target */
- 0,
- { CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CBZX, ARM64_INS_CBZ: cbz $rt, $target */
- 0,
- { CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CCMNWi, ARM64_INS_CCMN: ccmn $rn, $imm, $nzcv, $cond */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CCMNWr, ARM64_INS_CCMN: ccmn $rn, $rm, $nzcv, $cond */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CCMNXi, ARM64_INS_CCMN: ccmn $rn, $imm, $nzcv, $cond */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CCMNXr, ARM64_INS_CCMN: ccmn $rn, $rm, $nzcv, $cond */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CCMPWi, ARM64_INS_CCMP: ccmp $rn, $imm, $nzcv, $cond */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CCMPWr, ARM64_INS_CCMP: ccmp $rn, $rm, $nzcv, $cond */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CCMPXi, ARM64_INS_CCMP: ccmp $rn, $imm, $nzcv, $cond */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CCMPXr, ARM64_INS_CCMP: ccmp $rn, $rm, $nzcv, $cond */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CLREX, ARM64_INS_CLREX: clrex $crm */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_CLSWr, ARM64_INS_CLS: cls $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CLSXr, ARM64_INS_CLS: cls $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CLSv16i8, ARM64_INS_CLS: cls.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CLSv2i32, ARM64_INS_CLS: cls.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CLSv4i16, ARM64_INS_CLS: cls.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CLSv4i32, ARM64_INS_CLS: cls.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CLSv8i16, ARM64_INS_CLS: cls.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CLSv8i8, ARM64_INS_CLS: cls.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CLZWr, ARM64_INS_CLZ: clz $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CLZXr, ARM64_INS_CLZ: clz $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CLZv16i8, ARM64_INS_CLZ: clz.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CLZv2i32, ARM64_INS_CLZ: clz.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CLZv4i16, ARM64_INS_CLZ: clz.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CLZv4i32, ARM64_INS_CLZ: clz.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CLZv8i16, ARM64_INS_CLZ: clz.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CLZv8i8, ARM64_INS_CLZ: clz.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv16i8, ARM64_INS_CMEQ: cmeq.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv16i8rz, ARM64_INS_CMEQ: cmeq.16b $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv1i64, ARM64_INS_CMEQ: cmeq $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv1i64rz, ARM64_INS_CMEQ: cmeq $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv2i32, ARM64_INS_CMEQ: cmeq.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv2i32rz, ARM64_INS_CMEQ: cmeq.2s $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv2i64, ARM64_INS_CMEQ: cmeq.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv2i64rz, ARM64_INS_CMEQ: cmeq.2d $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv4i16, ARM64_INS_CMEQ: cmeq.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv4i16rz, ARM64_INS_CMEQ: cmeq.4h $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv4i32, ARM64_INS_CMEQ: cmeq.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv4i32rz, ARM64_INS_CMEQ: cmeq.4s $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv8i16, ARM64_INS_CMEQ: cmeq.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv8i16rz, ARM64_INS_CMEQ: cmeq.8h $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv8i8, ARM64_INS_CMEQ: cmeq.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMEQv8i8rz, ARM64_INS_CMEQ: cmeq.8b $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv16i8, ARM64_INS_CMGE: cmge.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv16i8rz, ARM64_INS_CMGE: cmge.16b $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv1i64, ARM64_INS_CMGE: cmge $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv1i64rz, ARM64_INS_CMGE: cmge $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv2i32, ARM64_INS_CMGE: cmge.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv2i32rz, ARM64_INS_CMGE: cmge.2s $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv2i64, ARM64_INS_CMGE: cmge.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv2i64rz, ARM64_INS_CMGE: cmge.2d $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv4i16, ARM64_INS_CMGE: cmge.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv4i16rz, ARM64_INS_CMGE: cmge.4h $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv4i32, ARM64_INS_CMGE: cmge.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv4i32rz, ARM64_INS_CMGE: cmge.4s $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv8i16, ARM64_INS_CMGE: cmge.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv8i16rz, ARM64_INS_CMGE: cmge.8h $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv8i8, ARM64_INS_CMGE: cmge.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGEv8i8rz, ARM64_INS_CMGE: cmge.8b $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv16i8, ARM64_INS_CMGT: cmgt.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv16i8rz, ARM64_INS_CMGT: cmgt.16b $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv1i64, ARM64_INS_CMGT: cmgt $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv1i64rz, ARM64_INS_CMGT: cmgt $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv2i32, ARM64_INS_CMGT: cmgt.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv2i32rz, ARM64_INS_CMGT: cmgt.2s $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv2i64, ARM64_INS_CMGT: cmgt.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv2i64rz, ARM64_INS_CMGT: cmgt.2d $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv4i16, ARM64_INS_CMGT: cmgt.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv4i16rz, ARM64_INS_CMGT: cmgt.4h $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv4i32, ARM64_INS_CMGT: cmgt.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv4i32rz, ARM64_INS_CMGT: cmgt.4s $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv8i16, ARM64_INS_CMGT: cmgt.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv8i16rz, ARM64_INS_CMGT: cmgt.8h $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv8i8, ARM64_INS_CMGT: cmgt.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMGTv8i8rz, ARM64_INS_CMGT: cmgt.8b $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHIv16i8, ARM64_INS_CMHI: cmhi.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHIv1i64, ARM64_INS_CMHI: cmhi $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHIv2i32, ARM64_INS_CMHI: cmhi.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHIv2i64, ARM64_INS_CMHI: cmhi.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHIv4i16, ARM64_INS_CMHI: cmhi.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHIv4i32, ARM64_INS_CMHI: cmhi.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHIv8i16, ARM64_INS_CMHI: cmhi.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHIv8i8, ARM64_INS_CMHI: cmhi.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHSv16i8, ARM64_INS_CMHS: cmhs.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHSv1i64, ARM64_INS_CMHS: cmhs $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHSv2i32, ARM64_INS_CMHS: cmhs.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHSv2i64, ARM64_INS_CMHS: cmhs.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHSv4i16, ARM64_INS_CMHS: cmhs.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHSv4i32, ARM64_INS_CMHS: cmhs.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHSv8i16, ARM64_INS_CMHS: cmhs.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMHSv8i8, ARM64_INS_CMHS: cmhs.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLEv16i8rz, ARM64_INS_CMLE: cmle.16b $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLEv1i64rz, ARM64_INS_CMLE: cmle $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLEv2i32rz, ARM64_INS_CMLE: cmle.2s $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLEv2i64rz, ARM64_INS_CMLE: cmle.2d $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLEv4i16rz, ARM64_INS_CMLE: cmle.4h $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLEv4i32rz, ARM64_INS_CMLE: cmle.4s $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLEv8i16rz, ARM64_INS_CMLE: cmle.8h $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLEv8i8rz, ARM64_INS_CMLE: cmle.8b $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLTv16i8rz, ARM64_INS_CMLT: cmlt.16b $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLTv1i64rz, ARM64_INS_CMLT: cmlt $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLTv2i32rz, ARM64_INS_CMLT: cmlt.2s $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLTv2i64rz, ARM64_INS_CMLT: cmlt.2d $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLTv4i16rz, ARM64_INS_CMLT: cmlt.4h $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLTv4i32rz, ARM64_INS_CMLT: cmlt.4s $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLTv8i16rz, ARM64_INS_CMLT: cmlt.8h $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMLTv8i8rz, ARM64_INS_CMLT: cmlt.8b $rd, $rn, #0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMTSTv16i8, ARM64_INS_CMTST: cmtst.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMTSTv1i64, ARM64_INS_CMTST: cmtst $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMTSTv2i32, ARM64_INS_CMTST: cmtst.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMTSTv2i64, ARM64_INS_CMTST: cmtst.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMTSTv4i16, ARM64_INS_CMTST: cmtst.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMTSTv4i32, ARM64_INS_CMTST: cmtst.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMTSTv8i16, ARM64_INS_CMTST: cmtst.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CMTSTv8i8, ARM64_INS_CMTST: cmtst.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CNTv16i8, ARM64_INS_CNT: cnt.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CNTv8i8, ARM64_INS_CNT: cnt.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_CPYi16, ARM64_INS_MOV: mov $dst, $src$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CPYi32, ARM64_INS_MOV: mov $dst, $src$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CPYi64, ARM64_INS_MOV: mov $dst, $src$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CPYi8, ARM64_INS_MOV: mov $dst, $src$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CRC32Brr, ARM64_INS_CRC32B: crc32b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CRC32CBrr, ARM64_INS_CRC32CB: crc32cb $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CRC32CHrr, ARM64_INS_CRC32CH: crc32ch $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CRC32CWrr, ARM64_INS_CRC32CW: crc32cw $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CRC32CXrr, ARM64_INS_CRC32CX: crc32cx $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CRC32Hrr, ARM64_INS_CRC32H: crc32h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CRC32Wrr, ARM64_INS_CRC32W: crc32w $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CRC32Xrr, ARM64_INS_CRC32X: crc32x $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CSELWr, ARM64_INS_CSEL: csel $rd, $rn, $rm, $cond */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CSELXr, ARM64_INS_CSEL: csel $rd, $rn, $rm, $cond */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CSINCWr, ARM64_INS_CSINC: csinc $rd, $rn, $rm, $cond */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CSINCXr, ARM64_INS_CSINC: csinc $rd, $rn, $rm, $cond */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CSINVWr, ARM64_INS_CSINV: csinv $rd, $rn, $rm, $cond */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CSINVXr, ARM64_INS_CSINV: csinv $rd, $rn, $rm, $cond */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CSNEGWr, ARM64_INS_CSNEG: csneg $rd, $rn, $rm, $cond */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_CSNEGXr, ARM64_INS_CSNEG: csneg $rd, $rn, $rm, $cond */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_DCPS1, ARM64_INS_DCPS1: dcps1 $imm */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_DCPS2, ARM64_INS_DCPS2: dcps2 $imm */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_DCPS3, ARM64_INS_DCPS3: dcps3 $imm */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_DMB, ARM64_INS_DMB: dmb $crm */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_DRPS, ARM64_INS_DRPS: drps */
- 0,
- { 0 }
- },
- { /* AArch64_DSB, ARM64_INS_DSB: dsb $crm */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_DUPv16i8gpr, ARM64_INS_DUP: dup.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_DUPv16i8lane, ARM64_INS_DUP: dup.16b $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_DUPv2i32gpr, ARM64_INS_DUP: dup.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_DUPv2i32lane, ARM64_INS_DUP: dup.2s $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_DUPv2i64gpr, ARM64_INS_DUP: dup.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_DUPv2i64lane, ARM64_INS_DUP: dup.2d $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_DUPv4i16gpr, ARM64_INS_DUP: dup.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_DUPv4i16lane, ARM64_INS_DUP: dup.4h $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_DUPv4i32gpr, ARM64_INS_DUP: dup.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_DUPv4i32lane, ARM64_INS_DUP: dup.4s $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_DUPv8i16gpr, ARM64_INS_DUP: dup.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_DUPv8i16lane, ARM64_INS_DUP: dup.8h $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_DUPv8i8gpr, ARM64_INS_DUP: dup.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_DUPv8i8lane, ARM64_INS_DUP: dup.8b $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_EONWrs, ARM64_INS_EON: eon $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_EONXrs, ARM64_INS_EON: eon $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_EORWri, ARM64_INS_EOR: eor $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_EORWrs, ARM64_INS_EOR: eor $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_EORXri, ARM64_INS_EOR: eor $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_EORXrs, ARM64_INS_EOR: eor $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_EORv16i8, ARM64_INS_EOR: eor.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_EORv8i8, ARM64_INS_EOR: eor.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ERET, ARM64_INS_ERET: eret */
- 0,
- { 0 }
- },
- { /* AArch64_EXTRWrri, ARM64_INS_EXTR: extr $rd, $rn, $rm, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_EXTRXrri, ARM64_INS_EXTR: extr $rd, $rn, $rm, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_EXTv16i8, ARM64_INS_EXT: ext.16b $rd, $rn, $rm, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_EXTv8i8, ARM64_INS_EXT: ext.8b $rd, $rn, $rm, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FABD32, ARM64_INS_FABD: fabd $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FABD64, ARM64_INS_FABD: fabd $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FABDv2f32, ARM64_INS_FABD: fabd.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FABDv2f64, ARM64_INS_FABD: fabd.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FABDv4f32, ARM64_INS_FABD: fabd.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FABSDr, ARM64_INS_FABS: fabs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FABSSr, ARM64_INS_FABS: fabs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FABSv2f32, ARM64_INS_FABS: fabs.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FABSv2f64, ARM64_INS_FABS: fabs.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FABSv4f32, ARM64_INS_FABS: fabs.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FACGE32, ARM64_INS_FACGE: facge $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FACGE64, ARM64_INS_FACGE: facge $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FACGEv2f32, ARM64_INS_FACGE: facge.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FACGEv2f64, ARM64_INS_FACGE: facge.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FACGEv4f32, ARM64_INS_FACGE: facge.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FACGT32, ARM64_INS_FACGT: facgt $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FACGT64, ARM64_INS_FACGT: facgt $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FACGTv2f32, ARM64_INS_FACGT: facgt.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FACGTv2f64, ARM64_INS_FACGT: facgt.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FACGTv4f32, ARM64_INS_FACGT: facgt.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FADDDrr, ARM64_INS_FADD: fadd $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FADDPv2f32, ARM64_INS_FADDP: faddp.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FADDPv2f64, ARM64_INS_FADDP: faddp.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FADDPv2i32p, ARM64_INS_FADDP: faddp.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FADDPv2i64p, ARM64_INS_FADDP: faddp.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FADDPv4f32, ARM64_INS_FADDP: faddp.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FADDSrr, ARM64_INS_FADD: fadd $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FADDv2f32, ARM64_INS_FADD: fadd.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FADDv2f64, ARM64_INS_FADD: fadd.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FADDv4f32, ARM64_INS_FADD: fadd.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCCMPDrr, ARM64_INS_FCCMP: fccmp $rn, $rm, $nzcv, $cond */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCCMPEDrr, ARM64_INS_FCCMPE: fccmpe $rn, $rm, $nzcv, $cond */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCCMPESrr, ARM64_INS_FCCMPE: fccmpe $rn, $rm, $nzcv, $cond */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCCMPSrr, ARM64_INS_FCCMP: fccmp $rn, $rm, $nzcv, $cond */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMEQ32, ARM64_INS_FCMEQ: fcmeq $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMEQ64, ARM64_INS_FCMEQ: fcmeq $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMEQv1i32rz, ARM64_INS_FCMEQ: fcmeq $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMEQv1i64rz, ARM64_INS_FCMEQ: fcmeq $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMEQv2f32, ARM64_INS_FCMEQ: fcmeq.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMEQv2f64, ARM64_INS_FCMEQ: fcmeq.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMEQv2i32rz, ARM64_INS_FCMEQ: fcmeq.2s $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMEQv2i64rz, ARM64_INS_FCMEQ: fcmeq.2d $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMEQv4f32, ARM64_INS_FCMEQ: fcmeq.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMEQv4i32rz, ARM64_INS_FCMEQ: fcmeq.4s $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGE32, ARM64_INS_FCMGE: fcmge $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGE64, ARM64_INS_FCMGE: fcmge $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGEv1i32rz, ARM64_INS_FCMGE: fcmge $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGEv1i64rz, ARM64_INS_FCMGE: fcmge $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGEv2f32, ARM64_INS_FCMGE: fcmge.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGEv2f64, ARM64_INS_FCMGE: fcmge.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGEv2i32rz, ARM64_INS_FCMGE: fcmge.2s $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGEv2i64rz, ARM64_INS_FCMGE: fcmge.2d $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGEv4f32, ARM64_INS_FCMGE: fcmge.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGEv4i32rz, ARM64_INS_FCMGE: fcmge.4s $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGT32, ARM64_INS_FCMGT: fcmgt $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGT64, ARM64_INS_FCMGT: fcmgt $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGTv1i32rz, ARM64_INS_FCMGT: fcmgt $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGTv1i64rz, ARM64_INS_FCMGT: fcmgt $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGTv2f32, ARM64_INS_FCMGT: fcmgt.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGTv2f64, ARM64_INS_FCMGT: fcmgt.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGTv2i32rz, ARM64_INS_FCMGT: fcmgt.2s $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGTv2i64rz, ARM64_INS_FCMGT: fcmgt.2d $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGTv4f32, ARM64_INS_FCMGT: fcmgt.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMGTv4i32rz, ARM64_INS_FCMGT: fcmgt.4s $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMLEv1i32rz, ARM64_INS_FCMLE: fcmle $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMLEv1i64rz, ARM64_INS_FCMLE: fcmle $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMLEv2i32rz, ARM64_INS_FCMLE: fcmle.2s $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMLEv2i64rz, ARM64_INS_FCMLE: fcmle.2d $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMLEv4i32rz, ARM64_INS_FCMLE: fcmle.4s $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMLTv1i32rz, ARM64_INS_FCMLT: fcmlt $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMLTv1i64rz, ARM64_INS_FCMLT: fcmlt $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMLTv2i32rz, ARM64_INS_FCMLT: fcmlt.2s $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMLTv2i64rz, ARM64_INS_FCMLT: fcmlt.2d $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMLTv4i32rz, ARM64_INS_FCMLT: fcmlt.4s $rd, $rn, #0.0 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMPDri, ARM64_INS_FCMP: fcmp $rn, #0.0 */
- 0,
- { CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMPDrr, ARM64_INS_FCMP: fcmp $rn, $rm */
- 0,
- { CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMPEDri, ARM64_INS_FCMPE: fcmpe $rn, #0.0 */
- 0,
- { CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMPEDrr, ARM64_INS_FCMPE: fcmpe $rn, $rm */
- 0,
- { CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMPESri, ARM64_INS_FCMPE: fcmpe $rn, #0.0 */
- 0,
- { CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMPESrr, ARM64_INS_FCMPE: fcmpe $rn, $rm */
- 0,
- { CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMPSri, ARM64_INS_FCMP: fcmp $rn, #0.0 */
- 0,
- { CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCMPSrr, ARM64_INS_FCMP: fcmp $rn, $rm */
- 0,
- { CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCSELDrrr, ARM64_INS_FCSEL: fcsel $rd, $rn, $rm, $cond */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCSELSrrr, ARM64_INS_FCSEL: fcsel $rd, $rn, $rm, $cond */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTASUWDr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTASUWSr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTASUXDr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTASUXSr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTASv1i32, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTASv1i64, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTASv2f32, ARM64_INS_FCVTAS: fcvtas.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTASv2f64, ARM64_INS_FCVTAS: fcvtas.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTASv4f32, ARM64_INS_FCVTAS: fcvtas.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTAUUWDr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTAUUWSr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTAUUXDr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTAUUXSr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTAUv1i32, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTAUv1i64, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTAUv2f32, ARM64_INS_FCVTAU: fcvtau.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTAUv2f64, ARM64_INS_FCVTAU: fcvtau.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTAUv4f32, ARM64_INS_FCVTAU: fcvtau.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTDHr, ARM64_INS_FCVT: fcvt $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTDSr, ARM64_INS_FCVT: fcvt $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTHDr, ARM64_INS_FCVT: fcvt $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTHSr, ARM64_INS_FCVT: fcvt $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTLv2i32, ARM64_INS_FCVTL: fcvtl $rd.2d, $rn.2s */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTLv4i16, ARM64_INS_FCVTL: fcvtl $rd.4s, $rn.4h */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTLv4i32, ARM64_INS_FCVTL2: fcvtl2 $rd.2d, $rn.4s */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTLv8i16, ARM64_INS_FCVTL2: fcvtl2 $rd.4s, $rn.8h */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMSUWDr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMSUWSr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMSUXDr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMSUXSr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMSv1i32, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMSv1i64, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMSv2f32, ARM64_INS_FCVTMS: fcvtms.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMSv2f64, ARM64_INS_FCVTMS: fcvtms.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMSv4f32, ARM64_INS_FCVTMS: fcvtms.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMUUWDr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMUUWSr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMUUXDr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMUUXSr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMUv1i32, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMUv1i64, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMUv2f32, ARM64_INS_FCVTMU: fcvtmu.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMUv2f64, ARM64_INS_FCVTMU: fcvtmu.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTMUv4f32, ARM64_INS_FCVTMU: fcvtmu.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNSUWDr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNSUWSr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNSUXDr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNSUXSr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNSv1i32, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNSv1i64, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNSv2f32, ARM64_INS_FCVTNS: fcvtns.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNSv2f64, ARM64_INS_FCVTNS: fcvtns.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNSv4f32, ARM64_INS_FCVTNS: fcvtns.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNUUWDr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNUUWSr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNUUXDr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNUUXSr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNUv1i32, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNUv1i64, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNUv2f32, ARM64_INS_FCVTNU: fcvtnu.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNUv2f64, ARM64_INS_FCVTNU: fcvtnu.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNUv4f32, ARM64_INS_FCVTNU: fcvtnu.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNv2i32, ARM64_INS_FCVTN: fcvtn $rd.2s, $rn.2d */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNv4i16, ARM64_INS_FCVTN: fcvtn $rd.4h, $rn.4s */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNv4i32, ARM64_INS_FCVTN2: fcvtn2 $rd.4s, $rn.2d */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTNv8i16, ARM64_INS_FCVTN2: fcvtn2 $rd.8h, $rn.4s */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPSUWDr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPSUWSr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPSUXDr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPSUXSr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPSv1i32, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPSv1i64, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPSv2f32, ARM64_INS_FCVTPS: fcvtps.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPSv2f64, ARM64_INS_FCVTPS: fcvtps.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPSv4f32, ARM64_INS_FCVTPS: fcvtps.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPUUWDr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPUUWSr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPUUXDr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPUUXSr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPUv1i32, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPUv1i64, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPUv2f32, ARM64_INS_FCVTPU: fcvtpu.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPUv2f64, ARM64_INS_FCVTPU: fcvtpu.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTPUv4f32, ARM64_INS_FCVTPU: fcvtpu.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTSDr, ARM64_INS_FCVT: fcvt $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTSHr, ARM64_INS_FCVT: fcvt $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTXNv1i64, ARM64_INS_FCVTXN: fcvtxn $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTXNv2f32, ARM64_INS_FCVTXN: fcvtxn $rd.2s, $rn.2d */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTXNv4f32, ARM64_INS_FCVTXN2: fcvtxn2 $rd.4s, $rn.2d */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSSWDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSSWSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSSXDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSSXSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSUWDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSUWSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSUXDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSUXSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZS_IntSWDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZS_IntSWSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZS_IntSXDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZS_IntSXSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZS_IntUWDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZS_IntUWSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZS_IntUXDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZS_IntUXSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZS_Intv2f32, ARM64_INS_FCVTZS: fcvtzs.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZS_Intv2f64, ARM64_INS_FCVTZS: fcvtzs.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZS_Intv4f32, ARM64_INS_FCVTZS: fcvtzs.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSd, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSs, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSv1i32, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSv1i64, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSv2f32, ARM64_INS_FCVTZS: fcvtzs.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSv2f64, ARM64_INS_FCVTZS: fcvtzs.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSv2i32_shift, ARM64_INS_FCVTZS: fcvtzs.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSv2i64_shift, ARM64_INS_FCVTZS: fcvtzs.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSv4f32, ARM64_INS_FCVTZS: fcvtzs.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZSv4i32_shift, ARM64_INS_FCVTZS: fcvtzs.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUSWDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUSWSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUSXDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUSXSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUUWDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUUWSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUUXDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUUXSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZU_IntSWDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZU_IntSWSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZU_IntSXDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZU_IntSXSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZU_IntUWDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZU_IntUWSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZU_IntUXDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZU_IntUXSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZU_Intv2f32, ARM64_INS_FCVTZU: fcvtzu.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZU_Intv2f64, ARM64_INS_FCVTZU: fcvtzu.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZU_Intv4f32, ARM64_INS_FCVTZU: fcvtzu.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUd, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUs, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUv1i32, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUv1i64, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUv2f32, ARM64_INS_FCVTZU: fcvtzu.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUv2f64, ARM64_INS_FCVTZU: fcvtzu.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUv2i32_shift, ARM64_INS_FCVTZU: fcvtzu.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUv2i64_shift, ARM64_INS_FCVTZU: fcvtzu.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUv4f32, ARM64_INS_FCVTZU: fcvtzu.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FCVTZUv4i32_shift, ARM64_INS_FCVTZU: fcvtzu.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FDIVDrr, ARM64_INS_FDIV: fdiv $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FDIVSrr, ARM64_INS_FDIV: fdiv $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FDIVv2f32, ARM64_INS_FDIV: fdiv.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FDIVv2f64, ARM64_INS_FDIV: fdiv.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FDIVv4f32, ARM64_INS_FDIV: fdiv.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMADDDrrr, ARM64_INS_FMADD: fmadd $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMADDSrrr, ARM64_INS_FMADD: fmadd $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXDrr, ARM64_INS_FMAX: fmax $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXNMDrr, ARM64_INS_FMAXNM: fmaxnm $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXNMPv2f32, ARM64_INS_FMAXNMP: fmaxnmp.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXNMPv2f64, ARM64_INS_FMAXNMP: fmaxnmp.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXNMPv2i32p, ARM64_INS_FMAXNMP: fmaxnmp.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXNMPv2i64p, ARM64_INS_FMAXNMP: fmaxnmp.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXNMPv4f32, ARM64_INS_FMAXNMP: fmaxnmp.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXNMSrr, ARM64_INS_FMAXNM: fmaxnm $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXNMVv4i32v, ARM64_INS_FMAXNMV: fmaxnmv.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXNMv2f32, ARM64_INS_FMAXNM: fmaxnm.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXNMv2f64, ARM64_INS_FMAXNM: fmaxnm.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXNMv4f32, ARM64_INS_FMAXNM: fmaxnm.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXPv2f32, ARM64_INS_FMAXP: fmaxp.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXPv2f64, ARM64_INS_FMAXP: fmaxp.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXPv2i32p, ARM64_INS_FMAXP: fmaxp.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXPv2i64p, ARM64_INS_FMAXP: fmaxp.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXPv4f32, ARM64_INS_FMAXP: fmaxp.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXSrr, ARM64_INS_FMAX: fmax $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXVv4i32v, ARM64_INS_FMAXV: fmaxv.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXv2f32, ARM64_INS_FMAX: fmax.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXv2f64, ARM64_INS_FMAX: fmax.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMAXv4f32, ARM64_INS_FMAX: fmax.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINDrr, ARM64_INS_FMIN: fmin $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINNMDrr, ARM64_INS_FMINNM: fminnm $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINNMPv2f32, ARM64_INS_FMINNMP: fminnmp.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINNMPv2f64, ARM64_INS_FMINNMP: fminnmp.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINNMPv2i32p, ARM64_INS_FMINNMP: fminnmp.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINNMPv2i64p, ARM64_INS_FMINNMP: fminnmp.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINNMPv4f32, ARM64_INS_FMINNMP: fminnmp.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINNMSrr, ARM64_INS_FMINNM: fminnm $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINNMVv4i32v, ARM64_INS_FMINNMV: fminnmv.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINNMv2f32, ARM64_INS_FMINNM: fminnm.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINNMv2f64, ARM64_INS_FMINNM: fminnm.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINNMv4f32, ARM64_INS_FMINNM: fminnm.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINPv2f32, ARM64_INS_FMINP: fminp.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINPv2f64, ARM64_INS_FMINP: fminp.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINPv2i32p, ARM64_INS_FMINP: fminp.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINPv2i64p, ARM64_INS_FMINP: fminp.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINPv4f32, ARM64_INS_FMINP: fminp.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINSrr, ARM64_INS_FMIN: fmin $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINVv4i32v, ARM64_INS_FMINV: fminv.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINv2f32, ARM64_INS_FMIN: fmin.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINv2f64, ARM64_INS_FMIN: fmin.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMINv4f32, ARM64_INS_FMIN: fmin.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLAv1i32_indexed, ARM64_INS_FMLA: fmla.s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLAv1i64_indexed, ARM64_INS_FMLA: fmla.d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLAv2f32, ARM64_INS_FMLA: fmla.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLAv2f64, ARM64_INS_FMLA: fmla.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLAv2i32_indexed, ARM64_INS_FMLA: fmla.2s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLAv2i64_indexed, ARM64_INS_FMLA: fmla.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLAv4f32, ARM64_INS_FMLA: fmla.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLAv4i32_indexed, ARM64_INS_FMLA: fmla.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLSv1i32_indexed, ARM64_INS_FMLS: fmls.s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLSv1i64_indexed, ARM64_INS_FMLS: fmls.d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLSv2f32, ARM64_INS_FMLS: fmls.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLSv2f64, ARM64_INS_FMLS: fmls.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLSv2i32_indexed, ARM64_INS_FMLS: fmls.2s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLSv2i64_indexed, ARM64_INS_FMLS: fmls.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLSv4f32, ARM64_INS_FMLS: fmls.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMLSv4i32_indexed, ARM64_INS_FMLS: fmls.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMOVDXHighr, ARM64_INS_FMOV: fmov.d $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMOVDXr, ARM64_INS_FMOV: fmov $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMOVDi, ARM64_INS_FMOV: fmov $rd, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMOVDr, ARM64_INS_FMOV: fmov $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMOVSWr, ARM64_INS_FMOV: fmov $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMOVSi, ARM64_INS_FMOV: fmov $rd, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMOVSr, ARM64_INS_FMOV: fmov $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMOVWSr, ARM64_INS_FMOV: fmov $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMOVXDHighr, ARM64_INS_FMOV: fmov.d $rd$idx, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMOVXDr, ARM64_INS_FMOV: fmov $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FMOVv2f32_ns, ARM64_INS_FMOV: fmov.2s $rd, $imm8 */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ,0 }
- },
- { /* AArch64_FMOVv2f64_ns, ARM64_INS_FMOV: fmov.2d $rd, $imm8 */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ,0 }
- },
- { /* AArch64_FMOVv4f32_ns, ARM64_INS_FMOV: fmov.4s $rd, $imm8 */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ,0 }
- },
- { /* AArch64_FMSUBDrrr, ARM64_INS_FMSUB: fmsub $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMSUBSrrr, ARM64_INS_FMSUB: fmsub $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULDrr, ARM64_INS_FMUL: fmul $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULSrr, ARM64_INS_FMUL: fmul $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULX32, ARM64_INS_FMULX: fmulx $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULX64, ARM64_INS_FMULX: fmulx $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULXv1i32_indexed, ARM64_INS_FMULX: fmulx.s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULXv1i64_indexed, ARM64_INS_FMULX: fmulx.d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULXv2f32, ARM64_INS_FMULX: fmulx.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULXv2f64, ARM64_INS_FMULX: fmulx.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULXv2i32_indexed, ARM64_INS_FMULX: fmulx.2s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULXv2i64_indexed, ARM64_INS_FMULX: fmulx.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULXv4f32, ARM64_INS_FMULX: fmulx.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULXv4i32_indexed, ARM64_INS_FMULX: fmulx.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULv1i32_indexed, ARM64_INS_FMUL: fmul.s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULv1i64_indexed, ARM64_INS_FMUL: fmul.d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULv2f32, ARM64_INS_FMUL: fmul.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULv2f64, ARM64_INS_FMUL: fmul.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULv2i32_indexed, ARM64_INS_FMUL: fmul.2s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULv2i64_indexed, ARM64_INS_FMUL: fmul.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULv4f32, ARM64_INS_FMUL: fmul.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FMULv4i32_indexed, ARM64_INS_FMUL: fmul.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FNEGDr, ARM64_INS_FNEG: fneg $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FNEGSr, ARM64_INS_FNEG: fneg $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FNEGv2f32, ARM64_INS_FNEG: fneg.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FNEGv2f64, ARM64_INS_FNEG: fneg.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FNEGv4f32, ARM64_INS_FNEG: fneg.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FNMADDDrrr, ARM64_INS_FNMADD: fnmadd $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FNMADDSrrr, ARM64_INS_FNMADD: fnmadd $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FNMSUBDrrr, ARM64_INS_FNMSUB: fnmsub $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FNMSUBSrrr, ARM64_INS_FNMSUB: fnmsub $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FNMULDrr, ARM64_INS_FNMUL: fnmul $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FNMULSrr, ARM64_INS_FNMUL: fnmul $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FRECPEv1i32, ARM64_INS_FRECPE: frecpe $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRECPEv1i64, ARM64_INS_FRECPE: frecpe $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRECPEv2f32, ARM64_INS_FRECPE: frecpe.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRECPEv2f64, ARM64_INS_FRECPE: frecpe.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRECPEv4f32, ARM64_INS_FRECPE: frecpe.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRECPS32, ARM64_INS_FRECPS: frecps $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FRECPS64, ARM64_INS_FRECPS: frecps $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FRECPSv2f32, ARM64_INS_FRECPS: frecps.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FRECPSv2f64, ARM64_INS_FRECPS: frecps.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FRECPSv4f32, ARM64_INS_FRECPS: frecps.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FRECPXv1i32, ARM64_INS_FRECPX: frecpx $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRECPXv1i64, ARM64_INS_FRECPX: frecpx $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTADr, ARM64_INS_FRINTA: frinta $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTASr, ARM64_INS_FRINTA: frinta $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTAv2f32, ARM64_INS_FRINTA: frinta.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTAv2f64, ARM64_INS_FRINTA: frinta.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTAv4f32, ARM64_INS_FRINTA: frinta.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTIDr, ARM64_INS_FRINTI: frinti $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTISr, ARM64_INS_FRINTI: frinti $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTIv2f32, ARM64_INS_FRINTI: frinti.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTIv2f64, ARM64_INS_FRINTI: frinti.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTIv4f32, ARM64_INS_FRINTI: frinti.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTMDr, ARM64_INS_FRINTM: frintm $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTMSr, ARM64_INS_FRINTM: frintm $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTMv2f32, ARM64_INS_FRINTM: frintm.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTMv2f64, ARM64_INS_FRINTM: frintm.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTMv4f32, ARM64_INS_FRINTM: frintm.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTNDr, ARM64_INS_FRINTN: frintn $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTNSr, ARM64_INS_FRINTN: frintn $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTNv2f32, ARM64_INS_FRINTN: frintn.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTNv2f64, ARM64_INS_FRINTN: frintn.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTNv4f32, ARM64_INS_FRINTN: frintn.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTPDr, ARM64_INS_FRINTP: frintp $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTPSr, ARM64_INS_FRINTP: frintp $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTPv2f32, ARM64_INS_FRINTP: frintp.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTPv2f64, ARM64_INS_FRINTP: frintp.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTPv4f32, ARM64_INS_FRINTP: frintp.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTXDr, ARM64_INS_FRINTX: frintx $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTXSr, ARM64_INS_FRINTX: frintx $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTXv2f32, ARM64_INS_FRINTX: frintx.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTXv2f64, ARM64_INS_FRINTX: frintx.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTXv4f32, ARM64_INS_FRINTX: frintx.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTZDr, ARM64_INS_FRINTZ: frintz $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTZSr, ARM64_INS_FRINTZ: frintz $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTZv2f32, ARM64_INS_FRINTZ: frintz.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTZv2f64, ARM64_INS_FRINTZ: frintz.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRINTZv4f32, ARM64_INS_FRINTZ: frintz.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRSQRTEv1i32, ARM64_INS_FRSQRTE: frsqrte $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRSQRTEv1i64, ARM64_INS_FRSQRTE: frsqrte $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRSQRTEv2f32, ARM64_INS_FRSQRTE: frsqrte.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRSQRTEv2f64, ARM64_INS_FRSQRTE: frsqrte.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRSQRTEv4f32, ARM64_INS_FRSQRTE: frsqrte.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FRSQRTS32, ARM64_INS_FRSQRTS: frsqrts $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FRSQRTS64, ARM64_INS_FRSQRTS: frsqrts $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FRSQRTSv2f32, ARM64_INS_FRSQRTS: frsqrts.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FRSQRTSv2f64, ARM64_INS_FRSQRTS: frsqrts.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FRSQRTSv4f32, ARM64_INS_FRSQRTS: frsqrts.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FSQRTDr, ARM64_INS_FSQRT: fsqrt $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FSQRTSr, ARM64_INS_FSQRT: fsqrt $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FSQRTv2f32, ARM64_INS_FSQRT: fsqrt.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FSQRTv2f64, ARM64_INS_FSQRT: fsqrt.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FSQRTv4f32, ARM64_INS_FSQRT: fsqrt.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_FSUBDrr, ARM64_INS_FSUB: fsub $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FSUBSrr, ARM64_INS_FSUB: fsub $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FSUBv2f32, ARM64_INS_FSUB: fsub.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FSUBv2f64, ARM64_INS_FSUB: fsub.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_FSUBv4f32, ARM64_INS_FSUB: fsub.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_HINT, ARM64_INS_HINT: hint $imm */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_HLT, ARM64_INS_HLT: hlt $imm */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_HVC, ARM64_INS_HVC: hvc $imm */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_INSvi16gpr, ARM64_INS_INS: ins.h $rd$idx, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_INSvi16lane, ARM64_INS_INS: ins.h $rd$idx, $rn$idx2 */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_INSvi32gpr, ARM64_INS_INS: ins.s $rd$idx, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_INSvi32lane, ARM64_INS_INS: ins.s $rd$idx, $rn$idx2 */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_INSvi64gpr, ARM64_INS_INS: ins.d $rd$idx, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_INSvi64lane, ARM64_INS_INS: ins.d $rd$idx, $rn$idx2 */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_INSvi8gpr, ARM64_INS_INS: ins.b $rd$idx, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_INSvi8lane, ARM64_INS_INS: ins.b $rd$idx, $rn$idx2 */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ISB, ARM64_INS_ISB: isb $crm */
- 0,
- { 0 }
- },
- { /* AArch64_LD1Fourv16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Fourv16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Fourv1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Fourv1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Fourv2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Fourv2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Fourv2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Fourv2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Fourv4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Fourv4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Fourv4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Fourv4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Fourv8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Fourv8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Fourv8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Fourv8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Onev16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Onev16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Onev1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Onev1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Onev2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Onev2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ0 }
- },
- { /* AArch64_LD1Onev2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Onev2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Onev4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Onev4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Onev4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Onev4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Onev8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Onev8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Onev8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Onev8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv16b, ARM64_INS_LD1R: ld1r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv16b_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv1d, ARM64_INS_LD1R: ld1r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv1d_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv2d, ARM64_INS_LD1R: ld1r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv2d_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv2s, ARM64_INS_LD1R: ld1r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv2s_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv4h, ARM64_INS_LD1R: ld1r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv4h_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv4s, ARM64_INS_LD1R: ld1r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv4s_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv8b, ARM64_INS_LD1R: ld1r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv8b_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv8h, ARM64_INS_LD1R: ld1r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Rv8h_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Threev8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1Twov8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1i16, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1i16_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1i32, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1i32_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1i64, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1i64_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD1i8, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD1i8_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv16b, ARM64_INS_LD2R: ld2r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv16b_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv1d, ARM64_INS_LD2R: ld2r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv1d_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv2d, ARM64_INS_LD2R: ld2r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv2d_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv2s, ARM64_INS_LD2R: ld2r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv2s_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv4h, ARM64_INS_LD2R: ld2r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv4h_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv4s, ARM64_INS_LD2R: ld2r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv4s_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv8b, ARM64_INS_LD2R: ld2r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv8b_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv8h, ARM64_INS_LD2R: ld2r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Rv8h_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD2Twov16b, ARM64_INS_LD2: ld2 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
- },
- { /* AArch64_LD2Twov16b_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LD2Twov2d, ARM64_INS_LD2: ld2 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
- },
- { /* AArch64_LD2Twov2d_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LD2Twov2s, ARM64_INS_LD2: ld2 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
- },
- { /* AArch64_LD2Twov2s_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LD2Twov4h, ARM64_INS_LD2: ld2 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
- },
- { /* AArch64_LD2Twov4h_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LD2Twov4s, ARM64_INS_LD2: ld2 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
- },
- { /* AArch64_LD2Twov4s_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LD2Twov8b, ARM64_INS_LD2: ld2 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
- },
- { /* AArch64_LD2Twov8b_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LD2Twov8h, ARM64_INS_LD2: ld2 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
- },
- { /* AArch64_LD2Twov8h_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LD2i16, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
- },
- { /* AArch64_LD2i16_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LD2i32, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
- },
- { /* AArch64_LD2i32_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LD2i64, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
- },
- { /* AArch64_LD2i64_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LD2i8, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
- },
- { /* AArch64_LD2i8_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LD3Rv16b, ARM64_INS_LD3R: ld3r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Rv16b_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Rv1d, ARM64_INS_LD3R: ld3r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Rv1d_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Rv2d, ARM64_INS_LD3R: ld3r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Rv2d_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Rv2s, ARM64_INS_LD3R: ld3r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Rv2s_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Rv4h, ARM64_INS_LD3R: ld3r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Rv4h_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Rv4s, ARM64_INS_LD3R: ld3r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Rv4s_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Rv8b, ARM64_INS_LD3R: ld3r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Rv8b_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Rv8h, ARM64_INS_LD3R: ld3r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Rv8h_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Threev16b, ARM64_INS_LD3: ld3 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Threev16b_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Threev2d, ARM64_INS_LD3: ld3 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Threev2d_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Threev2s, ARM64_INS_LD3: ld3 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Threev2s_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Threev4h, ARM64_INS_LD3: ld3 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Threev4h_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Threev4s, ARM64_INS_LD3: ld3 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Threev4s_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Threev8b, ARM64_INS_LD3: ld3 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Threev8b_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Threev8h, ARM64_INS_LD3: ld3 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3Threev8h_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3i16, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3i16_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3i32, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3i32_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3i64, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3i64_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD3i8, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD3i8_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Fourv16b, ARM64_INS_LD4: ld4 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Fourv16b_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Fourv2d, ARM64_INS_LD4: ld4 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Fourv2d_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Fourv2s, ARM64_INS_LD4: ld4 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Fourv2s_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Fourv4h, ARM64_INS_LD4: ld4 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Fourv4h_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Fourv4s, ARM64_INS_LD4: ld4 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Fourv4s_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Fourv8b, ARM64_INS_LD4: ld4 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Fourv8b_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Fourv8h, ARM64_INS_LD4: ld4 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Fourv8h_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv16b, ARM64_INS_LD4R: ld4r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv16b_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv1d, ARM64_INS_LD4R: ld4r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv1d_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv2d, ARM64_INS_LD4R: ld4r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv2d_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv2s, ARM64_INS_LD4R: ld4r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv2s_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv4h, ARM64_INS_LD4R: ld4r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv4h_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv4s, ARM64_INS_LD4R: ld4r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv4s_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv8b, ARM64_INS_LD4R: ld4r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv8b_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv8h, ARM64_INS_LD4R: ld4r $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4Rv8h_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4i16, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4i16_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4i32, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4i32_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4i64, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4i64_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LD4i8, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_LD4i8_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDARB, ARM64_INS_LDARB: ldarb $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDARH, ARM64_INS_LDARH: ldarh $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDARW, ARM64_INS_LDAR: ldar $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDARX, ARM64_INS_LDAR: ldar $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDAXPW, ARM64_INS_LDAXP: ldaxp $rt, $rt2, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDAXPX, ARM64_INS_LDAXP: ldaxp $rt, $rt2, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDAXRB, ARM64_INS_LDAXRB: ldaxrb $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDAXRH, ARM64_INS_LDAXRH: ldaxrh $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDAXRW, ARM64_INS_LDAXR: ldaxr $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDAXRX, ARM64_INS_LDAXR: ldaxr $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDNPDi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDNPQi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDNPSi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDNPWi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDNPXi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPDi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPDpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPDpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPQi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPQpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPQpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPSWi, ARM64_INS_LDPSW: ldpsw $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPSWpost, ARM64_INS_LDPSW: ldpsw $rt, $rt2, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPSWpre, ARM64_INS_LDPSW: ldpsw $rt, $rt2, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPSi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPSpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPSpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPWi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPWpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPWpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPXi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPXpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDPXpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRBBpost, ARM64_INS_LDRB: ldrb $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRBBpre, ARM64_INS_LDRB: ldrb $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRBBroW, ARM64_INS_LDRB: ldrb $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRBBroX, ARM64_INS_LDRB: ldrb $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRBBui, ARM64_INS_LDRB: ldrb $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRBpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRBpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRBroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRBroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRBui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRDl, ARM64_INS_LDR: ldr $rt, $label */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRDpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRDpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRDroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRDroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRDui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRHHpost, ARM64_INS_LDRH: ldrh $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRHHpre, ARM64_INS_LDRH: ldrh $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRHHroW, ARM64_INS_LDRH: ldrh $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRHHroX, ARM64_INS_LDRH: ldrh $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRHHui, ARM64_INS_LDRH: ldrh $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRHpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRHpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRHroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRHroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRHui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRQl, ARM64_INS_LDR: ldr $rt, $label */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRQpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRQpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRQroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRQroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRQui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSBWpost, ARM64_INS_LDRSB: ldrsb $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSBWpre, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSBWroW, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSBWroX, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSBWui, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSBXpost, ARM64_INS_LDRSB: ldrsb $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSBXpre, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSBXroW, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSBXroX, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSBXui, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSHWpost, ARM64_INS_LDRSH: ldrsh $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSHWpre, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSHWroW, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSHWroX, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSHWui, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSHXpost, ARM64_INS_LDRSH: ldrsh $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSHXpre, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSHXroW, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSHXroX, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSHXui, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSWl, ARM64_INS_LDRSW: ldrsw $rt, $label */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSWpost, ARM64_INS_LDRSW: ldrsw $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSWpre, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSWroW, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSWroX, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSWui, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSl, ARM64_INS_LDR: ldr $rt, $label */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRSui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRWl, ARM64_INS_LDR: ldr $rt, $label */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRWpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRWpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRWroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRWroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRWui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRXl, ARM64_INS_LDR: ldr $rt, $label */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRXpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRXpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRXroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRXroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDRXui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDTRBi, ARM64_INS_LDTRB: ldtrb $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDTRHi, ARM64_INS_LDTRH: ldtrh $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDTRSBWi, ARM64_INS_LDTRSB: ldtrsb $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDTRSBXi, ARM64_INS_LDTRSB: ldtrsb $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDTRSHWi, ARM64_INS_LDTRSH: ldtrsh $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDTRSHXi, ARM64_INS_LDTRSH: ldtrsh $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDTRSWi, ARM64_INS_LDTRSW: ldtrsw $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDTRWi, ARM64_INS_LDTR: ldtr $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDTRXi, ARM64_INS_LDTR: ldtr $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDURBBi, ARM64_INS_LDURB: ldurb $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDURBi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDURDi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDURHHi, ARM64_INS_LDURH: ldurh $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDURHi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDURQi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDURSBWi, ARM64_INS_LDURSB: ldursb $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDURSBXi, ARM64_INS_LDURSB: ldursb $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDURSHWi, ARM64_INS_LDURSH: ldursh $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDURSHXi, ARM64_INS_LDURSH: ldursh $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDURSWi, ARM64_INS_LDURSW: ldursw $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDURSi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDURWi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDURXi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_LDXPW, ARM64_INS_LDXP: ldxp $rt, $rt2, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDXPX, ARM64_INS_LDXP: ldxp $rt, $rt2, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDXRB, ARM64_INS_LDXRB: ldxrb $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDXRH, ARM64_INS_LDXRH: ldxrh $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDXRW, ARM64_INS_LDXR: ldxr $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LDXRX, ARM64_INS_LDXR: ldxr $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LSLVWr, ARM64_INS_LSL: lsl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LSLVXr, ARM64_INS_LSL: lsl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LSRVWr, ARM64_INS_LSR: lsr $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_LSRVXr, ARM64_INS_LSR: lsr $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MADDWrrr, ARM64_INS_MADD: madd $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MADDXrrr, ARM64_INS_MADD: madd $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLAv16i8, ARM64_INS_MLA: mla.16b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLAv2i32, ARM64_INS_MLA: mla.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLAv2i32_indexed, ARM64_INS_MLA: mla.2s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLAv4i16, ARM64_INS_MLA: mla.4h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLAv4i16_indexed, ARM64_INS_MLA: mla.4h $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLAv4i32, ARM64_INS_MLA: mla.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLAv4i32_indexed, ARM64_INS_MLA: mla.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLAv8i16, ARM64_INS_MLA: mla.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLAv8i16_indexed, ARM64_INS_MLA: mla.8h $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLAv8i8, ARM64_INS_MLA: mla.8b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLSv16i8, ARM64_INS_MLS: mls.16b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLSv2i32, ARM64_INS_MLS: mls.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLSv2i32_indexed, ARM64_INS_MLS: mls.2s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLSv4i16, ARM64_INS_MLS: mls.4h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLSv4i16_indexed, ARM64_INS_MLS: mls.4h $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLSv4i32, ARM64_INS_MLS: mls.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLSv4i32_indexed, ARM64_INS_MLS: mls.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLSv8i16, ARM64_INS_MLS: mls.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLSv8i16_indexed, ARM64_INS_MLS: mls.8h $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MLSv8i8, ARM64_INS_MLS: mls.8b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVID, ARM64_INS_MOVI: movi $rd, $imm8 */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVIv16b_ns, ARM64_INS_MOVI: movi.16b $rd, $imm8 */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVIv2d_ns, ARM64_INS_MOVI: movi.2d $rd, $imm8 */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVIv2i32, ARM64_INS_MOVI: movi.2s $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVIv2s_msl, ARM64_INS_MOVI: movi.2s $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVIv4i16, ARM64_INS_MOVI: movi.4h $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVIv4i32, ARM64_INS_MOVI: movi.4s $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVIv4s_msl, ARM64_INS_MOVI: movi.4s $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVIv8b_ns, ARM64_INS_MOVI: movi.8b $rd, $imm8 */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVIv8i16, ARM64_INS_MOVI: movi.8h $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVKWi, ARM64_INS_MOVK: movk $rd, $imm$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVKXi, ARM64_INS_MOVK: movk $rd, $imm$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVNWi, ARM64_INS_MOVN: movn $rd, $imm$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVNXi, ARM64_INS_MOVN: movn $rd, $imm$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVZWi, ARM64_INS_MOVZ: movz $rd, $imm$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MOVZXi, ARM64_INS_MOVZ: movz $rd, $imm$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MRS, ARM64_INS_MRS: mrs $rt, $systemreg */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_MSR, ARM64_INS_MSR: msr $systemreg, $rt */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_MSRpstate, ARM64_INS_MSR: msr $pstate_field, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MSUBWrrr, ARM64_INS_MSUB: msub $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MSUBXrrr, ARM64_INS_MSUB: msub $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MULv16i8, ARM64_INS_MUL: mul.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MULv2i32, ARM64_INS_MUL: mul.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MULv2i32_indexed, ARM64_INS_MUL: mul.2s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MULv4i16, ARM64_INS_MUL: mul.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MULv4i16_indexed, ARM64_INS_MUL: mul.4h $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MULv4i32, ARM64_INS_MUL: mul.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MULv4i32_indexed, ARM64_INS_MUL: mul.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MULv8i16, ARM64_INS_MUL: mul.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MULv8i16_indexed, ARM64_INS_MUL: mul.8h $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MULv8i8, ARM64_INS_MUL: mul.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MVNIv2i32, ARM64_INS_MVNI: mvni.2s $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MVNIv2s_msl, ARM64_INS_MVNI: mvni.2s $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MVNIv4i16, ARM64_INS_MVNI: mvni.4h $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MVNIv4i32, ARM64_INS_MVNI: mvni.4s $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MVNIv4s_msl, ARM64_INS_MVNI: mvni.4s $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_MVNIv8i16, ARM64_INS_MVNI: mvni.8h $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_NEGv16i8, ARM64_INS_NEG: neg.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_NEGv1i64, ARM64_INS_NEG: neg $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_NEGv2i32, ARM64_INS_NEG: neg.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_NEGv2i64, ARM64_INS_NEG: neg.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_NEGv4i16, ARM64_INS_NEG: neg.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_NEGv4i32, ARM64_INS_NEG: neg.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_NEGv8i16, ARM64_INS_NEG: neg.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_NEGv8i8, ARM64_INS_NEG: neg.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_NOTv16i8, ARM64_INS_NOT: not.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_NOTv8i8, ARM64_INS_NOT: not.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ORNWrs, ARM64_INS_ORN: orn $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ORNXrs, ARM64_INS_ORN: orn $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ORNv16i8, ARM64_INS_ORN: orn.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ORNv8i8, ARM64_INS_ORN: orn.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ORRWri, ARM64_INS_ORR: orr $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, , CS_AC_READ, 0 }
- },
- { /* AArch64_ORRWrs, ARM64_INS_ORR: orr $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ORRXri, ARM64_INS_ORR: orr $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, , CS_AC_READ, 0 }
- },
- { /* AArch64_ORRXrs, ARM64_INS_ORR: orr $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ORRv16i8, ARM64_INS_ORR: orr.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ORRv2i32, ARM64_INS_ORR: orr.2s $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ORRv4i16, ARM64_INS_ORR: orr.4h $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ORRv4i32, ARM64_INS_ORR: orr.4s $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ORRv8i16, ARM64_INS_ORR: orr.8h $rd, $imm8$shift */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ORRv8i8, ARM64_INS_ORR: orr.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_PMULLv16i8, ARM64_INS_PMULL2: pmull2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_PMULLv1i64, ARM64_INS_PMULL: pmull.1q $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_PMULLv2i64, ARM64_INS_PMULL2: pmull2.1q $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_PMULLv8i8, ARM64_INS_PMULL: pmull.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_PMULv16i8, ARM64_INS_PMUL: pmul.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_PMULv8i8, ARM64_INS_PMUL: pmul.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_PRFMl, ARM64_INS_PRFM: prfm $rt, $label */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_PRFMroW, ARM64_INS_PRFM: prfm $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_PRFMroX, ARM64_INS_PRFM: prfm $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_PRFMui, ARM64_INS_PRFM: prfm $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_PRFUMi, ARM64_INS_PRFUM: prfum $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_RADDHNv2i64_v2i32, ARM64_INS_RADDHN: raddhn.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RADDHNv2i64_v4i32, ARM64_INS_RADDHN2: raddhn2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RADDHNv4i32_v4i16, ARM64_INS_RADDHN: raddhn.4h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RADDHNv4i32_v8i16, ARM64_INS_RADDHN2: raddhn2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RADDHNv8i16_v16i8, ARM64_INS_RADDHN2: raddhn2.16b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RADDHNv8i16_v8i8, ARM64_INS_RADDHN: raddhn.8b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RBITWr, ARM64_INS_RBIT: rbit $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_RBITXr, ARM64_INS_RBIT: rbit $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_RBITv16i8, ARM64_INS_RBIT: rbit.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_RBITv8i8, ARM64_INS_RBIT: rbit.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_RET, ARM64_INS_RET: ret $rn */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_REV16Wr, ARM64_INS_REV16: rev16 $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REV16Xr, ARM64_INS_REV16: rev16 $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REV16v16i8, ARM64_INS_REV16: rev16.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REV16v8i8, ARM64_INS_REV16: rev16.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REV32Xr, ARM64_INS_REV32: rev32 $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REV32v16i8, ARM64_INS_REV32: rev32.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REV32v4i16, ARM64_INS_REV32: rev32.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REV32v8i16, ARM64_INS_REV32: rev32.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REV32v8i8, ARM64_INS_REV32: rev32.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REV64v16i8, ARM64_INS_REV64: rev64.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REV64v2i32, ARM64_INS_REV64: rev64.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REV64v4i16, ARM64_INS_REV64: rev64.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REV64v4i32, ARM64_INS_REV64: rev64.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REV64v8i16, ARM64_INS_REV64: rev64.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REV64v8i8, ARM64_INS_REV64: rev64.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REVWr, ARM64_INS_REV: rev $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_REVXr, ARM64_INS_REV: rev $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_RORVWr, ARM64_INS_ROR: ror $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RORVXr, ARM64_INS_ROR: ror $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RSHRNv16i8_shift, ARM64_INS_RSHRN2: rshrn2.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RSHRNv2i32_shift, ARM64_INS_RSHRN: rshrn.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RSHRNv4i16_shift, ARM64_INS_RSHRN: rshrn.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RSHRNv4i32_shift, ARM64_INS_RSHRN2: rshrn2.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RSHRNv8i16_shift, ARM64_INS_RSHRN2: rshrn2.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RSHRNv8i8_shift, ARM64_INS_RSHRN: rshrn.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RSUBHNv2i64_v2i32, ARM64_INS_RSUBHN: rsubhn.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RSUBHNv2i64_v4i32, ARM64_INS_RSUBHN2: rsubhn2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RSUBHNv4i32_v4i16, ARM64_INS_RSUBHN: rsubhn.4h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RSUBHNv4i32_v8i16, ARM64_INS_RSUBHN2: rsubhn2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RSUBHNv8i16_v16i8, ARM64_INS_RSUBHN2: rsubhn2.16b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_RSUBHNv8i16_v8i8, ARM64_INS_RSUBHN: rsubhn.8b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABALv16i8_v8i16, ARM64_INS_SABAL2: sabal2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABALv2i32_v2i64, ARM64_INS_SABAL: sabal.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABALv4i16_v4i32, ARM64_INS_SABAL: sabal.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABALv4i32_v2i64, ARM64_INS_SABAL2: sabal2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABALv8i16_v4i32, ARM64_INS_SABAL2: sabal2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABALv8i8_v8i16, ARM64_INS_SABAL: sabal.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABAv16i8, ARM64_INS_SABA: saba.16b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABAv2i32, ARM64_INS_SABA: saba.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABAv4i16, ARM64_INS_SABA: saba.4h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABAv4i32, ARM64_INS_SABA: saba.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABAv8i16, ARM64_INS_SABA: saba.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABAv8i8, ARM64_INS_SABA: saba.8b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABDLv16i8_v8i16, ARM64_INS_SABDL2: sabdl2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABDLv2i32_v2i64, ARM64_INS_SABDL: sabdl.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABDLv4i16_v4i32, ARM64_INS_SABDL: sabdl.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABDLv4i32_v2i64, ARM64_INS_SABDL2: sabdl2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABDLv8i16_v4i32, ARM64_INS_SABDL2: sabdl2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABDLv8i8_v8i16, ARM64_INS_SABDL: sabdl.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABDv16i8, ARM64_INS_SABD: sabd.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABDv2i32, ARM64_INS_SABD: sabd.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABDv4i16, ARM64_INS_SABD: sabd.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABDv4i32, ARM64_INS_SABD: sabd.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABDv8i16, ARM64_INS_SABD: sabd.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SABDv8i8, ARM64_INS_SABD: sabd.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADALPv16i8_v8i16, ARM64_INS_SADALP: sadalp.8h $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADALPv2i32_v1i64, ARM64_INS_SADALP: sadalp.1d $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADALPv4i16_v2i32, ARM64_INS_SADALP: sadalp.2s $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADALPv4i32_v2i64, ARM64_INS_SADALP: sadalp.2d $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADALPv8i16_v4i32, ARM64_INS_SADALP: sadalp.4s $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADALPv8i8_v4i16, ARM64_INS_SADALP: sadalp.4h $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLPv16i8_v8i16, ARM64_INS_SADDLP: saddlp.8h $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLPv2i32_v1i64, ARM64_INS_SADDLP: saddlp.1d $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLPv4i16_v2i32, ARM64_INS_SADDLP: saddlp.2s $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLPv4i32_v2i64, ARM64_INS_SADDLP: saddlp.2d $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLPv8i16_v4i32, ARM64_INS_SADDLP: saddlp.4s $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLPv8i8_v4i16, ARM64_INS_SADDLP: saddlp.4h $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLVv16i8v, ARM64_INS_SADDLV: saddlv.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLVv4i16v, ARM64_INS_SADDLV: saddlv.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLVv4i32v, ARM64_INS_SADDLV: saddlv.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLVv8i16v, ARM64_INS_SADDLV: saddlv.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLVv8i8v, ARM64_INS_SADDLV: saddlv.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLv16i8_v8i16, ARM64_INS_SADDL2: saddl2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLv2i32_v2i64, ARM64_INS_SADDL: saddl.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLv4i16_v4i32, ARM64_INS_SADDL: saddl.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLv4i32_v2i64, ARM64_INS_SADDL2: saddl2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLv8i16_v4i32, ARM64_INS_SADDL2: saddl2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDLv8i8_v8i16, ARM64_INS_SADDL: saddl.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDWv16i8_v8i16, ARM64_INS_SADDW2: saddw2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDWv2i32_v2i64, ARM64_INS_SADDW: saddw.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDWv4i16_v4i32, ARM64_INS_SADDW: saddw.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDWv4i32_v2i64, ARM64_INS_SADDW2: saddw2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDWv8i16_v4i32, ARM64_INS_SADDW2: saddw2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SADDWv8i8_v8i16, ARM64_INS_SADDW: saddw.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SBCSWr, ARM64_INS_SBCS: sbcs $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SBCSXr, ARM64_INS_SBCS: sbcs $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SBCWr, ARM64_INS_SBC: sbc $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SBCXr, ARM64_INS_SBC: sbc $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SBFMWri, ARM64_INS_SBFM: sbfm $rd, $rn, $immr, $imms */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SBFMXri, ARM64_INS_SBFM: sbfm $rd, $rn, $immr, $imms */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SCVTFSWDri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFSWSri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFSXDri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFSXSri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFUWDri, ARM64_INS_SCVTF: scvtf $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFUWSri, ARM64_INS_SCVTF: scvtf $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFUXDri, ARM64_INS_SCVTF: scvtf $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFUXSri, ARM64_INS_SCVTF: scvtf $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFd, ARM64_INS_SCVTF: scvtf $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFs, ARM64_INS_SCVTF: scvtf $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFv1i32, ARM64_INS_SCVTF: scvtf $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFv1i64, ARM64_INS_SCVTF: scvtf $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFv2f32, ARM64_INS_SCVTF: scvtf.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFv2f64, ARM64_INS_SCVTF: scvtf.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFv2i32_shift, ARM64_INS_SCVTF: scvtf.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFv2i64_shift, ARM64_INS_SCVTF: scvtf.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFv4f32, ARM64_INS_SCVTF: scvtf.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0}
- },
- { /* AArch64_SCVTFv4i32_shift, ARM64_INS_SCVTF: scvtf.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SDIVWr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SDIVXr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SDIV_IntWr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SDIV_IntXr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHA1Crrr, ARM64_INS_SHA1C: sha1c.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SHA1Hrr, ARM64_INS_SHA1H: sha1h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SHA1Mrrr, ARM64_INS_SHA1M: sha1m.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SHA1Prrr, ARM64_INS_SHA1P: sha1p.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SHA1SU0rrr, ARM64_INS_SHA1SU0: sha1su0.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SHA1SU1rr, ARM64_INS_SHA1SU1: sha1su1.4s $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SHA256H2rrr, ARM64_INS_SHA256H2: sha256h2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SHA256Hrrr, ARM64_INS_SHA256H: sha256h.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SHA256SU0rr, ARM64_INS_SHA256SU0: sha256su0.4s $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SHA256SU1rrr, ARM64_INS_SHA256SU1: sha256su1.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SHADDv16i8, ARM64_INS_SHADD: shadd.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHADDv2i32, ARM64_INS_SHADD: shadd.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHADDv4i16, ARM64_INS_SHADD: shadd.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHADDv4i32, ARM64_INS_SHADD: shadd.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHADDv8i16, ARM64_INS_SHADD: shadd.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHADDv8i8, ARM64_INS_SHADD: shadd.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHLLv16i8, ARM64_INS_SHLL2: shll2.8h $rd, $rn, #8 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHLLv2i32, ARM64_INS_SHLL: shll.2d $rd, $rn, #32 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHLLv4i16, ARM64_INS_SHLL: shll.4s $rd, $rn, #16 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHLLv4i32, ARM64_INS_SHLL2: shll2.2d $rd, $rn, #32 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHLLv8i16, ARM64_INS_SHLL2: shll2.4s $rd, $rn, #16 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHLLv8i8, ARM64_INS_SHLL: shll.8h $rd, $rn, #8 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHLd, ARM64_INS_SHL: shl $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHLv16i8_shift, ARM64_INS_SHL: shl.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHLv2i32_shift, ARM64_INS_SHL: shl.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHLv2i64_shift, ARM64_INS_SHL: shl.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHLv4i16_shift, ARM64_INS_SHL: shl.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHLv4i32_shift, ARM64_INS_SHL: shl.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHLv8i16_shift, ARM64_INS_SHL: shl.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHLv8i8_shift, ARM64_INS_SHL: shl.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHRNv16i8_shift, ARM64_INS_SHRN2: shrn2.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHRNv2i32_shift, ARM64_INS_SHRN: shrn.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHRNv4i16_shift, ARM64_INS_SHRN: shrn.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHRNv4i32_shift, ARM64_INS_SHRN2: shrn2.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHRNv8i16_shift, ARM64_INS_SHRN2: shrn2.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHRNv8i8_shift, ARM64_INS_SHRN: shrn.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHSUBv16i8, ARM64_INS_SHSUB: shsub.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHSUBv2i32, ARM64_INS_SHSUB: shsub.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHSUBv4i16, ARM64_INS_SHSUB: shsub.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHSUBv4i32, ARM64_INS_SHSUB: shsub.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHSUBv8i16, ARM64_INS_SHSUB: shsub.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SHSUBv8i8, ARM64_INS_SHSUB: shsub.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SLId, ARM64_INS_SLI: sli $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SLIv16i8_shift, ARM64_INS_SLI: sli.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SLIv2i32_shift, ARM64_INS_SLI: sli.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SLIv2i64_shift, ARM64_INS_SLI: sli.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SLIv4i16_shift, ARM64_INS_SLI: sli.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SLIv4i32_shift, ARM64_INS_SLI: sli.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SLIv8i16_shift, ARM64_INS_SLI: sli.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SLIv8i8_shift, ARM64_INS_SLI: sli.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
- },
- { /* AArch64_SMADDLrrr, ARM64_INS_SMADDL: smaddl $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXPv16i8, ARM64_INS_SMAXP: smaxp.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXPv2i32, ARM64_INS_SMAXP: smaxp.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXPv4i16, ARM64_INS_SMAXP: smaxp.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXPv4i32, ARM64_INS_SMAXP: smaxp.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXPv8i16, ARM64_INS_SMAXP: smaxp.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXPv8i8, ARM64_INS_SMAXP: smaxp.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXVv16i8v, ARM64_INS_SMAXV: smaxv.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXVv4i16v, ARM64_INS_SMAXV: smaxv.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXVv4i32v, ARM64_INS_SMAXV: smaxv.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXVv8i16v, ARM64_INS_SMAXV: smaxv.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXVv8i8v, ARM64_INS_SMAXV: smaxv.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXv16i8, ARM64_INS_SMAX: smax.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXv2i32, ARM64_INS_SMAX: smax.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXv4i16, ARM64_INS_SMAX: smax.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXv4i32, ARM64_INS_SMAX: smax.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXv8i16, ARM64_INS_SMAX: smax.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMAXv8i8, ARM64_INS_SMAX: smax.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMC, ARM64_INS_SMC: smc $imm */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_SMINPv16i8, ARM64_INS_SMINP: sminp.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINPv2i32, ARM64_INS_SMINP: sminp.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINPv4i16, ARM64_INS_SMINP: sminp.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINPv4i32, ARM64_INS_SMINP: sminp.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINPv8i16, ARM64_INS_SMINP: sminp.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINPv8i8, ARM64_INS_SMINP: sminp.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINVv16i8v, ARM64_INS_SMINV: sminv.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINVv4i16v, ARM64_INS_SMINV: sminv.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINVv4i32v, ARM64_INS_SMINV: sminv.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINVv8i16v, ARM64_INS_SMINV: sminv.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINVv8i8v, ARM64_INS_SMINV: sminv.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINv16i8, ARM64_INS_SMIN: smin.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINv2i32, ARM64_INS_SMIN: smin.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINv4i16, ARM64_INS_SMIN: smin.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINv4i32, ARM64_INS_SMIN: smin.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINv8i16, ARM64_INS_SMIN: smin.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMINv8i8, ARM64_INS_SMIN: smin.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLALv16i8_v8i16, ARM64_INS_SMLAL2: smlal2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLALv2i32_indexed, ARM64_INS_SMLAL: smlal.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLALv2i32_v2i64, ARM64_INS_SMLAL: smlal.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLALv4i16_indexed, ARM64_INS_SMLAL: smlal.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLALv4i16_v4i32, ARM64_INS_SMLAL: smlal.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLALv4i32_indexed, ARM64_INS_SMLAL2: smlal2.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLALv4i32_v2i64, ARM64_INS_SMLAL2: smlal2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLALv8i16_indexed, ARM64_INS_SMLAL2: smlal2.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLALv8i16_v4i32, ARM64_INS_SMLAL2: smlal2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLALv8i8_v8i16, ARM64_INS_SMLAL: smlal.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLSLv16i8_v8i16, ARM64_INS_SMLSL2: smlsl2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLSLv2i32_indexed, ARM64_INS_SMLSL: smlsl.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLSLv2i32_v2i64, ARM64_INS_SMLSL: smlsl.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLSLv4i16_indexed, ARM64_INS_SMLSL: smlsl.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLSLv4i16_v4i32, ARM64_INS_SMLSL: smlsl.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLSLv4i32_indexed, ARM64_INS_SMLSL2: smlsl2.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLSLv4i32_v2i64, ARM64_INS_SMLSL2: smlsl2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLSLv8i16_indexed, ARM64_INS_SMLSL2: smlsl2.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLSLv8i16_v4i32, ARM64_INS_SMLSL2: smlsl2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMLSLv8i8_v8i16, ARM64_INS_SMLSL: smlsl.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMOVvi16to32, ARM64_INS_SMOV: smov.h $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMOVvi16to64, ARM64_INS_SMOV: smov.h $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMOVvi32to64, ARM64_INS_SMOV: smov.s $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMOVvi8to32, ARM64_INS_SMOV: smov.b $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMOVvi8to64, ARM64_INS_SMOV: smov.b $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMSUBLrrr, ARM64_INS_SMSUBL: smsubl $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMULHrr, ARM64_INS_SMULH: smulh $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMULLv16i8_v8i16, ARM64_INS_SMULL2: smull2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMULLv2i32_indexed, ARM64_INS_SMULL: smull.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMULLv2i32_v2i64, ARM64_INS_SMULL: smull.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMULLv4i16_indexed, ARM64_INS_SMULL: smull.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMULLv4i16_v4i32, ARM64_INS_SMULL: smull.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMULLv4i32_indexed, ARM64_INS_SMULL2: smull2.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMULLv4i32_v2i64, ARM64_INS_SMULL2: smull2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMULLv8i16_indexed, ARM64_INS_SMULL2: smull2.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMULLv8i16_v4i32, ARM64_INS_SMULL2: smull2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SMULLv8i8_v8i16, ARM64_INS_SMULL: smull.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQABSv16i8, ARM64_INS_SQABS: sqabs.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQABSv1i16, ARM64_INS_SQABS: sqabs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQABSv1i32, ARM64_INS_SQABS: sqabs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQABSv1i64, ARM64_INS_SQABS: sqabs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQABSv1i8, ARM64_INS_SQABS: sqabs $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQABSv2i32, ARM64_INS_SQABS: sqabs.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQABSv2i64, ARM64_INS_SQABS: sqabs.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQABSv4i16, ARM64_INS_SQABS: sqabs.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQABSv4i32, ARM64_INS_SQABS: sqabs.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQABSv8i16, ARM64_INS_SQABS: sqabs.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQABSv8i8, ARM64_INS_SQABS: sqabs.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQADDv16i8, ARM64_INS_SQADD: sqadd.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQADDv1i16, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQADDv1i32, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQADDv1i64, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQADDv1i8, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQADDv2i32, ARM64_INS_SQADD: sqadd.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQADDv2i64, ARM64_INS_SQADD: sqadd.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQADDv4i16, ARM64_INS_SQADD: sqadd.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQADDv4i32, ARM64_INS_SQADD: sqadd.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQADDv8i16, ARM64_INS_SQADD: sqadd.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQADDv8i8, ARM64_INS_SQADD: sqadd.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLALi16, ARM64_INS_SQDMLAL: sqdmlal $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLALi32, ARM64_INS_SQDMLAL: sqdmlal $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLALv1i32_indexed, ARM64_INS_SQDMLAL: sqdmlal.h $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLALv1i64_indexed, ARM64_INS_SQDMLAL: sqdmlal.s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLALv2i32_indexed, ARM64_INS_SQDMLAL: sqdmlal.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLALv2i32_v2i64, ARM64_INS_SQDMLAL: sqdmlal.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLALv4i16_indexed, ARM64_INS_SQDMLAL: sqdmlal.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLALv4i16_v4i32, ARM64_INS_SQDMLAL: sqdmlal.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLALv4i32_indexed, ARM64_INS_SQDMLAL2: sqdmlal2.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLALv4i32_v2i64, ARM64_INS_SQDMLAL2: sqdmlal2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLALv8i16_indexed, ARM64_INS_SQDMLAL2: sqdmlal2.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLALv8i16_v4i32, ARM64_INS_SQDMLAL2: sqdmlal2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLSLi16, ARM64_INS_SQDMLSL: sqdmlsl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLSLi32, ARM64_INS_SQDMLSL: sqdmlsl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLSLv1i32_indexed, ARM64_INS_SQDMLSL: sqdmlsl.h $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLSLv1i64_indexed, ARM64_INS_SQDMLSL: sqdmlsl.s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLSLv2i32_indexed, ARM64_INS_SQDMLSL: sqdmlsl.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLSLv2i32_v2i64, ARM64_INS_SQDMLSL: sqdmlsl.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLSLv4i16_indexed, ARM64_INS_SQDMLSL: sqdmlsl.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLSLv4i16_v4i32, ARM64_INS_SQDMLSL: sqdmlsl.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLSLv4i32_indexed, ARM64_INS_SQDMLSL2: sqdmlsl2.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLSLv4i32_v2i64, ARM64_INS_SQDMLSL2: sqdmlsl2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLSLv8i16_indexed, ARM64_INS_SQDMLSL2: sqdmlsl2.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMLSLv8i16_v4i32, ARM64_INS_SQDMLSL2: sqdmlsl2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULHv1i16, ARM64_INS_SQDMULH: sqdmulh $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULHv1i16_indexed, ARM64_INS_SQDMULH: sqdmulh.h $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULHv1i32, ARM64_INS_SQDMULH: sqdmulh $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULHv1i32_indexed, ARM64_INS_SQDMULH: sqdmulh.s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULHv2i32, ARM64_INS_SQDMULH: sqdmulh.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULHv2i32_indexed, ARM64_INS_SQDMULH: sqdmulh.2s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULHv4i16, ARM64_INS_SQDMULH: sqdmulh.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULHv4i16_indexed, ARM64_INS_SQDMULH: sqdmulh.4h $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULHv4i32, ARM64_INS_SQDMULH: sqdmulh.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULHv4i32_indexed, ARM64_INS_SQDMULH: sqdmulh.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULHv8i16, ARM64_INS_SQDMULH: sqdmulh.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULHv8i16_indexed, ARM64_INS_SQDMULH: sqdmulh.8h $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULLi16, ARM64_INS_SQDMULL: sqdmull $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULLi32, ARM64_INS_SQDMULL: sqdmull $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULLv1i32_indexed, ARM64_INS_SQDMULL: sqdmull.h $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULLv1i64_indexed, ARM64_INS_SQDMULL: sqdmull.s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULLv2i32_indexed, ARM64_INS_SQDMULL: sqdmull.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULLv2i32_v2i64, ARM64_INS_SQDMULL: sqdmull.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULLv4i16_indexed, ARM64_INS_SQDMULL: sqdmull.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULLv4i16_v4i32, ARM64_INS_SQDMULL: sqdmull.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULLv4i32_indexed, ARM64_INS_SQDMULL2: sqdmull2.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULLv4i32_v2i64, ARM64_INS_SQDMULL2: sqdmull2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULLv8i16_indexed, ARM64_INS_SQDMULL2: sqdmull2.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQDMULLv8i16_v4i32, ARM64_INS_SQDMULL2: sqdmull2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQNEGv16i8, ARM64_INS_SQNEG: sqneg.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQNEGv1i16, ARM64_INS_SQNEG: sqneg $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQNEGv1i32, ARM64_INS_SQNEG: sqneg $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQNEGv1i64, ARM64_INS_SQNEG: sqneg $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQNEGv1i8, ARM64_INS_SQNEG: sqneg $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQNEGv2i32, ARM64_INS_SQNEG: sqneg.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQNEGv2i64, ARM64_INS_SQNEG: sqneg.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQNEGv4i16, ARM64_INS_SQNEG: sqneg.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQNEGv4i32, ARM64_INS_SQNEG: sqneg.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQNEGv8i16, ARM64_INS_SQNEG: sqneg.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQNEGv8i8, ARM64_INS_SQNEG: sqneg.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRDMULHv1i16, ARM64_INS_SQRDMULH: sqrdmulh $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRDMULHv1i16_indexed, ARM64_INS_SQRDMULH: sqrdmulh.h $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRDMULHv1i32, ARM64_INS_SQRDMULH: sqrdmulh $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRDMULHv1i32_indexed, ARM64_INS_SQRDMULH: sqrdmulh.s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRDMULHv2i32, ARM64_INS_SQRDMULH: sqrdmulh.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRDMULHv2i32_indexed, ARM64_INS_SQRDMULH: sqrdmulh.2s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRDMULHv4i16, ARM64_INS_SQRDMULH: sqrdmulh.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRDMULHv4i16_indexed, ARM64_INS_SQRDMULH: sqrdmulh.4h $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRDMULHv4i32, ARM64_INS_SQRDMULH: sqrdmulh.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRDMULHv4i32_indexed, ARM64_INS_SQRDMULH: sqrdmulh.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRDMULHv8i16, ARM64_INS_SQRDMULH: sqrdmulh.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRDMULHv8i16_indexed, ARM64_INS_SQRDMULH: sqrdmulh.8h $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHLv16i8, ARM64_INS_SQRSHL: sqrshl.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHLv1i16, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHLv1i32, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHLv1i64, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHLv1i8, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHLv2i32, ARM64_INS_SQRSHL: sqrshl.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHLv2i64, ARM64_INS_SQRSHL: sqrshl.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHLv4i16, ARM64_INS_SQRSHL: sqrshl.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHLv4i32, ARM64_INS_SQRSHL: sqrshl.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHLv8i16, ARM64_INS_SQRSHL: sqrshl.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHLv8i8, ARM64_INS_SQRSHL: sqrshl.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRNb, ARM64_INS_SQRSHRN: sqrshrn $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRNh, ARM64_INS_SQRSHRN: sqrshrn $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRNs, ARM64_INS_SQRSHRN: sqrshrn $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRNv16i8_shift, ARM64_INS_SQRSHRN2: sqrshrn2.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRNv2i32_shift, ARM64_INS_SQRSHRN: sqrshrn.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRNv4i16_shift, ARM64_INS_SQRSHRN: sqrshrn.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRNv4i32_shift, ARM64_INS_SQRSHRN2: sqrshrn2.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRNv8i16_shift, ARM64_INS_SQRSHRN2: sqrshrn2.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRNv8i8_shift, ARM64_INS_SQRSHRN: sqrshrn.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRUNb, ARM64_INS_SQRSHRUN: sqrshrun $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRUNh, ARM64_INS_SQRSHRUN: sqrshrun $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRUNs, ARM64_INS_SQRSHRUN: sqrshrun $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRUNv16i8_shift, ARM64_INS_SQRSHRUN2: sqrshrun2.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRUNv2i32_shift, ARM64_INS_SQRSHRUN: sqrshrun.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRUNv4i16_shift, ARM64_INS_SQRSHRUN: sqrshrun.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRUNv4i32_shift, ARM64_INS_SQRSHRUN2: sqrshrun2.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRUNv8i16_shift, ARM64_INS_SQRSHRUN2: sqrshrun2.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQRSHRUNv8i8_shift, ARM64_INS_SQRSHRUN: sqrshrun.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLUb, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLUd, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLUh, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLUs, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLUv16i8_shift, ARM64_INS_SQSHLU: sqshlu.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLUv2i32_shift, ARM64_INS_SQSHLU: sqshlu.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLUv2i64_shift, ARM64_INS_SQSHLU: sqshlu.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLUv4i16_shift, ARM64_INS_SQSHLU: sqshlu.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLUv4i32_shift, ARM64_INS_SQSHLU: sqshlu.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLUv8i16_shift, ARM64_INS_SQSHLU: sqshlu.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLUv8i8_shift, ARM64_INS_SQSHLU: sqshlu.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLb, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLd, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLh, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLs, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv16i8, ARM64_INS_SQSHL: sqshl.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv16i8_shift, ARM64_INS_SQSHL: sqshl.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv1i16, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv1i32, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv1i64, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv1i8, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv2i32, ARM64_INS_SQSHL: sqshl.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv2i32_shift, ARM64_INS_SQSHL: sqshl.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv2i64, ARM64_INS_SQSHL: sqshl.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv2i64_shift, ARM64_INS_SQSHL: sqshl.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv4i16, ARM64_INS_SQSHL: sqshl.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv4i16_shift, ARM64_INS_SQSHL: sqshl.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv4i32, ARM64_INS_SQSHL: sqshl.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv4i32_shift, ARM64_INS_SQSHL: sqshl.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv8i16, ARM64_INS_SQSHL: sqshl.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv8i16_shift, ARM64_INS_SQSHL: sqshl.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv8i8, ARM64_INS_SQSHL: sqshl.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHLv8i8_shift, ARM64_INS_SQSHL: sqshl.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRNb, ARM64_INS_SQSHRN: sqshrn $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRNh, ARM64_INS_SQSHRN: sqshrn $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRNs, ARM64_INS_SQSHRN: sqshrn $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRNv16i8_shift, ARM64_INS_SQSHRN2: sqshrn2.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRNv2i32_shift, ARM64_INS_SQSHRN: sqshrn.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRNv4i16_shift, ARM64_INS_SQSHRN: sqshrn.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRNv4i32_shift, ARM64_INS_SQSHRN2: sqshrn2.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRNv8i16_shift, ARM64_INS_SQSHRN2: sqshrn2.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRNv8i8_shift, ARM64_INS_SQSHRN: sqshrn.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRUNb, ARM64_INS_SQSHRUN: sqshrun $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRUNh, ARM64_INS_SQSHRUN: sqshrun $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRUNs, ARM64_INS_SQSHRUN: sqshrun $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRUNv16i8_shift, ARM64_INS_SQSHRUN2: sqshrun2.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRUNv2i32_shift, ARM64_INS_SQSHRUN: sqshrun.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRUNv4i16_shift, ARM64_INS_SQSHRUN: sqshrun.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRUNv4i32_shift, ARM64_INS_SQSHRUN2: sqshrun2.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRUNv8i16_shift, ARM64_INS_SQSHRUN2: sqshrun2.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSHRUNv8i8_shift, ARM64_INS_SQSHRUN: sqshrun.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSUBv16i8, ARM64_INS_SQSUB: sqsub.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSUBv1i16, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSUBv1i32, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSUBv1i64, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSUBv1i8, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSUBv2i32, ARM64_INS_SQSUB: sqsub.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSUBv2i64, ARM64_INS_SQSUB: sqsub.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSUBv4i16, ARM64_INS_SQSUB: sqsub.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSUBv4i32, ARM64_INS_SQSUB: sqsub.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSUBv8i16, ARM64_INS_SQSUB: sqsub.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQSUBv8i8, ARM64_INS_SQSUB: sqsub.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTNv16i8, ARM64_INS_SQXTN2: sqxtn2.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTNv1i16, ARM64_INS_SQXTN: sqxtn $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTNv1i32, ARM64_INS_SQXTN: sqxtn $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTNv1i8, ARM64_INS_SQXTN: sqxtn $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTNv2i32, ARM64_INS_SQXTN: sqxtn.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTNv4i16, ARM64_INS_SQXTN: sqxtn.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTNv4i32, ARM64_INS_SQXTN2: sqxtn2.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTNv8i16, ARM64_INS_SQXTN2: sqxtn2.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTNv8i8, ARM64_INS_SQXTN: sqxtn.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTUNv16i8, ARM64_INS_SQXTUN2: sqxtun2.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTUNv1i16, ARM64_INS_SQXTUN: sqxtun $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTUNv1i32, ARM64_INS_SQXTUN: sqxtun $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTUNv1i8, ARM64_INS_SQXTUN: sqxtun $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTUNv2i32, ARM64_INS_SQXTUN: sqxtun.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTUNv4i16, ARM64_INS_SQXTUN: sqxtun.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTUNv4i32, ARM64_INS_SQXTUN2: sqxtun2.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTUNv8i16, ARM64_INS_SQXTUN2: sqxtun2.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SQXTUNv8i8, ARM64_INS_SQXTUN: sqxtun.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_SRHADDv16i8, ARM64_INS_SRHADD: srhadd.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRHADDv2i32, ARM64_INS_SRHADD: srhadd.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRHADDv4i16, ARM64_INS_SRHADD: srhadd.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRHADDv4i32, ARM64_INS_SRHADD: srhadd.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRHADDv8i16, ARM64_INS_SRHADD: srhadd.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRHADDv8i8, ARM64_INS_SRHADD: srhadd.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRId, ARM64_INS_SRI: sri $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRIv16i8_shift, ARM64_INS_SRI: sri.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRIv2i32_shift, ARM64_INS_SRI: sri.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRIv2i64_shift, ARM64_INS_SRI: sri.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRIv4i16_shift, ARM64_INS_SRI: sri.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRIv4i32_shift, ARM64_INS_SRI: sri.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRIv8i16_shift, ARM64_INS_SRI: sri.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRIv8i8_shift, ARM64_INS_SRI: sri.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHLv16i8, ARM64_INS_SRSHL: srshl.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHLv1i64, ARM64_INS_SRSHL: srshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHLv2i32, ARM64_INS_SRSHL: srshl.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHLv2i64, ARM64_INS_SRSHL: srshl.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHLv4i16, ARM64_INS_SRSHL: srshl.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHLv4i32, ARM64_INS_SRSHL: srshl.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHLv8i16, ARM64_INS_SRSHL: srshl.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHLv8i8, ARM64_INS_SRSHL: srshl.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHRd, ARM64_INS_SRSHR: srshr $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHRv16i8_shift, ARM64_INS_SRSHR: srshr.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHRv2i32_shift, ARM64_INS_SRSHR: srshr.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHRv2i64_shift, ARM64_INS_SRSHR: srshr.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHRv4i16_shift, ARM64_INS_SRSHR: srshr.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHRv4i32_shift, ARM64_INS_SRSHR: srshr.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHRv8i16_shift, ARM64_INS_SRSHR: srshr.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSHRv8i8_shift, ARM64_INS_SRSHR: srshr.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSRAd, ARM64_INS_SRSRA: srsra $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSRAv16i8_shift, ARM64_INS_SRSRA: srsra.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSRAv2i32_shift, ARM64_INS_SRSRA: srsra.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSRAv2i64_shift, ARM64_INS_SRSRA: srsra.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSRAv4i16_shift, ARM64_INS_SRSRA: srsra.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSRAv4i32_shift, ARM64_INS_SRSRA: srsra.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSRAv8i16_shift, ARM64_INS_SRSRA: srsra.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SRSRAv8i8_shift, ARM64_INS_SRSRA: srsra.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHLLv16i8_shift, ARM64_INS_SSHLL2: sshll2.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHLLv2i32_shift, ARM64_INS_SSHLL: sshll.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHLLv4i16_shift, ARM64_INS_SSHLL: sshll.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHLLv4i32_shift, ARM64_INS_SSHLL2: sshll2.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHLLv8i16_shift, ARM64_INS_SSHLL2: sshll2.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHLLv8i8_shift, ARM64_INS_SSHLL: sshll.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHLv16i8, ARM64_INS_SSHL: sshl.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHLv1i64, ARM64_INS_SSHL: sshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHLv2i32, ARM64_INS_SSHL: sshl.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHLv2i64, ARM64_INS_SSHL: sshl.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHLv4i16, ARM64_INS_SSHL: sshl.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHLv4i32, ARM64_INS_SSHL: sshl.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHLv8i16, ARM64_INS_SSHL: sshl.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHLv8i8, ARM64_INS_SSHL: sshl.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHRd, ARM64_INS_SSHR: sshr $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHRv16i8_shift, ARM64_INS_SSHR: sshr.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHRv2i32_shift, ARM64_INS_SSHR: sshr.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHRv2i64_shift, ARM64_INS_SSHR: sshr.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHRv4i16_shift, ARM64_INS_SSHR: sshr.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHRv4i32_shift, ARM64_INS_SSHR: sshr.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHRv8i16_shift, ARM64_INS_SSHR: sshr.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSHRv8i8_shift, ARM64_INS_SSHR: sshr.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSRAd, ARM64_INS_SSRA: ssra $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSRAv16i8_shift, ARM64_INS_SSRA: ssra.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSRAv2i32_shift, ARM64_INS_SSRA: ssra.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSRAv2i64_shift, ARM64_INS_SSRA: ssra.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSRAv4i16_shift, ARM64_INS_SSRA: ssra.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSRAv4i32_shift, ARM64_INS_SSRA: ssra.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSRAv8i16_shift, ARM64_INS_SSRA: ssra.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSRAv8i8_shift, ARM64_INS_SSRA: ssra.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSUBLv16i8_v8i16, ARM64_INS_SSUBL2: ssubl2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSUBLv2i32_v2i64, ARM64_INS_SSUBL: ssubl.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSUBLv4i16_v4i32, ARM64_INS_SSUBL: ssubl.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSUBLv4i32_v2i64, ARM64_INS_SSUBL2: ssubl2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSUBLv8i16_v4i32, ARM64_INS_SSUBL2: ssubl2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSUBLv8i8_v8i16, ARM64_INS_SSUBL: ssubl.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSUBWv16i8_v8i16, ARM64_INS_SSUBW2: ssubw2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSUBWv2i32_v2i64, ARM64_INS_SSUBW: ssubw.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSUBWv4i16_v4i32, ARM64_INS_SSUBW: ssubw.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSUBWv4i32_v2i64, ARM64_INS_SSUBW2: ssubw2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSUBWv8i16_v4i32, ARM64_INS_SSUBW2: ssubw2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SSUBWv8i8_v8i16, ARM64_INS_SSUBW: ssubw.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv16b, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv1d, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv2d, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv2s, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv4h, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv4s, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv8b, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv8h, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Fourv8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev16b, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev1d, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev2d, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev2s, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev4h, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev4s, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev8b, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev8h, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Onev8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev16b, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev1d, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev2d, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev2s, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev4h, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev4s, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev8b, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev8h, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Threev8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov16b, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov1d, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov2d, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov2s, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov4h, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov4s, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov8b, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov8h, ARM64_INS_ST1: st1 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1Twov8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1i16, ARM64_INS_ST1: st1 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1i16_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1i32, ARM64_INS_ST1: st1 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1i32_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1i64, ARM64_INS_ST1: st1 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1i64_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST1i8, ARM64_INS_ST1: st1 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST1i8_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST2Twov16b, ARM64_INS_ST2: st2 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST2Twov16b_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST2Twov2d, ARM64_INS_ST2: st2 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST2Twov2d_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST2Twov2s, ARM64_INS_ST2: st2 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST2Twov2s_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST2Twov4h, ARM64_INS_ST2: st2 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST2Twov4h_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST2Twov4s, ARM64_INS_ST2: st2 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST2Twov4s_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST2Twov8b, ARM64_INS_ST2: st2 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST2Twov8b_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST2Twov8h, ARM64_INS_ST2: st2 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST2Twov8h_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST2i16, ARM64_INS_ST2: st2 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST2i16_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST2i32, ARM64_INS_ST2: st2 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST2i32_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST2i64, ARM64_INS_ST2: st2 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST2i64_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST2i8, ARM64_INS_ST2: st2 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST2i8_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST3Threev16b, ARM64_INS_ST3: st3 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST3Threev16b_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST3Threev2d, ARM64_INS_ST3: st3 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST3Threev2d_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST3Threev2s, ARM64_INS_ST3: st3 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST3Threev2s_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST3Threev4h, ARM64_INS_ST3: st3 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST3Threev4h_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST3Threev4s, ARM64_INS_ST3: st3 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST3Threev4s_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST3Threev8b, ARM64_INS_ST3: st3 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST3Threev8b_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST3Threev8h, ARM64_INS_ST3: st3 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST3Threev8h_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST3i16, ARM64_INS_ST3: st3 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST3i16_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST3i32, ARM64_INS_ST3: st3 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST3i32_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST3i64, ARM64_INS_ST3: st3 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST3i64_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST3i8, ARM64_INS_ST3: st3 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST3i8_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST4Fourv16b, ARM64_INS_ST4: st4 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST4Fourv16b_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST4Fourv2d, ARM64_INS_ST4: st4 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST4Fourv2d_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST4Fourv2s, ARM64_INS_ST4: st4 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST4Fourv2s_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST4Fourv4h, ARM64_INS_ST4: st4 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST4Fourv4h_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST4Fourv4s, ARM64_INS_ST4: st4 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST4Fourv4s_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST4Fourv8b, ARM64_INS_ST4: st4 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST4Fourv8b_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST4Fourv8h, ARM64_INS_ST4: st4 $vt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST4Fourv8h_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST4i16, ARM64_INS_ST4: st4 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST4i16_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST4i32, ARM64_INS_ST4: st4 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST4i32_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST4i64, ARM64_INS_ST4: st4 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST4i64_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ST4i8, ARM64_INS_ST4: st4 $vt$idx, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_ST4i8_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STLRB, ARM64_INS_STLRB: stlrb $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STLRH, ARM64_INS_STLRH: stlrh $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STLRW, ARM64_INS_STLR: stlr $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STLRX, ARM64_INS_STLR: stlr $rt, [$rn] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STLXPW, ARM64_INS_STLXP: stlxp $ws, $rt, $rt2, [$rn] */
- 0,
- { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STLXPX, ARM64_INS_STLXP: stlxp $ws, $rt, $rt2, [$rn] */
- 0,
- { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STLXRB, ARM64_INS_STLXRB: stlxrb $ws, $rt, [$rn] */
- 0,
- { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STLXRH, ARM64_INS_STLXRH: stlxrh $ws, $rt, [$rn] */
- 0,
- { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STLXRW, ARM64_INS_STLXR: stlxr $ws, $rt, [$rn] */
- 0,
- { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STLXRX, ARM64_INS_STLXR: stlxr $ws, $rt, [$rn] */
- 0,
- { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STNPDi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STNPQi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STNPSi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STNPWi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STNPXi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STPDi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STPDpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STPDpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STPQi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STPQpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STPQpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STPSi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STPSpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STPSpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STPWi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STPWpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STPWpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STPXi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STPXpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STPXpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRBBpost, ARM64_INS_STRB: strb $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRBBpre, ARM64_INS_STRB: strb $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRBBroW, ARM64_INS_STRB: strb $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRBBroX, ARM64_INS_STRB: strb $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRBBui, ARM64_INS_STRB: strb $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRBpost, ARM64_INS_STR: str $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRBpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRBroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRBroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRBui, ARM64_INS_STR: str $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRDpost, ARM64_INS_STR: str $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRDpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRDroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRDroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRDui, ARM64_INS_STR: str $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRHHpost, ARM64_INS_STRH: strh $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRHHpre, ARM64_INS_STRH: strh $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRHHroW, ARM64_INS_STRH: strh $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRHHroX, ARM64_INS_STRH: strh $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRHHui, ARM64_INS_STRH: strh $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRHpost, ARM64_INS_STR: str $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRHpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRHroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRHroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRHui, ARM64_INS_STR: str $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRQpost, ARM64_INS_STR: str $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRQpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRQroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRQroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRQui, ARM64_INS_STR: str $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRSpost, ARM64_INS_STR: str $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRSpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRSroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRSroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRSui, ARM64_INS_STR: str $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRWpost, ARM64_INS_STR: str $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRWpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRWroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRWroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRWui, ARM64_INS_STR: str $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRXpost, ARM64_INS_STR: str $rt, [$rn], $offset */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRXpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRXroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRXroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STRXui, ARM64_INS_STR: str $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STTRBi, ARM64_INS_STTRB: sttrb $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STTRHi, ARM64_INS_STTRH: sttrh $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STTRWi, ARM64_INS_STTR: sttr $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STTRXi, ARM64_INS_STTR: sttr $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STURBBi, ARM64_INS_STURB: sturb $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STURBi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STURDi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STURHHi, ARM64_INS_STURH: sturh $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STURHi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STURQi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STURSi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STURWi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STURXi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STXPW, ARM64_INS_STXP: stxp $ws, $rt, $rt2, [$rn] */
- 0,
- { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STXPX, ARM64_INS_STXP: stxp $ws, $rt, $rt2, [$rn] */
- 0,
- { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STXRB, ARM64_INS_STXRB: stxrb $ws, $rt, [$rn] */
- 0,
- { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STXRH, ARM64_INS_STXRH: stxrh $ws, $rt, [$rn] */
- 0,
- { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STXRW, ARM64_INS_STXR: stxr $ws, $rt, [$rn] */
- 0,
- { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_STXRX, ARM64_INS_STXR: stxr $ws, $rt, [$rn] */
- 0,
- { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBHNv2i64_v2i32, ARM64_INS_SUBHN: subhn.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBHNv2i64_v4i32, ARM64_INS_SUBHN2: subhn2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBHNv4i32_v4i16, ARM64_INS_SUBHN: subhn.4h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBHNv4i32_v8i16, ARM64_INS_SUBHN2: subhn2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBHNv8i16_v16i8, ARM64_INS_SUBHN2: subhn2.16b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBHNv8i16_v8i8, ARM64_INS_SUBHN: subhn.8b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBSWri, ARM64_INS_SUBS: subs $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBSWrs, ARM64_INS_SUBS: subs $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBSWrx, ARM64_INS_SUBS: subs $r1, $r2, $r3 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBSXri, ARM64_INS_SUBS: subs $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBSXrs, ARM64_INS_SUBS: subs $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBSXrx, ARM64_INS_SUBS: subs $r1, $r2, $r3 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBSXrx64, ARM64_INS_SUBS: subs $rd, $rn, $rm$ext */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBWri, ARM64_INS_SUB: sub $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBWrs, ARM64_INS_SUB: sub $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBWrx, ARM64_INS_SUB: sub $r1, $r2, $r3 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBXri, ARM64_INS_SUB: sub $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBXrs, ARM64_INS_SUB: sub $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBXrx, ARM64_INS_SUB: sub $r1, $r2, $r3 */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBXrx64, ARM64_INS_SUB: sub $rd, $rn, $rm$ext */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBv16i8, ARM64_INS_SUB: sub.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBv1i64, ARM64_INS_SUB: sub $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBv2i32, ARM64_INS_SUB: sub.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBv2i64, ARM64_INS_SUB: sub.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBv4i16, ARM64_INS_SUB: sub.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBv4i32, ARM64_INS_SUB: sub.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBv8i16, ARM64_INS_SUB: sub.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUBv8i8, ARM64_INS_SUB: sub.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUQADDv16i8, ARM64_INS_SUQADD: suqadd.16b $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUQADDv1i16, ARM64_INS_SUQADD: suqadd $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUQADDv1i32, ARM64_INS_SUQADD: suqadd $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUQADDv1i64, ARM64_INS_SUQADD: suqadd $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUQADDv1i8, ARM64_INS_SUQADD: suqadd $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUQADDv2i32, ARM64_INS_SUQADD: suqadd.2s $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUQADDv2i64, ARM64_INS_SUQADD: suqadd.2d $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUQADDv4i16, ARM64_INS_SUQADD: suqadd.4h $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUQADDv4i32, ARM64_INS_SUQADD: suqadd.4s $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUQADDv8i16, ARM64_INS_SUQADD: suqadd.8h $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SUQADDv8i8, ARM64_INS_SUQADD: suqadd.8b $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SVC, ARM64_INS_SVC: svc $imm */
- 0,
- { CS_AC_READ, 0 }
- },
- { /* AArch64_SYSLxt, ARM64_INS_SYSL: sysl $rt, $op1, $cn, $cm, $op2 */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_SYSxt, ARM64_INS_SYS: sys $op1, $cn, $cm, $op2, $rt */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
- },
- { /* AArch64_TBLv16i8Four, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBLv16i8One, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBLv16i8Three, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBLv16i8Two, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBLv8i8Four, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBLv8i8One, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBLv8i8Three, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBLv8i8Two, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBNZW, ARM64_INS_TBNZ: tbnz $rt, $bit_off, $target */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBNZX, ARM64_INS_TBNZ: tbnz $rt, $bit_off, $target */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBXv16i8Four, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBXv16i8One, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBXv16i8Three, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBXv16i8Two, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBXv8i8Four, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBXv8i8One, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBXv8i8Three, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBXv8i8Two, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBZW, ARM64_INS_TBZ: tbz $rt, $bit_off, $target */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TBZX, ARM64_INS_TBZ: tbz $rt, $bit_off, $target */
- 0,
- { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TRN1v16i8, ARM64_INS_TRN1: trn1.16b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TRN1v2i32, ARM64_INS_TRN1: trn1.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TRN1v2i64, ARM64_INS_TRN1: trn1.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TRN1v4i16, ARM64_INS_TRN1: trn1.4h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TRN1v4i32, ARM64_INS_TRN1: trn1.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TRN1v8i16, ARM64_INS_TRN1: trn1.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TRN1v8i8, ARM64_INS_TRN1: trn1.8b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TRN2v16i8, ARM64_INS_TRN2: trn2.16b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TRN2v2i32, ARM64_INS_TRN2: trn2.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TRN2v2i64, ARM64_INS_TRN2: trn2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TRN2v4i16, ARM64_INS_TRN2: trn2.4h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TRN2v4i32, ARM64_INS_TRN2: trn2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TRN2v8i16, ARM64_INS_TRN2: trn2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_TRN2v8i8, ARM64_INS_TRN2: trn2.8b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABALv16i8_v8i16, ARM64_INS_UABAL2: uabal2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABALv2i32_v2i64, ARM64_INS_UABAL: uabal.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABALv4i16_v4i32, ARM64_INS_UABAL: uabal.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABALv4i32_v2i64, ARM64_INS_UABAL2: uabal2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABALv8i16_v4i32, ARM64_INS_UABAL2: uabal2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABALv8i8_v8i16, ARM64_INS_UABAL: uabal.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABAv16i8, ARM64_INS_UABA: uaba.16b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABAv2i32, ARM64_INS_UABA: uaba.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABAv4i16, ARM64_INS_UABA: uaba.4h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABAv4i32, ARM64_INS_UABA: uaba.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABAv8i16, ARM64_INS_UABA: uaba.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABAv8i8, ARM64_INS_UABA: uaba.8b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABDLv16i8_v8i16, ARM64_INS_UABDL2: uabdl2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABDLv2i32_v2i64, ARM64_INS_UABDL: uabdl.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABDLv4i16_v4i32, ARM64_INS_UABDL: uabdl.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABDLv4i32_v2i64, ARM64_INS_UABDL2: uabdl2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABDLv8i16_v4i32, ARM64_INS_UABDL2: uabdl2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABDLv8i8_v8i16, ARM64_INS_UABDL: uabdl.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABDv16i8, ARM64_INS_UABD: uabd.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABDv2i32, ARM64_INS_UABD: uabd.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABDv4i16, ARM64_INS_UABD: uabd.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABDv4i32, ARM64_INS_UABD: uabd.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABDv8i16, ARM64_INS_UABD: uabd.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UABDv8i8, ARM64_INS_UABD: uabd.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADALPv16i8_v8i16, ARM64_INS_UADALP: uadalp.8h $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADALPv2i32_v1i64, ARM64_INS_UADALP: uadalp.1d $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADALPv4i16_v2i32, ARM64_INS_UADALP: uadalp.2s $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADALPv4i32_v2i64, ARM64_INS_UADALP: uadalp.2d $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADALPv8i16_v4i32, ARM64_INS_UADALP: uadalp.4s $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADALPv8i8_v4i16, ARM64_INS_UADALP: uadalp.4h $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLPv16i8_v8i16, ARM64_INS_UADDLP: uaddlp.8h $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLPv2i32_v1i64, ARM64_INS_UADDLP: uaddlp.1d $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLPv4i16_v2i32, ARM64_INS_UADDLP: uaddlp.2s $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLPv4i32_v2i64, ARM64_INS_UADDLP: uaddlp.2d $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLPv8i16_v4i32, ARM64_INS_UADDLP: uaddlp.4s $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLPv8i8_v4i16, ARM64_INS_UADDLP: uaddlp.4h $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLVv16i8v, ARM64_INS_UADDLV: uaddlv.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLVv4i16v, ARM64_INS_UADDLV: uaddlv.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLVv4i32v, ARM64_INS_UADDLV: uaddlv.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLVv8i16v, ARM64_INS_UADDLV: uaddlv.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLVv8i8v, ARM64_INS_UADDLV: uaddlv.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLv16i8_v8i16, ARM64_INS_UADDL2: uaddl2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLv2i32_v2i64, ARM64_INS_UADDL: uaddl.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLv4i16_v4i32, ARM64_INS_UADDL: uaddl.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLv4i32_v2i64, ARM64_INS_UADDL2: uaddl2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLv8i16_v4i32, ARM64_INS_UADDL2: uaddl2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDLv8i8_v8i16, ARM64_INS_UADDL: uaddl.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDWv16i8_v8i16, ARM64_INS_UADDW2: uaddw2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDWv2i32_v2i64, ARM64_INS_UADDW: uaddw.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDWv4i16_v4i32, ARM64_INS_UADDW: uaddw.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDWv4i32_v2i64, ARM64_INS_UADDW2: uaddw2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDWv8i16_v4i32, ARM64_INS_UADDW2: uaddw2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UADDWv8i8_v8i16, ARM64_INS_UADDW: uaddw.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UBFMWri, ARM64_INS_UBFM: ubfm $rd, $rn, $immr, $imms */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UBFMXri, ARM64_INS_UBFM: ubfm $rd, $rn, $immr, $imms */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFSWDri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFSWSri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFSXDri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFSXSri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFUWDri, ARM64_INS_UCVTF: ucvtf $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFUWSri, ARM64_INS_UCVTF: ucvtf $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFUXDri, ARM64_INS_UCVTF: ucvtf $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFUXSri, ARM64_INS_UCVTF: ucvtf $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFd, ARM64_INS_UCVTF: ucvtf $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFs, ARM64_INS_UCVTF: ucvtf $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFv1i32, ARM64_INS_UCVTF: ucvtf $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFv1i64, ARM64_INS_UCVTF: ucvtf $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFv2f32, ARM64_INS_UCVTF: ucvtf.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFv2f64, ARM64_INS_UCVTF: ucvtf.2d $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFv2i32_shift, ARM64_INS_UCVTF: ucvtf.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFv2i64_shift, ARM64_INS_UCVTF: ucvtf.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFv4f32, ARM64_INS_UCVTF: ucvtf.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UCVTFv4i32_shift, ARM64_INS_UCVTF: ucvtf.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UDIVWr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UDIVXr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UDIV_IntWr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UDIV_IntXr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UHADDv16i8, ARM64_INS_UHADD: uhadd.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UHADDv2i32, ARM64_INS_UHADD: uhadd.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UHADDv4i16, ARM64_INS_UHADD: uhadd.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UHADDv4i32, ARM64_INS_UHADD: uhadd.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UHADDv8i16, ARM64_INS_UHADD: uhadd.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UHADDv8i8, ARM64_INS_UHADD: uhadd.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UHSUBv16i8, ARM64_INS_UHSUB: uhsub.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UHSUBv2i32, ARM64_INS_UHSUB: uhsub.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UHSUBv4i16, ARM64_INS_UHSUB: uhsub.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UHSUBv4i32, ARM64_INS_UHSUB: uhsub.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UHSUBv8i16, ARM64_INS_UHSUB: uhsub.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UHSUBv8i8, ARM64_INS_UHSUB: uhsub.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMADDLrrr, ARM64_INS_UMADDL: umaddl $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXPv16i8, ARM64_INS_UMAXP: umaxp.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXPv2i32, ARM64_INS_UMAXP: umaxp.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXPv4i16, ARM64_INS_UMAXP: umaxp.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXPv4i32, ARM64_INS_UMAXP: umaxp.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXPv8i16, ARM64_INS_UMAXP: umaxp.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXPv8i8, ARM64_INS_UMAXP: umaxp.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXVv16i8v, ARM64_INS_UMAXV: umaxv.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXVv4i16v, ARM64_INS_UMAXV: umaxv.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXVv4i32v, ARM64_INS_UMAXV: umaxv.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXVv8i16v, ARM64_INS_UMAXV: umaxv.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXVv8i8v, ARM64_INS_UMAXV: umaxv.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXv16i8, ARM64_INS_UMAX: umax.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXv2i32, ARM64_INS_UMAX: umax.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXv4i16, ARM64_INS_UMAX: umax.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXv4i32, ARM64_INS_UMAX: umax.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXv8i16, ARM64_INS_UMAX: umax.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMAXv8i8, ARM64_INS_UMAX: umax.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINPv16i8, ARM64_INS_UMINP: uminp.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINPv2i32, ARM64_INS_UMINP: uminp.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINPv4i16, ARM64_INS_UMINP: uminp.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINPv4i32, ARM64_INS_UMINP: uminp.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINPv8i16, ARM64_INS_UMINP: uminp.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINPv8i8, ARM64_INS_UMINP: uminp.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINVv16i8v, ARM64_INS_UMINV: uminv.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINVv4i16v, ARM64_INS_UMINV: uminv.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINVv4i32v, ARM64_INS_UMINV: uminv.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINVv8i16v, ARM64_INS_UMINV: uminv.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINVv8i8v, ARM64_INS_UMINV: uminv.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINv16i8, ARM64_INS_UMIN: umin.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINv2i32, ARM64_INS_UMIN: umin.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINv4i16, ARM64_INS_UMIN: umin.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINv4i32, ARM64_INS_UMIN: umin.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINv8i16, ARM64_INS_UMIN: umin.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMINv8i8, ARM64_INS_UMIN: umin.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLALv16i8_v8i16, ARM64_INS_UMLAL2: umlal2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLALv2i32_indexed, ARM64_INS_UMLAL: umlal.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLALv2i32_v2i64, ARM64_INS_UMLAL: umlal.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLALv4i16_indexed, ARM64_INS_UMLAL: umlal.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLALv4i16_v4i32, ARM64_INS_UMLAL: umlal.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLALv4i32_indexed, ARM64_INS_UMLAL2: umlal2.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLALv4i32_v2i64, ARM64_INS_UMLAL2: umlal2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLALv8i16_indexed, ARM64_INS_UMLAL2: umlal2.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLALv8i16_v4i32, ARM64_INS_UMLAL2: umlal2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLALv8i8_v8i16, ARM64_INS_UMLAL: umlal.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLSLv16i8_v8i16, ARM64_INS_UMLSL2: umlsl2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLSLv2i32_indexed, ARM64_INS_UMLSL: umlsl.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLSLv2i32_v2i64, ARM64_INS_UMLSL: umlsl.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLSLv4i16_indexed, ARM64_INS_UMLSL: umlsl.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLSLv4i16_v4i32, ARM64_INS_UMLSL: umlsl.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLSLv4i32_indexed, ARM64_INS_UMLSL2: umlsl2.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLSLv4i32_v2i64, ARM64_INS_UMLSL2: umlsl2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLSLv8i16_indexed, ARM64_INS_UMLSL2: umlsl2.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLSLv8i16_v4i32, ARM64_INS_UMLSL2: umlsl2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMLSLv8i8_v8i16, ARM64_INS_UMLSL: umlsl.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMOVvi16, ARM64_INS_UMOV: umov.h $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMOVvi32, ARM64_INS_UMOV: umov.s $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMOVvi64, ARM64_INS_UMOV: umov.d $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMOVvi8, ARM64_INS_UMOV: umov.b $rd, $rn$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMSUBLrrr, ARM64_INS_UMSUBL: umsubl $rd, $rn, $rm, $ra */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMULHrr, ARM64_INS_UMULH: umulh $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMULLv16i8_v8i16, ARM64_INS_UMULL2: umull2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMULLv2i32_indexed, ARM64_INS_UMULL: umull.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMULLv2i32_v2i64, ARM64_INS_UMULL: umull.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMULLv4i16_indexed, ARM64_INS_UMULL: umull.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMULLv4i16_v4i32, ARM64_INS_UMULL: umull.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMULLv4i32_indexed, ARM64_INS_UMULL2: umull2.2d $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMULLv4i32_v2i64, ARM64_INS_UMULL2: umull2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMULLv8i16_indexed, ARM64_INS_UMULL2: umull2.4s $rd, $rn, $rm$idx */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMULLv8i16_v4i32, ARM64_INS_UMULL2: umull2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UMULLv8i8_v8i16, ARM64_INS_UMULL: umull.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQADDv16i8, ARM64_INS_UQADD: uqadd.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQADDv1i16, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQADDv1i32, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQADDv1i64, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQADDv1i8, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQADDv2i32, ARM64_INS_UQADD: uqadd.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQADDv2i64, ARM64_INS_UQADD: uqadd.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQADDv4i16, ARM64_INS_UQADD: uqadd.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQADDv4i32, ARM64_INS_UQADD: uqadd.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQADDv8i16, ARM64_INS_UQADD: uqadd.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQADDv8i8, ARM64_INS_UQADD: uqadd.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHLv16i8, ARM64_INS_UQRSHL: uqrshl.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHLv1i16, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHLv1i32, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHLv1i64, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHLv1i8, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHLv2i32, ARM64_INS_UQRSHL: uqrshl.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHLv2i64, ARM64_INS_UQRSHL: uqrshl.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHLv4i16, ARM64_INS_UQRSHL: uqrshl.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHLv4i32, ARM64_INS_UQRSHL: uqrshl.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHLv8i16, ARM64_INS_UQRSHL: uqrshl.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHLv8i8, ARM64_INS_UQRSHL: uqrshl.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHRNb, ARM64_INS_UQRSHRN: uqrshrn $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHRNh, ARM64_INS_UQRSHRN: uqrshrn $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHRNs, ARM64_INS_UQRSHRN: uqrshrn $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHRNv16i8_shift, ARM64_INS_UQRSHRN2: uqrshrn2.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHRNv2i32_shift, ARM64_INS_UQRSHRN: uqrshrn.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHRNv4i16_shift, ARM64_INS_UQRSHRN: uqrshrn.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHRNv4i32_shift, ARM64_INS_UQRSHRN2: uqrshrn2.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHRNv8i16_shift, ARM64_INS_UQRSHRN2: uqrshrn2.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQRSHRNv8i8_shift, ARM64_INS_UQRSHRN: uqrshrn.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLb, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLd, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLh, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLs, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv16i8, ARM64_INS_UQSHL: uqshl.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv16i8_shift, ARM64_INS_UQSHL: uqshl.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv1i16, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv1i32, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv1i64, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv1i8, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv2i32, ARM64_INS_UQSHL: uqshl.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv2i32_shift, ARM64_INS_UQSHL: uqshl.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv2i64, ARM64_INS_UQSHL: uqshl.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv2i64_shift, ARM64_INS_UQSHL: uqshl.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv4i16, ARM64_INS_UQSHL: uqshl.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv4i16_shift, ARM64_INS_UQSHL: uqshl.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv4i32, ARM64_INS_UQSHL: uqshl.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv4i32_shift, ARM64_INS_UQSHL: uqshl.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv8i16, ARM64_INS_UQSHL: uqshl.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv8i16_shift, ARM64_INS_UQSHL: uqshl.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv8i8, ARM64_INS_UQSHL: uqshl.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHLv8i8_shift, ARM64_INS_UQSHL: uqshl.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHRNb, ARM64_INS_UQSHRN: uqshrn $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHRNh, ARM64_INS_UQSHRN: uqshrn $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHRNs, ARM64_INS_UQSHRN: uqshrn $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHRNv16i8_shift, ARM64_INS_UQSHRN2: uqshrn2.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHRNv2i32_shift, ARM64_INS_UQSHRN: uqshrn.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHRNv4i16_shift, ARM64_INS_UQSHRN: uqshrn.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHRNv4i32_shift, ARM64_INS_UQSHRN2: uqshrn2.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHRNv8i16_shift, ARM64_INS_UQSHRN2: uqshrn2.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSHRNv8i8_shift, ARM64_INS_UQSHRN: uqshrn.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSUBv16i8, ARM64_INS_UQSUB: uqsub.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSUBv1i16, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSUBv1i32, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSUBv1i64, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSUBv1i8, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSUBv2i32, ARM64_INS_UQSUB: uqsub.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSUBv2i64, ARM64_INS_UQSUB: uqsub.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSUBv4i16, ARM64_INS_UQSUB: uqsub.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSUBv4i32, ARM64_INS_UQSUB: uqsub.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSUBv8i16, ARM64_INS_UQSUB: uqsub.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQSUBv8i8, ARM64_INS_UQSUB: uqsub.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UQXTNv16i8, ARM64_INS_UQXTN2: uqxtn2.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UQXTNv1i16, ARM64_INS_UQXTN: uqxtn $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UQXTNv1i32, ARM64_INS_UQXTN: uqxtn $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UQXTNv1i8, ARM64_INS_UQXTN: uqxtn $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UQXTNv2i32, ARM64_INS_UQXTN: uqxtn.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UQXTNv4i16, ARM64_INS_UQXTN: uqxtn.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UQXTNv4i32, ARM64_INS_UQXTN2: uqxtn2.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UQXTNv8i16, ARM64_INS_UQXTN2: uqxtn2.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_UQXTNv8i8, ARM64_INS_UQXTN: uqxtn.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_URECPEv2i32, ARM64_INS_URECPE: urecpe.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_URECPEv4i32, ARM64_INS_URECPE: urecpe.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_URHADDv16i8, ARM64_INS_URHADD: urhadd.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URHADDv2i32, ARM64_INS_URHADD: urhadd.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URHADDv4i16, ARM64_INS_URHADD: urhadd.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URHADDv4i32, ARM64_INS_URHADD: urhadd.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URHADDv8i16, ARM64_INS_URHADD: urhadd.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URHADDv8i8, ARM64_INS_URHADD: urhadd.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHLv16i8, ARM64_INS_URSHL: urshl.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHLv1i64, ARM64_INS_URSHL: urshl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHLv2i32, ARM64_INS_URSHL: urshl.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHLv2i64, ARM64_INS_URSHL: urshl.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHLv4i16, ARM64_INS_URSHL: urshl.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHLv4i32, ARM64_INS_URSHL: urshl.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHLv8i16, ARM64_INS_URSHL: urshl.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHLv8i8, ARM64_INS_URSHL: urshl.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHRd, ARM64_INS_URSHR: urshr $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHRv16i8_shift, ARM64_INS_URSHR: urshr.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHRv2i32_shift, ARM64_INS_URSHR: urshr.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHRv2i64_shift, ARM64_INS_URSHR: urshr.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHRv4i16_shift, ARM64_INS_URSHR: urshr.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHRv4i32_shift, ARM64_INS_URSHR: urshr.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHRv8i16_shift, ARM64_INS_URSHR: urshr.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSHRv8i8_shift, ARM64_INS_URSHR: urshr.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSQRTEv2i32, ARM64_INS_URSQRTE: ursqrte.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_URSQRTEv4i32, ARM64_INS_URSQRTE: ursqrte.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_URSRAd, ARM64_INS_URSRA: ursra $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSRAv16i8_shift, ARM64_INS_URSRA: ursra.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSRAv2i32_shift, ARM64_INS_URSRA: ursra.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSRAv2i64_shift, ARM64_INS_URSRA: ursra.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSRAv4i16_shift, ARM64_INS_URSRA: ursra.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSRAv4i32_shift, ARM64_INS_URSRA: ursra.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSRAv8i16_shift, ARM64_INS_URSRA: ursra.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_URSRAv8i8_shift, ARM64_INS_URSRA: ursra.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHLLv16i8_shift, ARM64_INS_USHLL2: ushll2.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHLLv2i32_shift, ARM64_INS_USHLL: ushll.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHLLv4i16_shift, ARM64_INS_USHLL: ushll.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHLLv4i32_shift, ARM64_INS_USHLL2: ushll2.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHLLv8i16_shift, ARM64_INS_USHLL2: ushll2.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHLLv8i8_shift, ARM64_INS_USHLL: ushll.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHLv16i8, ARM64_INS_USHL: ushl.16b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHLv1i64, ARM64_INS_USHL: ushl $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHLv2i32, ARM64_INS_USHL: ushl.2s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHLv2i64, ARM64_INS_USHL: ushl.2d $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHLv4i16, ARM64_INS_USHL: ushl.4h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHLv4i32, ARM64_INS_USHL: ushl.4s $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHLv8i16, ARM64_INS_USHL: ushl.8h $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHLv8i8, ARM64_INS_USHL: ushl.8b $rd, $rn, $rm| */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHRd, ARM64_INS_USHR: ushr $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHRv16i8_shift, ARM64_INS_USHR: ushr.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHRv2i32_shift, ARM64_INS_USHR: ushr.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHRv2i64_shift, ARM64_INS_USHR: ushr.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHRv4i16_shift, ARM64_INS_USHR: ushr.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHRv4i32_shift, ARM64_INS_USHR: ushr.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHRv8i16_shift, ARM64_INS_USHR: ushr.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USHRv8i8_shift, ARM64_INS_USHR: ushr.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USQADDv16i8, ARM64_INS_USQADD: usqadd.16b $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USQADDv1i16, ARM64_INS_USQADD: usqadd $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USQADDv1i32, ARM64_INS_USQADD: usqadd $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USQADDv1i64, ARM64_INS_USQADD: usqadd $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USQADDv1i8, ARM64_INS_USQADD: usqadd $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USQADDv2i32, ARM64_INS_USQADD: usqadd.2s $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USQADDv2i64, ARM64_INS_USQADD: usqadd.2d $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USQADDv4i16, ARM64_INS_USQADD: usqadd.4h $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USQADDv4i32, ARM64_INS_USQADD: usqadd.4s $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USQADDv8i16, ARM64_INS_USQADD: usqadd.8h $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USQADDv8i8, ARM64_INS_USQADD: usqadd.8b $rd, $rn */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USRAd, ARM64_INS_USRA: usra $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USRAv16i8_shift, ARM64_INS_USRA: usra.16b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USRAv2i32_shift, ARM64_INS_USRA: usra.2s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USRAv2i64_shift, ARM64_INS_USRA: usra.2d $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USRAv4i16_shift, ARM64_INS_USRA: usra.4h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USRAv4i32_shift, ARM64_INS_USRA: usra.4s $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USRAv8i16_shift, ARM64_INS_USRA: usra.8h $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USRAv8i8_shift, ARM64_INS_USRA: usra.8b $rd, $rn, $imm */
- 0,
- { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USUBLv16i8_v8i16, ARM64_INS_USUBL2: usubl2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USUBLv2i32_v2i64, ARM64_INS_USUBL: usubl.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USUBLv4i16_v4i32, ARM64_INS_USUBL: usubl.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USUBLv4i32_v2i64, ARM64_INS_USUBL2: usubl2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USUBLv8i16_v4i32, ARM64_INS_USUBL2: usubl2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USUBLv8i8_v8i16, ARM64_INS_USUBL: usubl.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USUBWv16i8_v8i16, ARM64_INS_USUBW2: usubw2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USUBWv2i32_v2i64, ARM64_INS_USUBW: usubw.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USUBWv4i16_v4i32, ARM64_INS_USUBW: usubw.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USUBWv4i32_v2i64, ARM64_INS_USUBW2: usubw2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USUBWv8i16_v4i32, ARM64_INS_USUBW2: usubw2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_USUBWv8i8_v8i16, ARM64_INS_USUBW: usubw.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UZP1v16i8, ARM64_INS_UZP1: uzp1.16b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UZP1v2i32, ARM64_INS_UZP1: uzp1.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UZP1v2i64, ARM64_INS_UZP1: uzp1.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UZP1v4i16, ARM64_INS_UZP1: uzp1.4h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UZP1v4i32, ARM64_INS_UZP1: uzp1.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UZP1v8i16, ARM64_INS_UZP1: uzp1.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UZP1v8i8, ARM64_INS_UZP1: uzp1.8b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UZP2v16i8, ARM64_INS_UZP2: uzp2.16b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UZP2v2i32, ARM64_INS_UZP2: uzp2.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UZP2v2i64, ARM64_INS_UZP2: uzp2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UZP2v4i16, ARM64_INS_UZP2: uzp2.4h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UZP2v4i32, ARM64_INS_UZP2: uzp2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UZP2v8i16, ARM64_INS_UZP2: uzp2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_UZP2v8i8, ARM64_INS_UZP2: uzp2.8b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_XTNv16i8, ARM64_INS_XTN2: xtn2.16b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_XTNv2i32, ARM64_INS_XTN: xtn.2s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_XTNv4i16, ARM64_INS_XTN: xtn.4h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_XTNv4i32, ARM64_INS_XTN2: xtn2.4s $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_XTNv8i16, ARM64_INS_XTN2: xtn2.8h $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_XTNv8i8, ARM64_INS_XTN: xtn.8b $rd, $rn */
- 0,
- { CS_AC_WRITE, CS_AC_READ, 0 }
- },
- { /* AArch64_ZIP1v16i8, ARM64_INS_ZIP1: zip1.16b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ZIP1v2i32, ARM64_INS_ZIP1: zip1.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ZIP1v2i64, ARM64_INS_ZIP1: zip1.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ZIP1v4i16, ARM64_INS_ZIP1: zip1.4h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ZIP1v4i32, ARM64_INS_ZIP1: zip1.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ZIP1v8i16, ARM64_INS_ZIP1: zip1.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ZIP1v8i8, ARM64_INS_ZIP1: zip1.8b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ZIP2v16i8, ARM64_INS_ZIP2: zip2.16b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ZIP2v2i32, ARM64_INS_ZIP2: zip2.2s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ZIP2v2i64, ARM64_INS_ZIP2: zip2.2d $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ZIP2v4i16, ARM64_INS_ZIP2: zip2.4h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ZIP2v4i32, ARM64_INS_ZIP2: zip2.4s $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ZIP2v8i16, ARM64_INS_ZIP2: zip2.8h $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- },
- { /* AArch64_ZIP2v8i8, ARM64_INS_ZIP2: zip2.8b $rd, $rn, $rm */
- 0,
- { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
- }
+ {
+ /* NULL item */
+ 0, { 0 }
+ },
+
+#include "AArch64MappingInsnOp.inc"
};
+
+// given internal insn id, return operand access info
+cs_ac_type *arm64_get_op_access(cs_struct *h, unsigned int id)
+{
+ int i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache);
+ if (i != 0) {
+ return insn_ops[i].operands;
+ }
+
+ return NULL;
+}
+
+void AArch64_reg_access(const cs_insn *insn,
+ cs_regs regs_read, uint8_t *regs_read_count,
+ cs_regs regs_write, uint8_t *regs_write_count)
+{
+ uint8_t i;
+ uint8_t read_count, write_count;
+ cs_arm64 *arm64 = &(insn->detail->arm64);
+
+ read_count = insn->detail->regs_read_count;
+ write_count = insn->detail->regs_write_count;
+
+ // implicit registers
+ memcpy(regs_read, insn->detail->regs_read, read_count * sizeof(insn->detail->regs_read[0]));
+ memcpy(regs_write, insn->detail->regs_write, write_count * sizeof(insn->detail->regs_write[0]));
+
+ // explicit registers
+ for (i = 0; i < arm64->op_count; i++) {
+ cs_arm64_op *op = &(arm64->operands[i]);
+ switch((int)op->type) {
+ case ARM64_OP_REG:
+ if ((op->access & CS_AC_READ) && !arr_exist(regs_read, read_count, op->reg)) {
+ regs_read[read_count] = op->reg;
+ read_count++;
+ }
+ if ((op->access & CS_AC_WRITE) && !arr_exist(regs_write, write_count, op->reg)) {
+ regs_write[write_count] = op->reg;
+ write_count++;
+ }
+ break;
+ case ARM_OP_MEM:
+ // registers appeared in memory references always being read
+ if ((op->mem.base != ARM64_REG_INVALID) && !arr_exist(regs_read, read_count, op->mem.base)) {
+ regs_read[read_count] = op->mem.base;
+ read_count++;
+ }
+ if ((op->mem.index != ARM64_REG_INVALID) && !arr_exist(regs_read, read_count, op->mem.index)) {
+ regs_read[read_count] = op->mem.index;
+ read_count++;
+ }
+ if ((arm64->writeback) && (op->mem.base != ARM64_REG_INVALID) && !arr_exist(regs_write, write_count, op->mem.base)) {
+ regs_write[write_count] = op->mem.base;
+ write_count++;
+ }
+ default:
+ break;
+ }
+ }
+
+ *regs_read_count = read_count;
+ *regs_write_count = write_count;
+}
#endif
#endif
diff --git a/arch/AArch64/AArch64Mapping.h b/arch/AArch64/AArch64Mapping.h
index 890fbd0..767a8f1 100644
--- a/arch/AArch64/AArch64Mapping.h
+++ b/arch/AArch64/AArch64Mapping.h
@@ -32,4 +32,10 @@
void arm64_op_addImm(MCInst *MI, int64_t imm);
+cs_ac_type *arm64_get_op_access(cs_struct *h, unsigned int id);
+
+void AArch64_reg_access(const cs_insn *insn,
+ cs_regs regs_read, uint8_t *regs_read_count,
+ cs_regs regs_write, uint8_t *regs_write_count);
+
#endif
diff --git a/arch/AArch64/AArch64MappingInsnOp.inc b/arch/AArch64/AArch64MappingInsnOp.inc
new file mode 100644
index 0000000..5a914b0
--- /dev/null
+++ b/arch/AArch64/AArch64MappingInsnOp.inc
@@ -0,0 +1,9308 @@
+{ /* AArch64_ABSv16i8, ARM64_INS_ABS: abs.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ABSv1i64, ARM64_INS_ABS: abs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ABSv2i32, ARM64_INS_ABS: abs.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ABSv2i64, ARM64_INS_ABS: abs.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ABSv4i16, ARM64_INS_ABS: abs.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ABSv4i32, ARM64_INS_ABS: abs.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ABSv8i16, ARM64_INS_ABS: abs.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ABSv8i8, ARM64_INS_ABS: abs.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADCSWr, ARM64_INS_ADCS: adcs $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADCSXr, ARM64_INS_ADCS: adcs $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADCWr, ARM64_INS_ADC: adc $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADCXr, ARM64_INS_ADC: adc $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDHNv2i64_v2i32, ARM64_INS_ADDHN: addhn.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDHNv2i64_v4i32, ARM64_INS_ADDHN2: addhn2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDHNv4i32_v4i16, ARM64_INS_ADDHN: addhn.4h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDHNv4i32_v8i16, ARM64_INS_ADDHN2: addhn2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDHNv8i16_v16i8, ARM64_INS_ADDHN2: addhn2.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDHNv8i16_v8i8, ARM64_INS_ADDHN: addhn.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDPv16i8, ARM64_INS_ADDP: addp.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDPv2i32, ARM64_INS_ADDP: addp.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDPv2i64, ARM64_INS_ADDP: addp.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDPv2i64p, ARM64_INS_ADDP: addp.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDPv4i16, ARM64_INS_ADDP: addp.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDPv4i32, ARM64_INS_ADDP: addp.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDPv8i16, ARM64_INS_ADDP: addp.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDPv8i8, ARM64_INS_ADDP: addp.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDSWri, ARM64_INS_ADDS: adds $rd, $rn, $imm */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ,0 }
+},
+{ /* AArch64_ADDSWrs, ARM64_INS_ADDS: adds $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDSWrx, ARM64_INS_ADDS: adds $r1, $r2, $r3 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDSXri, ARM64_INS_ADDS: adds $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDSXrs, ARM64_INS_ADDS: adds $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDSXrx, ARM64_INS_ADDS: adds $r1, $r2, $r3 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDSXrx64, ARM64_INS_ADDS: adds $rd, $rn, $rm$ext */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDVv16i8v, ARM64_INS_ADDV: addv.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDVv4i16v, ARM64_INS_ADDV: addv.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDVv4i32v, ARM64_INS_ADDV: addv.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDVv8i16v, ARM64_INS_ADDV: addv.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDVv8i8v, ARM64_INS_ADDV: addv.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDWri, ARM64_INS_ADD: add $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDWrs, ARM64_INS_ADD: add $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDWrx, ARM64_INS_ADD: add $r1, $r2, $r3 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDXri, ARM64_INS_ADD: add $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDXrs, ARM64_INS_ADD: add $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDXrx, ARM64_INS_ADD: add $r1, $r2, $r3 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDXrx64, ARM64_INS_ADD: add $rd, $rn, $rm$ext */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDv16i8, ARM64_INS_ADD: add.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDv1i64, ARM64_INS_ADD: add $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDv2i32, ARM64_INS_ADD: add.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDv2i64, ARM64_INS_ADD: add.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDv4i16, ARM64_INS_ADD: add.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDv4i32, ARM64_INS_ADD: add.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDv8i16, ARM64_INS_ADD: add.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADDv8i8, ARM64_INS_ADD: add.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADR, ARM64_INS_ADR: adr $xd, $label */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ADRP, ARM64_INS_ADRP: adrp $xd, $label */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_AESDrr, ARM64_INS_AESD: aesd.16b $rd, $rn */
+ 0,
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_AESErr, ARM64_INS_AESE: aese.16b $rd, $rn */
+ 0,
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_AESIMCrr, ARM64_INS_AESIMC: aesimc.16b $rd, $rn */
+ 0,
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_AESMCrr, ARM64_INS_AESMC: aesmc.16b $rd, $rn */
+ 0,
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ANDSWri, ARM64_INS_ANDS: ands $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ANDSWrs, ARM64_INS_ANDS: ands $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ANDSXri, ARM64_INS_ANDS: ands $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ANDSXrs, ARM64_INS_ANDS: ands $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ANDWri, ARM64_INS_AND: and $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ANDWrs, ARM64_INS_AND: and $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ANDXri, ARM64_INS_AND: and $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ANDXrs, ARM64_INS_AND: and $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ANDv16i8, ARM64_INS_AND: and.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ANDv8i8, ARM64_INS_AND: and.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ASRVWr, ARM64_INS_ASR: asr $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ASRVXr, ARM64_INS_ASR: asr $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_B, ARM64_INS_B: b $addr */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_BFMWri, ARM64_INS_BFM: bfm $rd, $rn, $immr, $imms */
+ 0,
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_BFMXri, ARM64_INS_BFM: bfm $rd, $rn, $immr, $imms */
+ 0,
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_BICSWrs, ARM64_INS_BICS: bics $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_BICSXrs, ARM64_INS_BICS: bics $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_BICWrs, ARM64_INS_BIC: bic $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_BICXrs, ARM64_INS_BIC: bic $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_BICv16i8, ARM64_INS_BIC: bic.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_BICv2i32, ARM64_INS_BIC: bic.2s $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_BICv4i16, ARM64_INS_BIC: bic.4h $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_BICv4i32, ARM64_INS_BIC: bic.4s $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_BICv8i16, ARM64_INS_BIC: bic.8h $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_BICv8i8, ARM64_INS_BIC: bic.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_BIFv16i8, ARM64_INS_BIF: bif.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_BIFv8i8, ARM64_INS_BIF: bif.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_BITv16i8, ARM64_INS_BIT: bit.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_BITv8i8, ARM64_INS_BIT: bit.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_BL, ARM64_INS_BL: bl $addr */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_BLR, ARM64_INS_BLR: blr $rn */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_BR, ARM64_INS_BR: br $rn */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_BRK, ARM64_INS_BRK: brk $imm */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_BSLv16i8, ARM64_INS_BSL: bsl.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_BSLv8i8, ARM64_INS_BSL: bsl.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_Bcc, ARM64_INS_B: b.$cond $target */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_CBNZW, ARM64_INS_CBNZ: cbnz $rt, $target */
+ 0,
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CBNZX, ARM64_INS_CBNZ: cbnz $rt, $target */
+ 0,
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CBZW, ARM64_INS_CBZ: cbz $rt, $target */
+ 0,
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CBZX, ARM64_INS_CBZ: cbz $rt, $target */
+ 0,
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CCMNWi, ARM64_INS_CCMN: ccmn $rn, $imm, $nzcv, $cond */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_CCMNWr, ARM64_INS_CCMN: ccmn $rn, $rm, $nzcv, $cond */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_CCMNXi, ARM64_INS_CCMN: ccmn $rn, $imm, $nzcv, $cond */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_CCMNXr, ARM64_INS_CCMN: ccmn $rn, $rm, $nzcv, $cond */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_CCMPWi, ARM64_INS_CCMP: ccmp $rn, $imm, $nzcv, $cond */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_CCMPWr, ARM64_INS_CCMP: ccmp $rn, $rm, $nzcv, $cond */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_CCMPXi, ARM64_INS_CCMP: ccmp $rn, $imm, $nzcv, $cond */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_CCMPXr, ARM64_INS_CCMP: ccmp $rn, $rm, $nzcv, $cond */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_CLREX, ARM64_INS_CLREX: clrex $crm */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_CLSWr, ARM64_INS_CLS: cls $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CLSXr, ARM64_INS_CLS: cls $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CLSv16i8, ARM64_INS_CLS: cls.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CLSv2i32, ARM64_INS_CLS: cls.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CLSv4i16, ARM64_INS_CLS: cls.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CLSv4i32, ARM64_INS_CLS: cls.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CLSv8i16, ARM64_INS_CLS: cls.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CLSv8i8, ARM64_INS_CLS: cls.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CLZWr, ARM64_INS_CLZ: clz $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CLZXr, ARM64_INS_CLZ: clz $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CLZv16i8, ARM64_INS_CLZ: clz.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CLZv2i32, ARM64_INS_CLZ: clz.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CLZv4i16, ARM64_INS_CLZ: clz.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CLZv4i32, ARM64_INS_CLZ: clz.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CLZv8i16, ARM64_INS_CLZ: clz.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CLZv8i8, ARM64_INS_CLZ: clz.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv16i8, ARM64_INS_CMEQ: cmeq.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv16i8rz, ARM64_INS_CMEQ: cmeq.16b $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv1i64, ARM64_INS_CMEQ: cmeq $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv1i64rz, ARM64_INS_CMEQ: cmeq $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv2i32, ARM64_INS_CMEQ: cmeq.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv2i32rz, ARM64_INS_CMEQ: cmeq.2s $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv2i64, ARM64_INS_CMEQ: cmeq.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv2i64rz, ARM64_INS_CMEQ: cmeq.2d $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv4i16, ARM64_INS_CMEQ: cmeq.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv4i16rz, ARM64_INS_CMEQ: cmeq.4h $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv4i32, ARM64_INS_CMEQ: cmeq.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv4i32rz, ARM64_INS_CMEQ: cmeq.4s $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv8i16, ARM64_INS_CMEQ: cmeq.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv8i16rz, ARM64_INS_CMEQ: cmeq.8h $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv8i8, ARM64_INS_CMEQ: cmeq.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMEQv8i8rz, ARM64_INS_CMEQ: cmeq.8b $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv16i8, ARM64_INS_CMGE: cmge.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv16i8rz, ARM64_INS_CMGE: cmge.16b $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv1i64, ARM64_INS_CMGE: cmge $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv1i64rz, ARM64_INS_CMGE: cmge $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv2i32, ARM64_INS_CMGE: cmge.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv2i32rz, ARM64_INS_CMGE: cmge.2s $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv2i64, ARM64_INS_CMGE: cmge.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv2i64rz, ARM64_INS_CMGE: cmge.2d $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv4i16, ARM64_INS_CMGE: cmge.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv4i16rz, ARM64_INS_CMGE: cmge.4h $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv4i32, ARM64_INS_CMGE: cmge.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv4i32rz, ARM64_INS_CMGE: cmge.4s $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv8i16, ARM64_INS_CMGE: cmge.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv8i16rz, ARM64_INS_CMGE: cmge.8h $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv8i8, ARM64_INS_CMGE: cmge.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGEv8i8rz, ARM64_INS_CMGE: cmge.8b $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv16i8, ARM64_INS_CMGT: cmgt.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv16i8rz, ARM64_INS_CMGT: cmgt.16b $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv1i64, ARM64_INS_CMGT: cmgt $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv1i64rz, ARM64_INS_CMGT: cmgt $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv2i32, ARM64_INS_CMGT: cmgt.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv2i32rz, ARM64_INS_CMGT: cmgt.2s $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv2i64, ARM64_INS_CMGT: cmgt.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv2i64rz, ARM64_INS_CMGT: cmgt.2d $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv4i16, ARM64_INS_CMGT: cmgt.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv4i16rz, ARM64_INS_CMGT: cmgt.4h $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv4i32, ARM64_INS_CMGT: cmgt.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv4i32rz, ARM64_INS_CMGT: cmgt.4s $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv8i16, ARM64_INS_CMGT: cmgt.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv8i16rz, ARM64_INS_CMGT: cmgt.8h $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv8i8, ARM64_INS_CMGT: cmgt.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMGTv8i8rz, ARM64_INS_CMGT: cmgt.8b $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHIv16i8, ARM64_INS_CMHI: cmhi.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHIv1i64, ARM64_INS_CMHI: cmhi $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHIv2i32, ARM64_INS_CMHI: cmhi.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHIv2i64, ARM64_INS_CMHI: cmhi.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHIv4i16, ARM64_INS_CMHI: cmhi.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHIv4i32, ARM64_INS_CMHI: cmhi.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHIv8i16, ARM64_INS_CMHI: cmhi.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHIv8i8, ARM64_INS_CMHI: cmhi.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHSv16i8, ARM64_INS_CMHS: cmhs.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHSv1i64, ARM64_INS_CMHS: cmhs $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHSv2i32, ARM64_INS_CMHS: cmhs.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHSv2i64, ARM64_INS_CMHS: cmhs.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHSv4i16, ARM64_INS_CMHS: cmhs.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHSv4i32, ARM64_INS_CMHS: cmhs.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHSv8i16, ARM64_INS_CMHS: cmhs.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMHSv8i8, ARM64_INS_CMHS: cmhs.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLEv16i8rz, ARM64_INS_CMLE: cmle.16b $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLEv1i64rz, ARM64_INS_CMLE: cmle $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLEv2i32rz, ARM64_INS_CMLE: cmle.2s $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLEv2i64rz, ARM64_INS_CMLE: cmle.2d $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLEv4i16rz, ARM64_INS_CMLE: cmle.4h $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLEv4i32rz, ARM64_INS_CMLE: cmle.4s $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLEv8i16rz, ARM64_INS_CMLE: cmle.8h $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLEv8i8rz, ARM64_INS_CMLE: cmle.8b $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLTv16i8rz, ARM64_INS_CMLT: cmlt.16b $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLTv1i64rz, ARM64_INS_CMLT: cmlt $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLTv2i32rz, ARM64_INS_CMLT: cmlt.2s $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLTv2i64rz, ARM64_INS_CMLT: cmlt.2d $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLTv4i16rz, ARM64_INS_CMLT: cmlt.4h $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLTv4i32rz, ARM64_INS_CMLT: cmlt.4s $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLTv8i16rz, ARM64_INS_CMLT: cmlt.8h $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMLTv8i8rz, ARM64_INS_CMLT: cmlt.8b $rd, $rn, #0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMTSTv16i8, ARM64_INS_CMTST: cmtst.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMTSTv1i64, ARM64_INS_CMTST: cmtst $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMTSTv2i32, ARM64_INS_CMTST: cmtst.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMTSTv2i64, ARM64_INS_CMTST: cmtst.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMTSTv4i16, ARM64_INS_CMTST: cmtst.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMTSTv4i32, ARM64_INS_CMTST: cmtst.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMTSTv8i16, ARM64_INS_CMTST: cmtst.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CMTSTv8i8, ARM64_INS_CMTST: cmtst.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CNTv16i8, ARM64_INS_CNT: cnt.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CNTv8i8, ARM64_INS_CNT: cnt.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_CPYi16, ARM64_INS_MOV: mov $dst, $src$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CPYi32, ARM64_INS_MOV: mov $dst, $src$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CPYi64, ARM64_INS_MOV: mov $dst, $src$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CPYi8, ARM64_INS_MOV: mov $dst, $src$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CRC32Brr, ARM64_INS_CRC32B: crc32b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CRC32CBrr, ARM64_INS_CRC32CB: crc32cb $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CRC32CHrr, ARM64_INS_CRC32CH: crc32ch $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CRC32CWrr, ARM64_INS_CRC32CW: crc32cw $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CRC32CXrr, ARM64_INS_CRC32CX: crc32cx $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CRC32Hrr, ARM64_INS_CRC32H: crc32h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CRC32Wrr, ARM64_INS_CRC32W: crc32w $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CRC32Xrr, ARM64_INS_CRC32X: crc32x $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_CSELWr, ARM64_INS_CSEL: csel $rd, $rn, $rm, $cond */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_CSELXr, ARM64_INS_CSEL: csel $rd, $rn, $rm, $cond */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_CSINCWr, ARM64_INS_CSINC: csinc $rd, $rn, $rm, $cond */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_CSINCXr, ARM64_INS_CSINC: csinc $rd, $rn, $rm, $cond */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_CSINVWr, ARM64_INS_CSINV: csinv $rd, $rn, $rm, $cond */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_CSINVXr, ARM64_INS_CSINV: csinv $rd, $rn, $rm, $cond */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_CSNEGWr, ARM64_INS_CSNEG: csneg $rd, $rn, $rm, $cond */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_CSNEGXr, ARM64_INS_CSNEG: csneg $rd, $rn, $rm, $cond */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_DCPS1, ARM64_INS_DCPS1: dcps1 $imm */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_DCPS2, ARM64_INS_DCPS2: dcps2 $imm */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_DCPS3, ARM64_INS_DCPS3: dcps3 $imm */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_DMB, ARM64_INS_DMB: dmb $crm */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_DRPS, ARM64_INS_DRPS: drps */
+ 0,
+ { 0 }
+},
+{ /* AArch64_DSB, ARM64_INS_DSB: dsb $crm */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_DUPv16i8gpr, ARM64_INS_DUP: dup.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_DUPv16i8lane, ARM64_INS_DUP: dup.16b $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_DUPv2i32gpr, ARM64_INS_DUP: dup.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_DUPv2i32lane, ARM64_INS_DUP: dup.2s $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_DUPv2i64gpr, ARM64_INS_DUP: dup.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_DUPv2i64lane, ARM64_INS_DUP: dup.2d $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_DUPv4i16gpr, ARM64_INS_DUP: dup.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_DUPv4i16lane, ARM64_INS_DUP: dup.4h $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_DUPv4i32gpr, ARM64_INS_DUP: dup.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_DUPv4i32lane, ARM64_INS_DUP: dup.4s $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_DUPv8i16gpr, ARM64_INS_DUP: dup.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_DUPv8i16lane, ARM64_INS_DUP: dup.8h $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_DUPv8i8gpr, ARM64_INS_DUP: dup.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_DUPv8i8lane, ARM64_INS_DUP: dup.8b $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_EONWrs, ARM64_INS_EON: eon $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_EONXrs, ARM64_INS_EON: eon $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_EORWri, ARM64_INS_EOR: eor $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_EORWrs, ARM64_INS_EOR: eor $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_EORXri, ARM64_INS_EOR: eor $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_EORXrs, ARM64_INS_EOR: eor $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_EORv16i8, ARM64_INS_EOR: eor.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_EORv8i8, ARM64_INS_EOR: eor.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ERET, ARM64_INS_ERET: eret */
+ 0,
+ { 0 }
+},
+{ /* AArch64_EXTRWrri, ARM64_INS_EXTR: extr $rd, $rn, $rm, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_EXTRXrri, ARM64_INS_EXTR: extr $rd, $rn, $rm, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_EXTv16i8, ARM64_INS_EXT: ext.16b $rd, $rn, $rm, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_EXTv8i8, ARM64_INS_EXT: ext.8b $rd, $rn, $rm, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FABD32, ARM64_INS_FABD: fabd $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FABD64, ARM64_INS_FABD: fabd $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FABDv2f32, ARM64_INS_FABD: fabd.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FABDv2f64, ARM64_INS_FABD: fabd.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FABDv4f32, ARM64_INS_FABD: fabd.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FABSDr, ARM64_INS_FABS: fabs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FABSSr, ARM64_INS_FABS: fabs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FABSv2f32, ARM64_INS_FABS: fabs.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FABSv2f64, ARM64_INS_FABS: fabs.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FABSv4f32, ARM64_INS_FABS: fabs.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FACGE32, ARM64_INS_FACGE: facge $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FACGE64, ARM64_INS_FACGE: facge $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FACGEv2f32, ARM64_INS_FACGE: facge.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FACGEv2f64, ARM64_INS_FACGE: facge.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FACGEv4f32, ARM64_INS_FACGE: facge.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FACGT32, ARM64_INS_FACGT: facgt $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FACGT64, ARM64_INS_FACGT: facgt $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FACGTv2f32, ARM64_INS_FACGT: facgt.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FACGTv2f64, ARM64_INS_FACGT: facgt.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FACGTv4f32, ARM64_INS_FACGT: facgt.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FADDDrr, ARM64_INS_FADD: fadd $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FADDPv2f32, ARM64_INS_FADDP: faddp.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FADDPv2f64, ARM64_INS_FADDP: faddp.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FADDPv2i32p, ARM64_INS_FADDP: faddp.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FADDPv2i64p, ARM64_INS_FADDP: faddp.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FADDPv4f32, ARM64_INS_FADDP: faddp.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FADDSrr, ARM64_INS_FADD: fadd $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FADDv2f32, ARM64_INS_FADD: fadd.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FADDv2f64, ARM64_INS_FADD: fadd.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FADDv4f32, ARM64_INS_FADD: fadd.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCCMPDrr, ARM64_INS_FCCMP: fccmp $rn, $rm, $nzcv, $cond */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_WRITE, CS_AC_READ }
+},
+{ /* AArch64_FCCMPEDrr, ARM64_INS_FCCMPE: fccmpe $rn, $rm, $nzcv, $cond */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_WRITE, CS_AC_READ }
+},
+{ /* AArch64_FCCMPESrr, ARM64_INS_FCCMPE: fccmpe $rn, $rm, $nzcv, $cond */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_WRITE, CS_AC_READ }
+},
+{ /* AArch64_FCCMPSrr, ARM64_INS_FCCMP: fccmp $rn, $rm, $nzcv, $cond */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_WRITE, CS_AC_READ }
+},
+{ /* AArch64_FCMEQ32, ARM64_INS_FCMEQ: fcmeq $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMEQ64, ARM64_INS_FCMEQ: fcmeq $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMEQv1i32rz, ARM64_INS_FCMEQ: fcmeq $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMEQv1i64rz, ARM64_INS_FCMEQ: fcmeq $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMEQv2f32, ARM64_INS_FCMEQ: fcmeq.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMEQv2f64, ARM64_INS_FCMEQ: fcmeq.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMEQv2i32rz, ARM64_INS_FCMEQ: fcmeq.2s $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMEQv2i64rz, ARM64_INS_FCMEQ: fcmeq.2d $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMEQv4f32, ARM64_INS_FCMEQ: fcmeq.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMEQv4i32rz, ARM64_INS_FCMEQ: fcmeq.4s $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGE32, ARM64_INS_FCMGE: fcmge $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGE64, ARM64_INS_FCMGE: fcmge $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGEv1i32rz, ARM64_INS_FCMGE: fcmge $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGEv1i64rz, ARM64_INS_FCMGE: fcmge $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGEv2f32, ARM64_INS_FCMGE: fcmge.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGEv2f64, ARM64_INS_FCMGE: fcmge.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGEv2i32rz, ARM64_INS_FCMGE: fcmge.2s $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGEv2i64rz, ARM64_INS_FCMGE: fcmge.2d $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGEv4f32, ARM64_INS_FCMGE: fcmge.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGEv4i32rz, ARM64_INS_FCMGE: fcmge.4s $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGT32, ARM64_INS_FCMGT: fcmgt $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGT64, ARM64_INS_FCMGT: fcmgt $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGTv1i32rz, ARM64_INS_FCMGT: fcmgt $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGTv1i64rz, ARM64_INS_FCMGT: fcmgt $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGTv2f32, ARM64_INS_FCMGT: fcmgt.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGTv2f64, ARM64_INS_FCMGT: fcmgt.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGTv2i32rz, ARM64_INS_FCMGT: fcmgt.2s $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGTv2i64rz, ARM64_INS_FCMGT: fcmgt.2d $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGTv4f32, ARM64_INS_FCMGT: fcmgt.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMGTv4i32rz, ARM64_INS_FCMGT: fcmgt.4s $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMLEv1i32rz, ARM64_INS_FCMLE: fcmle $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMLEv1i64rz, ARM64_INS_FCMLE: fcmle $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMLEv2i32rz, ARM64_INS_FCMLE: fcmle.2s $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMLEv2i64rz, ARM64_INS_FCMLE: fcmle.2d $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMLEv4i32rz, ARM64_INS_FCMLE: fcmle.4s $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMLTv1i32rz, ARM64_INS_FCMLT: fcmlt $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMLTv1i64rz, ARM64_INS_FCMLT: fcmlt $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMLTv2i32rz, ARM64_INS_FCMLT: fcmlt.2s $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMLTv2i64rz, ARM64_INS_FCMLT: fcmlt.2d $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMLTv4i32rz, ARM64_INS_FCMLT: fcmlt.4s $rd, $rn, #0.0 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMPDri, ARM64_INS_FCMP: fcmp $rn, #0.0 */
+ 0,
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMPDrr, ARM64_INS_FCMP: fcmp $rn, $rm */
+ 0,
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMPEDri, ARM64_INS_FCMPE: fcmpe $rn, #0.0 */
+ 0,
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMPEDrr, ARM64_INS_FCMPE: fcmpe $rn, $rm */
+ 0,
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMPESri, ARM64_INS_FCMPE: fcmpe $rn, #0.0 */
+ 0,
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMPESrr, ARM64_INS_FCMPE: fcmpe $rn, $rm */
+ 0,
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMPSri, ARM64_INS_FCMP: fcmp $rn, #0.0 */
+ 0,
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCMPSrr, ARM64_INS_FCMP: fcmp $rn, $rm */
+ 0,
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCSELDrrr, ARM64_INS_FCSEL: fcsel $rd, $rn, $rm, $cond */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FCSELSrrr, ARM64_INS_FCSEL: fcsel $rd, $rn, $rm, $cond */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FCVTASUWDr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTASUWSr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTASUXDr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTASUXSr, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTASv1i32, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTASv1i64, ARM64_INS_FCVTAS: fcvtas $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTASv2f32, ARM64_INS_FCVTAS: fcvtas.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTASv2f64, ARM64_INS_FCVTAS: fcvtas.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTASv4f32, ARM64_INS_FCVTAS: fcvtas.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTAUUWDr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTAUUWSr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTAUUXDr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTAUUXSr, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTAUv1i32, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTAUv1i64, ARM64_INS_FCVTAU: fcvtau $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTAUv2f32, ARM64_INS_FCVTAU: fcvtau.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTAUv2f64, ARM64_INS_FCVTAU: fcvtau.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTAUv4f32, ARM64_INS_FCVTAU: fcvtau.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTDHr, ARM64_INS_FCVT: fcvt $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTDSr, ARM64_INS_FCVT: fcvt $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTHDr, ARM64_INS_FCVT: fcvt $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTHSr, ARM64_INS_FCVT: fcvt $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTLv2i32, ARM64_INS_FCVTL: fcvtl $rd.2d, $rn.2s */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTLv4i16, ARM64_INS_FCVTL: fcvtl $rd.4s, $rn.4h */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTLv4i32, ARM64_INS_FCVTL2: fcvtl2 $rd.2d, $rn.4s */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTLv8i16, ARM64_INS_FCVTL2: fcvtl2 $rd.4s, $rn.8h */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMSUWDr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMSUWSr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMSUXDr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMSUXSr, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMSv1i32, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMSv1i64, ARM64_INS_FCVTMS: fcvtms $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMSv2f32, ARM64_INS_FCVTMS: fcvtms.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMSv2f64, ARM64_INS_FCVTMS: fcvtms.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMSv4f32, ARM64_INS_FCVTMS: fcvtms.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMUUWDr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMUUWSr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMUUXDr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMUUXSr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMUv1i32, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMUv1i64, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMUv2f32, ARM64_INS_FCVTMU: fcvtmu.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMUv2f64, ARM64_INS_FCVTMU: fcvtmu.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTMUv4f32, ARM64_INS_FCVTMU: fcvtmu.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNSUWDr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNSUWSr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNSUXDr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNSUXSr, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNSv1i32, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNSv1i64, ARM64_INS_FCVTNS: fcvtns $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNSv2f32, ARM64_INS_FCVTNS: fcvtns.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNSv2f64, ARM64_INS_FCVTNS: fcvtns.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNSv4f32, ARM64_INS_FCVTNS: fcvtns.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNUUWDr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNUUWSr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNUUXDr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNUUXSr, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNUv1i32, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNUv1i64, ARM64_INS_FCVTNU: fcvtnu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNUv2f32, ARM64_INS_FCVTNU: fcvtnu.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNUv2f64, ARM64_INS_FCVTNU: fcvtnu.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNUv4f32, ARM64_INS_FCVTNU: fcvtnu.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNv2i32, ARM64_INS_FCVTN: fcvtn $rd.2s, $rn.2d */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNv4i16, ARM64_INS_FCVTN: fcvtn $rd.4h, $rn.4s */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNv4i32, ARM64_INS_FCVTN2: fcvtn2 $rd.4s, $rn.2d */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTNv8i16, ARM64_INS_FCVTN2: fcvtn2 $rd.8h, $rn.4s */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPSUWDr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPSUWSr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPSUXDr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPSUXSr, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPSv1i32, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPSv1i64, ARM64_INS_FCVTPS: fcvtps $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPSv2f32, ARM64_INS_FCVTPS: fcvtps.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPSv2f64, ARM64_INS_FCVTPS: fcvtps.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPSv4f32, ARM64_INS_FCVTPS: fcvtps.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPUUWDr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPUUWSr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPUUXDr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPUUXSr, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPUv1i32, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPUv1i64, ARM64_INS_FCVTPU: fcvtpu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPUv2f32, ARM64_INS_FCVTPU: fcvtpu.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPUv2f64, ARM64_INS_FCVTPU: fcvtpu.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTPUv4f32, ARM64_INS_FCVTPU: fcvtpu.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTSDr, ARM64_INS_FCVT: fcvt $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTSHr, ARM64_INS_FCVT: fcvt $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTXNv1i64, ARM64_INS_FCVTXN: fcvtxn $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTXNv2f32, ARM64_INS_FCVTXN: fcvtxn $rd.2s, $rn.2d */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTXNv4f32, ARM64_INS_FCVTXN2: fcvtxn2 $rd.4s, $rn.2d */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSSWDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSSWSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSSXDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSSXSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSUWDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSUWSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSUXDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSUXSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZS_IntSWDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZS_IntSWSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZS_IntSXDri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZS_IntSXSri, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZS_IntUWDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZS_IntUWSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZS_IntUXDr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZS_IntUXSr, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZS_Intv2f32, ARM64_INS_FCVTZS: fcvtzs.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZS_Intv2f64, ARM64_INS_FCVTZS: fcvtzs.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZS_Intv4f32, ARM64_INS_FCVTZS: fcvtzs.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSd, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSs, ARM64_INS_FCVTZS: fcvtzs $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSv1i32, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSv1i64, ARM64_INS_FCVTZS: fcvtzs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSv2f32, ARM64_INS_FCVTZS: fcvtzs.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSv2f64, ARM64_INS_FCVTZS: fcvtzs.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSv2i32_shift, ARM64_INS_FCVTZS: fcvtzs.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSv2i64_shift, ARM64_INS_FCVTZS: fcvtzs.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSv4f32, ARM64_INS_FCVTZS: fcvtzs.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZSv4i32_shift, ARM64_INS_FCVTZS: fcvtzs.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUSWDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUSWSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUSXDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUSXSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUUWDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUUWSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUUXDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUUXSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZU_IntSWDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZU_IntSWSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZU_IntSXDri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZU_IntSXSri, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZU_IntUWDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZU_IntUWSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZU_IntUXDr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZU_IntUXSr, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZU_Intv2f32, ARM64_INS_FCVTZU: fcvtzu.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZU_Intv2f64, ARM64_INS_FCVTZU: fcvtzu.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZU_Intv4f32, ARM64_INS_FCVTZU: fcvtzu.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUd, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUs, ARM64_INS_FCVTZU: fcvtzu $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUv1i32, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUv1i64, ARM64_INS_FCVTZU: fcvtzu $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUv2f32, ARM64_INS_FCVTZU: fcvtzu.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUv2f64, ARM64_INS_FCVTZU: fcvtzu.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUv2i32_shift, ARM64_INS_FCVTZU: fcvtzu.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUv2i64_shift, ARM64_INS_FCVTZU: fcvtzu.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUv4f32, ARM64_INS_FCVTZU: fcvtzu.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FCVTZUv4i32_shift, ARM64_INS_FCVTZU: fcvtzu.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FDIVDrr, ARM64_INS_FDIV: fdiv $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FDIVSrr, ARM64_INS_FDIV: fdiv $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FDIVv2f32, ARM64_INS_FDIV: fdiv.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FDIVv2f64, ARM64_INS_FDIV: fdiv.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FDIVv4f32, ARM64_INS_FDIV: fdiv.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMADDDrrr, ARM64_INS_FMADD: fmadd $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMADDSrrr, ARM64_INS_FMADD: fmadd $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMAXDrr, ARM64_INS_FMAX: fmax $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXNMDrr, ARM64_INS_FMAXNM: fmaxnm $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXNMPv2f32, ARM64_INS_FMAXNMP: fmaxnmp.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXNMPv2f64, ARM64_INS_FMAXNMP: fmaxnmp.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXNMPv2i32p, ARM64_INS_FMAXNMP: fmaxnmp.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXNMPv2i64p, ARM64_INS_FMAXNMP: fmaxnmp.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXNMPv4f32, ARM64_INS_FMAXNMP: fmaxnmp.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXNMSrr, ARM64_INS_FMAXNM: fmaxnm $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXNMVv4i32v, ARM64_INS_FMAXNMV: fmaxnmv.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXNMv2f32, ARM64_INS_FMAXNM: fmaxnm.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXNMv2f64, ARM64_INS_FMAXNM: fmaxnm.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXNMv4f32, ARM64_INS_FMAXNM: fmaxnm.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXPv2f32, ARM64_INS_FMAXP: fmaxp.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXPv2f64, ARM64_INS_FMAXP: fmaxp.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXPv2i32p, ARM64_INS_FMAXP: fmaxp.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXPv2i64p, ARM64_INS_FMAXP: fmaxp.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXPv4f32, ARM64_INS_FMAXP: fmaxp.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXSrr, ARM64_INS_FMAX: fmax $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXVv4i32v, ARM64_INS_FMAXV: fmaxv.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXv2f32, ARM64_INS_FMAX: fmax.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXv2f64, ARM64_INS_FMAX: fmax.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMAXv4f32, ARM64_INS_FMAX: fmax.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINDrr, ARM64_INS_FMIN: fmin $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINNMDrr, ARM64_INS_FMINNM: fminnm $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINNMPv2f32, ARM64_INS_FMINNMP: fminnmp.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINNMPv2f64, ARM64_INS_FMINNMP: fminnmp.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINNMPv2i32p, ARM64_INS_FMINNMP: fminnmp.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINNMPv2i64p, ARM64_INS_FMINNMP: fminnmp.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINNMPv4f32, ARM64_INS_FMINNMP: fminnmp.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINNMSrr, ARM64_INS_FMINNM: fminnm $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINNMVv4i32v, ARM64_INS_FMINNMV: fminnmv.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINNMv2f32, ARM64_INS_FMINNM: fminnm.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINNMv2f64, ARM64_INS_FMINNM: fminnm.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINNMv4f32, ARM64_INS_FMINNM: fminnm.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINPv2f32, ARM64_INS_FMINP: fminp.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINPv2f64, ARM64_INS_FMINP: fminp.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINPv2i32p, ARM64_INS_FMINP: fminp.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINPv2i64p, ARM64_INS_FMINP: fminp.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINPv4f32, ARM64_INS_FMINP: fminp.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINSrr, ARM64_INS_FMIN: fmin $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINVv4i32v, ARM64_INS_FMINV: fminv.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINv2f32, ARM64_INS_FMIN: fmin.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINv2f64, ARM64_INS_FMIN: fmin.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMINv4f32, ARM64_INS_FMIN: fmin.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMLAv1i32_indexed, ARM64_INS_FMLA: fmla.s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMLAv1i64_indexed, ARM64_INS_FMLA: fmla.d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMLAv2f32, ARM64_INS_FMLA: fmla.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMLAv2f64, ARM64_INS_FMLA: fmla.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMLAv2i32_indexed, ARM64_INS_FMLA: fmla.2s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMLAv2i64_indexed, ARM64_INS_FMLA: fmla.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMLAv4f32, ARM64_INS_FMLA: fmla.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMLAv4i32_indexed, ARM64_INS_FMLA: fmla.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMLSv1i32_indexed, ARM64_INS_FMLS: fmls.s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMLSv1i64_indexed, ARM64_INS_FMLS: fmls.d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMLSv2f32, ARM64_INS_FMLS: fmls.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMLSv2f64, ARM64_INS_FMLS: fmls.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMLSv2i32_indexed, ARM64_INS_FMLS: fmls.2s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMLSv2i64_indexed, ARM64_INS_FMLS: fmls.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMLSv4f32, ARM64_INS_FMLS: fmls.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMLSv4i32_indexed, ARM64_INS_FMLS: fmls.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMOVDXHighr, ARM64_INS_FMOV: fmov.d $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMOVDXr, ARM64_INS_FMOV: fmov $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMOVDi, ARM64_INS_FMOV: fmov $rd, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMOVDr, ARM64_INS_FMOV: fmov $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMOVSWr, ARM64_INS_FMOV: fmov $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMOVSi, ARM64_INS_FMOV: fmov $rd, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMOVSr, ARM64_INS_FMOV: fmov $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMOVWSr, ARM64_INS_FMOV: fmov $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMOVXDHighr, ARM64_INS_FMOV: fmov.d $rd$idx, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMOVXDr, ARM64_INS_FMOV: fmov $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMOVv2f32_ns, ARM64_INS_FMOV: fmov.2s $rd, $imm8 */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ,0 }
+},
+{ /* AArch64_FMOVv2f64_ns, ARM64_INS_FMOV: fmov.2d $rd, $imm8 */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ,0 }
+},
+{ /* AArch64_FMOVv4f32_ns, ARM64_INS_FMOV: fmov.4s $rd, $imm8 */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ,0 }
+},
+{ /* AArch64_FMSUBDrrr, ARM64_INS_FMSUB: fmsub $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMSUBSrrr, ARM64_INS_FMSUB: fmsub $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMULDrr, ARM64_INS_FMUL: fmul $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMULSrr, ARM64_INS_FMUL: fmul $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMULX32, ARM64_INS_FMULX: fmulx $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMULX64, ARM64_INS_FMULX: fmulx $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMULXv1i32_indexed, ARM64_INS_FMULX: fmulx.s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMULXv1i64_indexed, ARM64_INS_FMULX: fmulx.d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMULXv2f32, ARM64_INS_FMULX: fmulx.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMULXv2f64, ARM64_INS_FMULX: fmulx.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMULXv2i32_indexed, ARM64_INS_FMULX: fmulx.2s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMULXv2i64_indexed, ARM64_INS_FMULX: fmulx.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMULXv4f32, ARM64_INS_FMULX: fmulx.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMULXv4i32_indexed, ARM64_INS_FMULX: fmulx.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMULv1i32_indexed, ARM64_INS_FMUL: fmul.s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMULv1i64_indexed, ARM64_INS_FMUL: fmul.d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMULv2f32, ARM64_INS_FMUL: fmul.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMULv2f64, ARM64_INS_FMUL: fmul.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMULv2i32_indexed, ARM64_INS_FMUL: fmul.2s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMULv2i64_indexed, ARM64_INS_FMUL: fmul.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FMULv4f32, ARM64_INS_FMUL: fmul.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FMULv4i32_indexed, ARM64_INS_FMUL: fmul.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FNEGDr, ARM64_INS_FNEG: fneg $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FNEGSr, ARM64_INS_FNEG: fneg $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FNEGv2f32, ARM64_INS_FNEG: fneg.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FNEGv2f64, ARM64_INS_FNEG: fneg.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FNEGv4f32, ARM64_INS_FNEG: fneg.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FNMADDDrrr, ARM64_INS_FNMADD: fnmadd $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FNMADDSrrr, ARM64_INS_FNMADD: fnmadd $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FNMSUBDrrr, ARM64_INS_FNMSUB: fnmsub $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FNMSUBSrrr, ARM64_INS_FNMSUB: fnmsub $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_FNMULDrr, ARM64_INS_FNMUL: fnmul $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FNMULSrr, ARM64_INS_FNMUL: fnmul $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRECPEv1i32, ARM64_INS_FRECPE: frecpe $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRECPEv1i64, ARM64_INS_FRECPE: frecpe $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRECPEv2f32, ARM64_INS_FRECPE: frecpe.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRECPEv2f64, ARM64_INS_FRECPE: frecpe.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRECPEv4f32, ARM64_INS_FRECPE: frecpe.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRECPS32, ARM64_INS_FRECPS: frecps $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRECPS64, ARM64_INS_FRECPS: frecps $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRECPSv2f32, ARM64_INS_FRECPS: frecps.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRECPSv2f64, ARM64_INS_FRECPS: frecps.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRECPSv4f32, ARM64_INS_FRECPS: frecps.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRECPXv1i32, ARM64_INS_FRECPX: frecpx $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRECPXv1i64, ARM64_INS_FRECPX: frecpx $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTADr, ARM64_INS_FRINTA: frinta $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTASr, ARM64_INS_FRINTA: frinta $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTAv2f32, ARM64_INS_FRINTA: frinta.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTAv2f64, ARM64_INS_FRINTA: frinta.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTAv4f32, ARM64_INS_FRINTA: frinta.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTIDr, ARM64_INS_FRINTI: frinti $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTISr, ARM64_INS_FRINTI: frinti $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTIv2f32, ARM64_INS_FRINTI: frinti.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTIv2f64, ARM64_INS_FRINTI: frinti.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTIv4f32, ARM64_INS_FRINTI: frinti.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTMDr, ARM64_INS_FRINTM: frintm $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTMSr, ARM64_INS_FRINTM: frintm $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTMv2f32, ARM64_INS_FRINTM: frintm.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTMv2f64, ARM64_INS_FRINTM: frintm.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTMv4f32, ARM64_INS_FRINTM: frintm.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTNDr, ARM64_INS_FRINTN: frintn $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTNSr, ARM64_INS_FRINTN: frintn $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTNv2f32, ARM64_INS_FRINTN: frintn.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTNv2f64, ARM64_INS_FRINTN: frintn.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTNv4f32, ARM64_INS_FRINTN: frintn.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTPDr, ARM64_INS_FRINTP: frintp $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTPSr, ARM64_INS_FRINTP: frintp $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTPv2f32, ARM64_INS_FRINTP: frintp.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTPv2f64, ARM64_INS_FRINTP: frintp.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTPv4f32, ARM64_INS_FRINTP: frintp.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTXDr, ARM64_INS_FRINTX: frintx $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTXSr, ARM64_INS_FRINTX: frintx $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTXv2f32, ARM64_INS_FRINTX: frintx.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTXv2f64, ARM64_INS_FRINTX: frintx.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTXv4f32, ARM64_INS_FRINTX: frintx.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTZDr, ARM64_INS_FRINTZ: frintz $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTZSr, ARM64_INS_FRINTZ: frintz $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTZv2f32, ARM64_INS_FRINTZ: frintz.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTZv2f64, ARM64_INS_FRINTZ: frintz.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRINTZv4f32, ARM64_INS_FRINTZ: frintz.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRSQRTEv1i32, ARM64_INS_FRSQRTE: frsqrte $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRSQRTEv1i64, ARM64_INS_FRSQRTE: frsqrte $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRSQRTEv2f32, ARM64_INS_FRSQRTE: frsqrte.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRSQRTEv2f64, ARM64_INS_FRSQRTE: frsqrte.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRSQRTEv4f32, ARM64_INS_FRSQRTE: frsqrte.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRSQRTS32, ARM64_INS_FRSQRTS: frsqrts $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRSQRTS64, ARM64_INS_FRSQRTS: frsqrts $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRSQRTSv2f32, ARM64_INS_FRSQRTS: frsqrts.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRSQRTSv2f64, ARM64_INS_FRSQRTS: frsqrts.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FRSQRTSv4f32, ARM64_INS_FRSQRTS: frsqrts.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FSQRTDr, ARM64_INS_FSQRT: fsqrt $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FSQRTSr, ARM64_INS_FSQRT: fsqrt $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FSQRTv2f32, ARM64_INS_FSQRT: fsqrt.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FSQRTv2f64, ARM64_INS_FSQRT: fsqrt.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FSQRTv4f32, ARM64_INS_FSQRT: fsqrt.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_FSUBDrr, ARM64_INS_FSUB: fsub $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FSUBSrr, ARM64_INS_FSUB: fsub $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FSUBv2f32, ARM64_INS_FSUB: fsub.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FSUBv2f64, ARM64_INS_FSUB: fsub.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_FSUBv4f32, ARM64_INS_FSUB: fsub.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_HINT, ARM64_INS_HINT: hint $imm */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_HLT, ARM64_INS_HLT: hlt $imm */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_HVC, ARM64_INS_HVC: hvc $imm */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_INSvi16gpr, ARM64_INS_INS: ins.h $rd$idx, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_INSvi16lane, ARM64_INS_INS: ins.h $rd$idx, $rn$idx2 */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_INSvi32gpr, ARM64_INS_INS: ins.s $rd$idx, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_INSvi32lane, ARM64_INS_INS: ins.s $rd$idx, $rn$idx2 */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_INSvi64gpr, ARM64_INS_INS: ins.d $rd$idx, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_INSvi64lane, ARM64_INS_INS: ins.d $rd$idx, $rn$idx2 */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_INSvi8gpr, ARM64_INS_INS: ins.b $rd$idx, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_INSvi8lane, ARM64_INS_INS: ins.b $rd$idx, $rn$idx2 */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_ISB, ARM64_INS_ISB: isb $crm */
+ 0,
+ { 0 }
+},
+{ /* AArch64_LD1Fourv16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Fourv16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Fourv1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Fourv1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Fourv2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Fourv2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Fourv2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Fourv2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Fourv4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Fourv4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Fourv4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Fourv4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Fourv8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Fourv8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Fourv8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Fourv8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Onev16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Onev16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Onev1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Onev1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Onev2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Onev2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LD1Onev2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Onev2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Onev4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Onev4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Onev4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Onev4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Onev8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Onev8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Onev8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Onev8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv16b, ARM64_INS_LD1R: ld1r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv16b_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv1d, ARM64_INS_LD1R: ld1r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv1d_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv2d, ARM64_INS_LD1R: ld1r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv2d_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv2s, ARM64_INS_LD1R: ld1r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv2s_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv4h, ARM64_INS_LD1R: ld1r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv4h_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv4s, ARM64_INS_LD1R: ld1r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv4s_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv8b, ARM64_INS_LD1R: ld1r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv8b_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv8h, ARM64_INS_LD1R: ld1r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Rv8h_POST, ARM64_INS_LD1R: ld1r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Threev8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov16b, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov16b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov1d, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov1d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov2d, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov2d_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov2s, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov2s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov4h, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov4h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov4s, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov4s_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov8b, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov8b_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov8h, ARM64_INS_LD1: ld1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1Twov8h_POST, ARM64_INS_LD1: ld1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1i16, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1i16_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1i32, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1i32_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1i64, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1i64_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1i8, ARM64_INS_LD1: ld1 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD1i8_POST, ARM64_INS_LD1: ld1 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv16b, ARM64_INS_LD2R: ld2r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv16b_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv1d, ARM64_INS_LD2R: ld2r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv1d_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv2d, ARM64_INS_LD2R: ld2r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv2d_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv2s, ARM64_INS_LD2R: ld2r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv2s_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv4h, ARM64_INS_LD2R: ld2r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv4h_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv4s, ARM64_INS_LD2R: ld2r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv4s_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv8b, ARM64_INS_LD2R: ld2r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv8b_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv8h, ARM64_INS_LD2R: ld2r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Rv8h_POST, ARM64_INS_LD2R: ld2r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD2Twov16b, ARM64_INS_LD2: ld2 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
+},
+{ /* AArch64_LD2Twov16b_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LD2Twov2d, ARM64_INS_LD2: ld2 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
+},
+{ /* AArch64_LD2Twov2d_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LD2Twov2s, ARM64_INS_LD2: ld2 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
+},
+{ /* AArch64_LD2Twov2s_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LD2Twov4h, ARM64_INS_LD2: ld2 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
+},
+{ /* AArch64_LD2Twov4h_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LD2Twov4s, ARM64_INS_LD2: ld2 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
+},
+{ /* AArch64_LD2Twov4s_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LD2Twov8b, ARM64_INS_LD2: ld2 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
+},
+{ /* AArch64_LD2Twov8b_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LD2Twov8h, ARM64_INS_LD2: ld2 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
+},
+{ /* AArch64_LD2Twov8h_POST, ARM64_INS_LD2: ld2 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LD2i16, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
+},
+{ /* AArch64_LD2i16_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LD2i32, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
+},
+{ /* AArch64_LD2i32_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LD2i64, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
+},
+{ /* AArch64_LD2i64_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LD2i8, ARM64_INS_LD2: ld2 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0}
+},
+{ /* AArch64_LD2i8_POST, ARM64_INS_LD2: ld2 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LD3Rv16b, ARM64_INS_LD3R: ld3r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Rv16b_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Rv1d, ARM64_INS_LD3R: ld3r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Rv1d_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Rv2d, ARM64_INS_LD3R: ld3r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Rv2d_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Rv2s, ARM64_INS_LD3R: ld3r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Rv2s_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Rv4h, ARM64_INS_LD3R: ld3r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Rv4h_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Rv4s, ARM64_INS_LD3R: ld3r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Rv4s_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Rv8b, ARM64_INS_LD3R: ld3r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Rv8b_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Rv8h, ARM64_INS_LD3R: ld3r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Rv8h_POST, ARM64_INS_LD3R: ld3r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Threev16b, ARM64_INS_LD3: ld3 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Threev16b_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Threev2d, ARM64_INS_LD3: ld3 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Threev2d_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Threev2s, ARM64_INS_LD3: ld3 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Threev2s_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Threev4h, ARM64_INS_LD3: ld3 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Threev4h_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Threev4s, ARM64_INS_LD3: ld3 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Threev4s_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Threev8b, ARM64_INS_LD3: ld3 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Threev8b_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Threev8h, ARM64_INS_LD3: ld3 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3Threev8h_POST, ARM64_INS_LD3: ld3 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3i16, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3i16_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LD3i32, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3i32_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LD3i64, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3i64_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LD3i8, ARM64_INS_LD3: ld3 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD3i8_POST, ARM64_INS_LD3: ld3 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LD4Fourv16b, ARM64_INS_LD4: ld4 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Fourv16b_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Fourv2d, ARM64_INS_LD4: ld4 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Fourv2d_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Fourv2s, ARM64_INS_LD4: ld4 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Fourv2s_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Fourv4h, ARM64_INS_LD4: ld4 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Fourv4h_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Fourv4s, ARM64_INS_LD4: ld4 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Fourv4s_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Fourv8b, ARM64_INS_LD4: ld4 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Fourv8b_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Fourv8h, ARM64_INS_LD4: ld4 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Fourv8h_POST, ARM64_INS_LD4: ld4 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv16b, ARM64_INS_LD4R: ld4r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv16b_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv1d, ARM64_INS_LD4R: ld4r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv1d_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv2d, ARM64_INS_LD4R: ld4r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv2d_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv2s, ARM64_INS_LD4R: ld4r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv2s_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv4h, ARM64_INS_LD4R: ld4r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv4h_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv4s, ARM64_INS_LD4R: ld4r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv4s_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv8b, ARM64_INS_LD4R: ld4r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv8b_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv8h, ARM64_INS_LD4R: ld4r $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4Rv8h_POST, ARM64_INS_LD4R: ld4r $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4i16, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4i16_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LD4i32, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4i32_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LD4i64, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4i64_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LD4i8, ARM64_INS_LD4: ld4 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_LD4i8_POST, ARM64_INS_LD4: ld4 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDARB, ARM64_INS_LDARB: ldarb $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDARH, ARM64_INS_LDARH: ldarh $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDARW, ARM64_INS_LDAR: ldar $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDARX, ARM64_INS_LDAR: ldar $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDAXPW, ARM64_INS_LDAXP: ldaxp $rt, $rt2, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDAXPX, ARM64_INS_LDAXP: ldaxp $rt, $rt2, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDAXRB, ARM64_INS_LDAXRB: ldaxrb $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDAXRH, ARM64_INS_LDAXRH: ldaxrh $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDAXRW, ARM64_INS_LDAXR: ldaxr $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDAXRX, ARM64_INS_LDAXR: ldaxr $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDNPDi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDNPQi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDNPSi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDNPWi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDNPXi, ARM64_INS_LDNP: ldnp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPDi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPDpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPDpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPQi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPQpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPQpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPSWi, ARM64_INS_LDPSW: ldpsw $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPSWpost, ARM64_INS_LDPSW: ldpsw $rt, $rt2, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPSWpre, ARM64_INS_LDPSW: ldpsw $rt, $rt2, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPSi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPSpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPSpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPWi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPWpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPWpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPXi, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPXpost, ARM64_INS_LDP: ldp $rt, $rt2, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDPXpre, ARM64_INS_LDP: ldp $rt, $rt2, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRBBpost, ARM64_INS_LDRB: ldrb $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRBBpre, ARM64_INS_LDRB: ldrb $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRBBroW, ARM64_INS_LDRB: ldrb $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRBBroX, ARM64_INS_LDRB: ldrb $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRBBui, ARM64_INS_LDRB: ldrb $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRBpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRBpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRBroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRBroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRBui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRDl, ARM64_INS_LDR: ldr $rt, $label */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRDpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRDpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRDroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
+ 00,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRDroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRDui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRHHpost, ARM64_INS_LDRH: ldrh $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRHHpre, ARM64_INS_LDRH: ldrh $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRHHroW, ARM64_INS_LDRH: ldrh $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRHHroX, ARM64_INS_LDRH: ldrh $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRHHui, ARM64_INS_LDRH: ldrh $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRHpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRHpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRHroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRHroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRHui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRQl, ARM64_INS_LDR: ldr $rt, $label */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRQpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRQpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRQroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRQroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRQui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSBWpost, ARM64_INS_LDRSB: ldrsb $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSBWpre, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSBWroW, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRSBWroX, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRSBWui, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSBXpost, ARM64_INS_LDRSB: ldrsb $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSBXpre, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSBXroW, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRSBXroX, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRSBXui, ARM64_INS_LDRSB: ldrsb $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSHWpost, ARM64_INS_LDRSH: ldrsh $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSHWpre, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSHWroW, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRSHWroX, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRSHWui, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSHXpost, ARM64_INS_LDRSH: ldrsh $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSHXpre, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSHXroW, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRSHXroX, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRSHXui, ARM64_INS_LDRSH: ldrsh $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSWl, ARM64_INS_LDRSW: ldrsw $rt, $label */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSWpost, ARM64_INS_LDRSW: ldrsw $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSWpre, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSWroW, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRSWroX, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRSWui, ARM64_INS_LDRSW: ldrsw $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSl, ARM64_INS_LDR: ldr $rt, $label */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRSroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRSroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRSui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRWl, ARM64_INS_LDR: ldr $rt, $label */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRWpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRWpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRWroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRWroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRWui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRXl, ARM64_INS_LDR: ldr $rt, $label */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRXpost, ARM64_INS_LDR: ldr $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRXpre, ARM64_INS_LDR: ldr $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDRXroW, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRXroX, ARM64_INS_LDR: ldr $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_LDRXui, ARM64_INS_LDR: ldr $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDTRBi, ARM64_INS_LDTRB: ldtrb $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDTRHi, ARM64_INS_LDTRH: ldtrh $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDTRSBWi, ARM64_INS_LDTRSB: ldtrsb $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDTRSBXi, ARM64_INS_LDTRSB: ldtrsb $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDTRSHWi, ARM64_INS_LDTRSH: ldtrsh $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDTRSHXi, ARM64_INS_LDTRSH: ldtrsh $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDTRSWi, ARM64_INS_LDTRSW: ldtrsw $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDTRWi, ARM64_INS_LDTR: ldtr $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDTRXi, ARM64_INS_LDTR: ldtr $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDURBBi, ARM64_INS_LDURB: ldurb $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDURBi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDURDi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDURHHi, ARM64_INS_LDURH: ldurh $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDURHi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDURQi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDURSBWi, ARM64_INS_LDURSB: ldursb $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDURSBXi, ARM64_INS_LDURSB: ldursb $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDURSHWi, ARM64_INS_LDURSH: ldursh $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDURSHXi, ARM64_INS_LDURSH: ldursh $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDURSWi, ARM64_INS_LDURSW: ldursw $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDURSi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDURWi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDURXi, ARM64_INS_LDUR: ldur $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_LDXPW, ARM64_INS_LDXP: ldxp $rt, $rt2, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDXPX, ARM64_INS_LDXP: ldxp $rt, $rt2, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDXRB, ARM64_INS_LDXRB: ldxrb $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDXRH, ARM64_INS_LDXRH: ldxrh $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDXRW, ARM64_INS_LDXR: ldxr $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LDXRX, ARM64_INS_LDXR: ldxr $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LSLVWr, ARM64_INS_LSL: lsl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LSLVXr, ARM64_INS_LSL: lsl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LSRVWr, ARM64_INS_LSR: lsr $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_LSRVXr, ARM64_INS_LSR: lsr $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MADDWrrr, ARM64_INS_MADD: madd $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_MADDXrrr, ARM64_INS_MADD: madd $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_MLAv16i8, ARM64_INS_MLA: mla.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MLAv2i32, ARM64_INS_MLA: mla.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MLAv2i32_indexed, ARM64_INS_MLA: mla.2s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_MLAv4i16, ARM64_INS_MLA: mla.4h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MLAv4i16_indexed, ARM64_INS_MLA: mla.4h $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_MLAv4i32, ARM64_INS_MLA: mla.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MLAv4i32_indexed, ARM64_INS_MLA: mla.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_MLAv8i16, ARM64_INS_MLA: mla.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MLAv8i16_indexed, ARM64_INS_MLA: mla.8h $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_MLAv8i8, ARM64_INS_MLA: mla.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MLSv16i8, ARM64_INS_MLS: mls.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MLSv2i32, ARM64_INS_MLS: mls.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MLSv2i32_indexed, ARM64_INS_MLS: mls.2s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_MLSv4i16, ARM64_INS_MLS: mls.4h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MLSv4i16_indexed, ARM64_INS_MLS: mls.4h $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_MLSv4i32, ARM64_INS_MLS: mls.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MLSv4i32_indexed, ARM64_INS_MLS: mls.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_MLSv8i16, ARM64_INS_MLS: mls.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MLSv8i16_indexed, ARM64_INS_MLS: mls.8h $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_MLSv8i8, ARM64_INS_MLS: mls.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVID, ARM64_INS_MOVI: movi $rd, $imm8 */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVIv16b_ns, ARM64_INS_MOVI: movi.16b $rd, $imm8 */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVIv2d_ns, ARM64_INS_MOVI: movi.2d $rd, $imm8 */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVIv2i32, ARM64_INS_MOVI: movi.2s $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVIv2s_msl, ARM64_INS_MOVI: movi.2s $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVIv4i16, ARM64_INS_MOVI: movi.4h $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVIv4i32, ARM64_INS_MOVI: movi.4s $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVIv4s_msl, ARM64_INS_MOVI: movi.4s $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVIv8b_ns, ARM64_INS_MOVI: movi.8b $rd, $imm8 */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVIv8i16, ARM64_INS_MOVI: movi.8h $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVKWi, ARM64_INS_MOVK: movk $rd, $imm$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVKXi, ARM64_INS_MOVK: movk $rd, $imm$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVNWi, ARM64_INS_MOVN: movn $rd, $imm$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVNXi, ARM64_INS_MOVN: movn $rd, $imm$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVZWi, ARM64_INS_MOVZ: movz $rd, $imm$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MOVZXi, ARM64_INS_MOVZ: movz $rd, $imm$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MRS, ARM64_INS_MRS: mrs $rt, $systemreg */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_MSR, ARM64_INS_MSR: msr $systemreg, $rt */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_MSRpstate, ARM64_INS_MSR: msr $pstate_field, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MSUBWrrr, ARM64_INS_MSUB: msub $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_MSUBXrrr, ARM64_INS_MSUB: msub $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_MULv16i8, ARM64_INS_MUL: mul.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MULv2i32, ARM64_INS_MUL: mul.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MULv2i32_indexed, ARM64_INS_MUL: mul.2s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_MULv4i16, ARM64_INS_MUL: mul.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MULv4i16_indexed, ARM64_INS_MUL: mul.4h $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_MULv4i32, ARM64_INS_MUL: mul.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MULv4i32_indexed, ARM64_INS_MUL: mul.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MULv8i16, ARM64_INS_MUL: mul.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MULv8i16_indexed, ARM64_INS_MUL: mul.8h $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MULv8i8, ARM64_INS_MUL: mul.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MVNIv2i32, ARM64_INS_MVNI: mvni.2s $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MVNIv2s_msl, ARM64_INS_MVNI: mvni.2s $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MVNIv4i16, ARM64_INS_MVNI: mvni.4h $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MVNIv4i32, ARM64_INS_MVNI: mvni.4s $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MVNIv4s_msl, ARM64_INS_MVNI: mvni.4s $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_MVNIv8i16, ARM64_INS_MVNI: mvni.8h $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_NEGv16i8, ARM64_INS_NEG: neg.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_NEGv1i64, ARM64_INS_NEG: neg $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_NEGv2i32, ARM64_INS_NEG: neg.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_NEGv2i64, ARM64_INS_NEG: neg.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_NEGv4i16, ARM64_INS_NEG: neg.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_NEGv4i32, ARM64_INS_NEG: neg.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_NEGv8i16, ARM64_INS_NEG: neg.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_NEGv8i8, ARM64_INS_NEG: neg.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_NOTv16i8, ARM64_INS_NOT: not.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_NOTv8i8, ARM64_INS_NOT: not.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ORNWrs, ARM64_INS_ORN: orn $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ORNXrs, ARM64_INS_ORN: orn $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ORNv16i8, ARM64_INS_ORN: orn.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ORNv8i8, ARM64_INS_ORN: orn.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ORRWri, ARM64_INS_ORR: orr $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ORRWrs, ARM64_INS_ORR: orr $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ORRXri, ARM64_INS_ORR: orr $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ORRXrs, ARM64_INS_ORR: orr $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ORRv16i8, ARM64_INS_ORR: orr.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ORRv2i32, ARM64_INS_ORR: orr.2s $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ORRv4i16, ARM64_INS_ORR: orr.4h $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ORRv4i32, ARM64_INS_ORR: orr.4s $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ORRv8i16, ARM64_INS_ORR: orr.8h $rd, $imm8$shift */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ORRv8i8, ARM64_INS_ORR: orr.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_PMULLv16i8, ARM64_INS_PMULL2: pmull2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_PMULLv1i64, ARM64_INS_PMULL: pmull.1q $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_PMULLv2i64, ARM64_INS_PMULL2: pmull2.1q $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_PMULLv8i8, ARM64_INS_PMULL: pmull.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_PMULv16i8, ARM64_INS_PMUL: pmul.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_PMULv8i8, ARM64_INS_PMUL: pmul.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_PRFMl, ARM64_INS_PRFM: prfm $rt, $label */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_PRFMroW, ARM64_INS_PRFM: prfm $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_PRFMroX, ARM64_INS_PRFM: prfm $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_PRFMui, ARM64_INS_PRFM: prfm $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_PRFUMi, ARM64_INS_PRFUM: prfum $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_RADDHNv2i64_v2i32, ARM64_INS_RADDHN: raddhn.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RADDHNv2i64_v4i32, ARM64_INS_RADDHN2: raddhn2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RADDHNv4i32_v4i16, ARM64_INS_RADDHN: raddhn.4h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RADDHNv4i32_v8i16, ARM64_INS_RADDHN2: raddhn2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RADDHNv8i16_v16i8, ARM64_INS_RADDHN2: raddhn2.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RADDHNv8i16_v8i8, ARM64_INS_RADDHN: raddhn.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RBITWr, ARM64_INS_RBIT: rbit $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_RBITXr, ARM64_INS_RBIT: rbit $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_RBITv16i8, ARM64_INS_RBIT: rbit.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_RBITv8i8, ARM64_INS_RBIT: rbit.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_RET, ARM64_INS_RET: ret $rn */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_REV16Wr, ARM64_INS_REV16: rev16 $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REV16Xr, ARM64_INS_REV16: rev16 $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REV16v16i8, ARM64_INS_REV16: rev16.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REV16v8i8, ARM64_INS_REV16: rev16.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REV32Xr, ARM64_INS_REV32: rev32 $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REV32v16i8, ARM64_INS_REV32: rev32.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REV32v4i16, ARM64_INS_REV32: rev32.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REV32v8i16, ARM64_INS_REV32: rev32.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REV32v8i8, ARM64_INS_REV32: rev32.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REV64v16i8, ARM64_INS_REV64: rev64.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REV64v2i32, ARM64_INS_REV64: rev64.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REV64v4i16, ARM64_INS_REV64: rev64.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REV64v4i32, ARM64_INS_REV64: rev64.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REV64v8i16, ARM64_INS_REV64: rev64.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REV64v8i8, ARM64_INS_REV64: rev64.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REVWr, ARM64_INS_REV: rev $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_REVXr, ARM64_INS_REV: rev $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_RORVWr, ARM64_INS_ROR: ror $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RORVXr, ARM64_INS_ROR: ror $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RSHRNv16i8_shift, ARM64_INS_RSHRN2: rshrn2.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RSHRNv2i32_shift, ARM64_INS_RSHRN: rshrn.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RSHRNv4i16_shift, ARM64_INS_RSHRN: rshrn.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RSHRNv4i32_shift, ARM64_INS_RSHRN2: rshrn2.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RSHRNv8i16_shift, ARM64_INS_RSHRN2: rshrn2.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RSHRNv8i8_shift, ARM64_INS_RSHRN: rshrn.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RSUBHNv2i64_v2i32, ARM64_INS_RSUBHN: rsubhn.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RSUBHNv2i64_v4i32, ARM64_INS_RSUBHN2: rsubhn2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RSUBHNv4i32_v4i16, ARM64_INS_RSUBHN: rsubhn.4h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RSUBHNv4i32_v8i16, ARM64_INS_RSUBHN2: rsubhn2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RSUBHNv8i16_v16i8, ARM64_INS_RSUBHN2: rsubhn2.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_RSUBHNv8i16_v8i8, ARM64_INS_RSUBHN: rsubhn.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABALv16i8_v8i16, ARM64_INS_SABAL2: sabal2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABALv2i32_v2i64, ARM64_INS_SABAL: sabal.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABALv4i16_v4i32, ARM64_INS_SABAL: sabal.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABALv4i32_v2i64, ARM64_INS_SABAL2: sabal2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABALv8i16_v4i32, ARM64_INS_SABAL2: sabal2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABALv8i8_v8i16, ARM64_INS_SABAL: sabal.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABAv16i8, ARM64_INS_SABA: saba.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABAv2i32, ARM64_INS_SABA: saba.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABAv4i16, ARM64_INS_SABA: saba.4h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABAv4i32, ARM64_INS_SABA: saba.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABAv8i16, ARM64_INS_SABA: saba.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABAv8i8, ARM64_INS_SABA: saba.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABDLv16i8_v8i16, ARM64_INS_SABDL2: sabdl2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABDLv2i32_v2i64, ARM64_INS_SABDL: sabdl.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABDLv4i16_v4i32, ARM64_INS_SABDL: sabdl.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABDLv4i32_v2i64, ARM64_INS_SABDL2: sabdl2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABDLv8i16_v4i32, ARM64_INS_SABDL2: sabdl2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABDLv8i8_v8i16, ARM64_INS_SABDL: sabdl.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABDv16i8, ARM64_INS_SABD: sabd.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABDv2i32, ARM64_INS_SABD: sabd.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABDv4i16, ARM64_INS_SABD: sabd.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABDv4i32, ARM64_INS_SABD: sabd.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABDv8i16, ARM64_INS_SABD: sabd.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SABDv8i8, ARM64_INS_SABD: sabd.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADALPv16i8_v8i16, ARM64_INS_SADALP: sadalp.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADALPv2i32_v1i64, ARM64_INS_SADALP: sadalp.1d $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADALPv4i16_v2i32, ARM64_INS_SADALP: sadalp.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADALPv4i32_v2i64, ARM64_INS_SADALP: sadalp.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADALPv8i16_v4i32, ARM64_INS_SADALP: sadalp.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADALPv8i8_v4i16, ARM64_INS_SADALP: sadalp.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLPv16i8_v8i16, ARM64_INS_SADDLP: saddlp.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLPv2i32_v1i64, ARM64_INS_SADDLP: saddlp.1d $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLPv4i16_v2i32, ARM64_INS_SADDLP: saddlp.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLPv4i32_v2i64, ARM64_INS_SADDLP: saddlp.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLPv8i16_v4i32, ARM64_INS_SADDLP: saddlp.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLPv8i8_v4i16, ARM64_INS_SADDLP: saddlp.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLVv16i8v, ARM64_INS_SADDLV: saddlv.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLVv4i16v, ARM64_INS_SADDLV: saddlv.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLVv4i32v, ARM64_INS_SADDLV: saddlv.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLVv8i16v, ARM64_INS_SADDLV: saddlv.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLVv8i8v, ARM64_INS_SADDLV: saddlv.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLv16i8_v8i16, ARM64_INS_SADDL2: saddl2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLv2i32_v2i64, ARM64_INS_SADDL: saddl.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLv4i16_v4i32, ARM64_INS_SADDL: saddl.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLv4i32_v2i64, ARM64_INS_SADDL2: saddl2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLv8i16_v4i32, ARM64_INS_SADDL2: saddl2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDLv8i8_v8i16, ARM64_INS_SADDL: saddl.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDWv16i8_v8i16, ARM64_INS_SADDW2: saddw2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDWv2i32_v2i64, ARM64_INS_SADDW: saddw.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDWv4i16_v4i32, ARM64_INS_SADDW: saddw.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDWv4i32_v2i64, ARM64_INS_SADDW2: saddw2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDWv8i16_v4i32, ARM64_INS_SADDW2: saddw2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SADDWv8i8_v8i16, ARM64_INS_SADDW: saddw.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SBCSWr, ARM64_INS_SBCS: sbcs $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SBCSXr, ARM64_INS_SBCS: sbcs $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SBCWr, ARM64_INS_SBC: sbc $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SBCXr, ARM64_INS_SBC: sbc $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SBFMWri, ARM64_INS_SBFM: sbfm $rd, $rn, $immr, $imms */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SBFMXri, ARM64_INS_SBFM: sbfm $rd, $rn, $immr, $imms */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SCVTFSWDri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFSWSri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFSXDri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFSXSri, ARM64_INS_SCVTF: scvtf $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFUWDri, ARM64_INS_SCVTF: scvtf $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFUWSri, ARM64_INS_SCVTF: scvtf $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFUXDri, ARM64_INS_SCVTF: scvtf $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFUXSri, ARM64_INS_SCVTF: scvtf $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFd, ARM64_INS_SCVTF: scvtf $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFs, ARM64_INS_SCVTF: scvtf $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFv1i32, ARM64_INS_SCVTF: scvtf $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFv1i64, ARM64_INS_SCVTF: scvtf $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFv2f32, ARM64_INS_SCVTF: scvtf.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFv2f64, ARM64_INS_SCVTF: scvtf.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFv2i32_shift, ARM64_INS_SCVTF: scvtf.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFv2i64_shift, ARM64_INS_SCVTF: scvtf.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFv4f32, ARM64_INS_SCVTF: scvtf.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0}
+},
+{ /* AArch64_SCVTFv4i32_shift, ARM64_INS_SCVTF: scvtf.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SDIVWr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SDIVXr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SDIV_IntWr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SDIV_IntXr, ARM64_INS_SDIV: sdiv $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHA1Crrr, ARM64_INS_SHA1C: sha1c.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SHA1Hrr, ARM64_INS_SHA1H: sha1h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SHA1Mrrr, ARM64_INS_SHA1M: sha1m.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SHA1Prrr, ARM64_INS_SHA1P: sha1p.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SHA1SU0rrr, ARM64_INS_SHA1SU0: sha1su0.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SHA1SU1rr, ARM64_INS_SHA1SU1: sha1su1.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SHA256H2rrr, ARM64_INS_SHA256H2: sha256h2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SHA256Hrrr, ARM64_INS_SHA256H: sha256h.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SHA256SU0rr, ARM64_INS_SHA256SU0: sha256su0.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SHA256SU1rrr, ARM64_INS_SHA256SU1: sha256su1.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SHADDv16i8, ARM64_INS_SHADD: shadd.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHADDv2i32, ARM64_INS_SHADD: shadd.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHADDv4i16, ARM64_INS_SHADD: shadd.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHADDv4i32, ARM64_INS_SHADD: shadd.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHADDv8i16, ARM64_INS_SHADD: shadd.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHADDv8i8, ARM64_INS_SHADD: shadd.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHLLv16i8, ARM64_INS_SHLL2: shll2.8h $rd, $rn, #8 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHLLv2i32, ARM64_INS_SHLL: shll.2d $rd, $rn, #32 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHLLv4i16, ARM64_INS_SHLL: shll.4s $rd, $rn, #16 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHLLv4i32, ARM64_INS_SHLL2: shll2.2d $rd, $rn, #32 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHLLv8i16, ARM64_INS_SHLL2: shll2.4s $rd, $rn, #16 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHLLv8i8, ARM64_INS_SHLL: shll.8h $rd, $rn, #8 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHLd, ARM64_INS_SHL: shl $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHLv16i8_shift, ARM64_INS_SHL: shl.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHLv2i32_shift, ARM64_INS_SHL: shl.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHLv2i64_shift, ARM64_INS_SHL: shl.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHLv4i16_shift, ARM64_INS_SHL: shl.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHLv4i32_shift, ARM64_INS_SHL: shl.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHLv8i16_shift, ARM64_INS_SHL: shl.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHLv8i8_shift, ARM64_INS_SHL: shl.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHRNv16i8_shift, ARM64_INS_SHRN2: shrn2.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHRNv2i32_shift, ARM64_INS_SHRN: shrn.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHRNv4i16_shift, ARM64_INS_SHRN: shrn.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHRNv4i32_shift, ARM64_INS_SHRN2: shrn2.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHRNv8i16_shift, ARM64_INS_SHRN2: shrn2.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHRNv8i8_shift, ARM64_INS_SHRN: shrn.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHSUBv16i8, ARM64_INS_SHSUB: shsub.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHSUBv2i32, ARM64_INS_SHSUB: shsub.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHSUBv4i16, ARM64_INS_SHSUB: shsub.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHSUBv4i32, ARM64_INS_SHSUB: shsub.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHSUBv8i16, ARM64_INS_SHSUB: shsub.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SHSUBv8i8, ARM64_INS_SHSUB: shsub.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SLId, ARM64_INS_SLI: sli $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SLIv16i8_shift, ARM64_INS_SLI: sli.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SLIv2i32_shift, ARM64_INS_SLI: sli.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SLIv2i64_shift, ARM64_INS_SLI: sli.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SLIv4i16_shift, ARM64_INS_SLI: sli.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SLIv4i32_shift, ARM64_INS_SLI: sli.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SLIv8i16_shift, ARM64_INS_SLI: sli.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SLIv8i8_shift, ARM64_INS_SLI: sli.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0}
+},
+{ /* AArch64_SMADDLrrr, ARM64_INS_SMADDL: smaddl $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXPv16i8, ARM64_INS_SMAXP: smaxp.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXPv2i32, ARM64_INS_SMAXP: smaxp.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXPv4i16, ARM64_INS_SMAXP: smaxp.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXPv4i32, ARM64_INS_SMAXP: smaxp.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXPv8i16, ARM64_INS_SMAXP: smaxp.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXPv8i8, ARM64_INS_SMAXP: smaxp.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXVv16i8v, ARM64_INS_SMAXV: smaxv.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXVv4i16v, ARM64_INS_SMAXV: smaxv.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXVv4i32v, ARM64_INS_SMAXV: smaxv.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXVv8i16v, ARM64_INS_SMAXV: smaxv.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXVv8i8v, ARM64_INS_SMAXV: smaxv.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXv16i8, ARM64_INS_SMAX: smax.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXv2i32, ARM64_INS_SMAX: smax.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXv4i16, ARM64_INS_SMAX: smax.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXv4i32, ARM64_INS_SMAX: smax.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXv8i16, ARM64_INS_SMAX: smax.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMAXv8i8, ARM64_INS_SMAX: smax.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMC, ARM64_INS_SMC: smc $imm */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINPv16i8, ARM64_INS_SMINP: sminp.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINPv2i32, ARM64_INS_SMINP: sminp.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINPv4i16, ARM64_INS_SMINP: sminp.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINPv4i32, ARM64_INS_SMINP: sminp.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINPv8i16, ARM64_INS_SMINP: sminp.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINPv8i8, ARM64_INS_SMINP: sminp.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINVv16i8v, ARM64_INS_SMINV: sminv.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINVv4i16v, ARM64_INS_SMINV: sminv.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINVv4i32v, ARM64_INS_SMINV: sminv.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINVv8i16v, ARM64_INS_SMINV: sminv.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINVv8i8v, ARM64_INS_SMINV: sminv.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINv16i8, ARM64_INS_SMIN: smin.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINv2i32, ARM64_INS_SMIN: smin.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINv4i16, ARM64_INS_SMIN: smin.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINv4i32, ARM64_INS_SMIN: smin.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINv8i16, ARM64_INS_SMIN: smin.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMINv8i8, ARM64_INS_SMIN: smin.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMLALv16i8_v8i16, ARM64_INS_SMLAL2: smlal2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMLALv2i32_indexed, ARM64_INS_SMLAL: smlal.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SMLALv2i32_v2i64, ARM64_INS_SMLAL: smlal.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMLALv4i16_indexed, ARM64_INS_SMLAL: smlal.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SMLALv4i16_v4i32, ARM64_INS_SMLAL: smlal.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMLALv4i32_indexed, ARM64_INS_SMLAL2: smlal2.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SMLALv4i32_v2i64, ARM64_INS_SMLAL2: smlal2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMLALv8i16_indexed, ARM64_INS_SMLAL2: smlal2.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SMLALv8i16_v4i32, ARM64_INS_SMLAL2: smlal2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMLALv8i8_v8i16, ARM64_INS_SMLAL: smlal.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMLSLv16i8_v8i16, ARM64_INS_SMLSL2: smlsl2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMLSLv2i32_indexed, ARM64_INS_SMLSL: smlsl.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SMLSLv2i32_v2i64, ARM64_INS_SMLSL: smlsl.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMLSLv4i16_indexed, ARM64_INS_SMLSL: smlsl.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SMLSLv4i16_v4i32, ARM64_INS_SMLSL: smlsl.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMLSLv4i32_indexed, ARM64_INS_SMLSL2: smlsl2.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SMLSLv4i32_v2i64, ARM64_INS_SMLSL2: smlsl2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMLSLv8i16_indexed, ARM64_INS_SMLSL2: smlsl2.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SMLSLv8i16_v4i32, ARM64_INS_SMLSL2: smlsl2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMLSLv8i8_v8i16, ARM64_INS_SMLSL: smlsl.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMOVvi16to32, ARM64_INS_SMOV: smov.h $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMOVvi16to64, ARM64_INS_SMOV: smov.h $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMOVvi32to64, ARM64_INS_SMOV: smov.s $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMOVvi8to32, ARM64_INS_SMOV: smov.b $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMOVvi8to64, ARM64_INS_SMOV: smov.b $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMSUBLrrr, ARM64_INS_SMSUBL: smsubl $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMULHrr, ARM64_INS_SMULH: smulh $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMULLv16i8_v8i16, ARM64_INS_SMULL2: smull2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMULLv2i32_indexed, ARM64_INS_SMULL: smull.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMULLv2i32_v2i64, ARM64_INS_SMULL: smull.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMULLv4i16_indexed, ARM64_INS_SMULL: smull.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMULLv4i16_v4i32, ARM64_INS_SMULL: smull.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMULLv4i32_indexed, ARM64_INS_SMULL2: smull2.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMULLv4i32_v2i64, ARM64_INS_SMULL2: smull2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMULLv8i16_indexed, ARM64_INS_SMULL2: smull2.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMULLv8i16_v4i32, ARM64_INS_SMULL2: smull2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SMULLv8i8_v8i16, ARM64_INS_SMULL: smull.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQABSv16i8, ARM64_INS_SQABS: sqabs.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQABSv1i16, ARM64_INS_SQABS: sqabs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQABSv1i32, ARM64_INS_SQABS: sqabs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQABSv1i64, ARM64_INS_SQABS: sqabs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQABSv1i8, ARM64_INS_SQABS: sqabs $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQABSv2i32, ARM64_INS_SQABS: sqabs.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQABSv2i64, ARM64_INS_SQABS: sqabs.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQABSv4i16, ARM64_INS_SQABS: sqabs.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQABSv4i32, ARM64_INS_SQABS: sqabs.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQABSv8i16, ARM64_INS_SQABS: sqabs.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQABSv8i8, ARM64_INS_SQABS: sqabs.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQADDv16i8, ARM64_INS_SQADD: sqadd.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQADDv1i16, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQADDv1i32, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQADDv1i64, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQADDv1i8, ARM64_INS_SQADD: sqadd $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQADDv2i32, ARM64_INS_SQADD: sqadd.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQADDv2i64, ARM64_INS_SQADD: sqadd.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQADDv4i16, ARM64_INS_SQADD: sqadd.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQADDv4i32, ARM64_INS_SQADD: sqadd.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQADDv8i16, ARM64_INS_SQADD: sqadd.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQADDv8i8, ARM64_INS_SQADD: sqadd.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMLALi16, ARM64_INS_SQDMLAL: sqdmlal $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMLALi32, ARM64_INS_SQDMLAL: sqdmlal $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMLALv1i32_indexed, ARM64_INS_SQDMLAL: sqdmlal.h $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQDMLALv1i64_indexed, ARM64_INS_SQDMLAL: sqdmlal.s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQDMLALv2i32_indexed, ARM64_INS_SQDMLAL: sqdmlal.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQDMLALv2i32_v2i64, ARM64_INS_SQDMLAL: sqdmlal.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMLALv4i16_indexed, ARM64_INS_SQDMLAL: sqdmlal.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQDMLALv4i16_v4i32, ARM64_INS_SQDMLAL: sqdmlal.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMLALv4i32_indexed, ARM64_INS_SQDMLAL2: sqdmlal2.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQDMLALv4i32_v2i64, ARM64_INS_SQDMLAL2: sqdmlal2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMLALv8i16_indexed, ARM64_INS_SQDMLAL2: sqdmlal2.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQDMLALv8i16_v4i32, ARM64_INS_SQDMLAL2: sqdmlal2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMLSLi16, ARM64_INS_SQDMLSL: sqdmlsl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMLSLi32, ARM64_INS_SQDMLSL: sqdmlsl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMLSLv1i32_indexed, ARM64_INS_SQDMLSL: sqdmlsl.h $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQDMLSLv1i64_indexed, ARM64_INS_SQDMLSL: sqdmlsl.s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQDMLSLv2i32_indexed, ARM64_INS_SQDMLSL: sqdmlsl.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQDMLSLv2i32_v2i64, ARM64_INS_SQDMLSL: sqdmlsl.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMLSLv4i16_indexed, ARM64_INS_SQDMLSL: sqdmlsl.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQDMLSLv4i16_v4i32, ARM64_INS_SQDMLSL: sqdmlsl.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMLSLv4i32_indexed, ARM64_INS_SQDMLSL2: sqdmlsl2.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQDMLSLv4i32_v2i64, ARM64_INS_SQDMLSL2: sqdmlsl2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMLSLv8i16_indexed, ARM64_INS_SQDMLSL2: sqdmlsl2.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQDMLSLv8i16_v4i32, ARM64_INS_SQDMLSL2: sqdmlsl2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULHv1i16, ARM64_INS_SQDMULH: sqdmulh $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULHv1i16_indexed, ARM64_INS_SQDMULH: sqdmulh.h $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULHv1i32, ARM64_INS_SQDMULH: sqdmulh $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULHv1i32_indexed, ARM64_INS_SQDMULH: sqdmulh.s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULHv2i32, ARM64_INS_SQDMULH: sqdmulh.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULHv2i32_indexed, ARM64_INS_SQDMULH: sqdmulh.2s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULHv4i16, ARM64_INS_SQDMULH: sqdmulh.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULHv4i16_indexed, ARM64_INS_SQDMULH: sqdmulh.4h $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULHv4i32, ARM64_INS_SQDMULH: sqdmulh.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULHv4i32_indexed, ARM64_INS_SQDMULH: sqdmulh.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULHv8i16, ARM64_INS_SQDMULH: sqdmulh.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULHv8i16_indexed, ARM64_INS_SQDMULH: sqdmulh.8h $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULLi16, ARM64_INS_SQDMULL: sqdmull $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULLi32, ARM64_INS_SQDMULL: sqdmull $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULLv1i32_indexed, ARM64_INS_SQDMULL: sqdmull.h $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULLv1i64_indexed, ARM64_INS_SQDMULL: sqdmull.s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULLv2i32_indexed, ARM64_INS_SQDMULL: sqdmull.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULLv2i32_v2i64, ARM64_INS_SQDMULL: sqdmull.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULLv4i16_indexed, ARM64_INS_SQDMULL: sqdmull.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULLv4i16_v4i32, ARM64_INS_SQDMULL: sqdmull.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULLv4i32_indexed, ARM64_INS_SQDMULL2: sqdmull2.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULLv4i32_v2i64, ARM64_INS_SQDMULL2: sqdmull2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULLv8i16_indexed, ARM64_INS_SQDMULL2: sqdmull2.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQDMULLv8i16_v4i32, ARM64_INS_SQDMULL2: sqdmull2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQNEGv16i8, ARM64_INS_SQNEG: sqneg.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQNEGv1i16, ARM64_INS_SQNEG: sqneg $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQNEGv1i32, ARM64_INS_SQNEG: sqneg $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQNEGv1i64, ARM64_INS_SQNEG: sqneg $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQNEGv1i8, ARM64_INS_SQNEG: sqneg $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQNEGv2i32, ARM64_INS_SQNEG: sqneg.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQNEGv2i64, ARM64_INS_SQNEG: sqneg.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQNEGv4i16, ARM64_INS_SQNEG: sqneg.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQNEGv4i32, ARM64_INS_SQNEG: sqneg.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQNEGv8i16, ARM64_INS_SQNEG: sqneg.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQNEGv8i8, ARM64_INS_SQNEG: sqneg.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRDMULHv1i16, ARM64_INS_SQRDMULH: sqrdmulh $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRDMULHv1i16_indexed, ARM64_INS_SQRDMULH: sqrdmulh.h $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQRDMULHv1i32, ARM64_INS_SQRDMULH: sqrdmulh $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRDMULHv1i32_indexed, ARM64_INS_SQRDMULH: sqrdmulh.s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQRDMULHv2i32, ARM64_INS_SQRDMULH: sqrdmulh.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRDMULHv2i32_indexed, ARM64_INS_SQRDMULH: sqrdmulh.2s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQRDMULHv4i16, ARM64_INS_SQRDMULH: sqrdmulh.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRDMULHv4i16_indexed, ARM64_INS_SQRDMULH: sqrdmulh.4h $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQRDMULHv4i32, ARM64_INS_SQRDMULH: sqrdmulh.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRDMULHv4i32_indexed, ARM64_INS_SQRDMULH: sqrdmulh.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQRDMULHv8i16, ARM64_INS_SQRDMULH: sqrdmulh.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRDMULHv8i16_indexed, ARM64_INS_SQRDMULH: sqrdmulh.8h $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SQRSHLv16i8, ARM64_INS_SQRSHL: sqrshl.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHLv1i16, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHLv1i32, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHLv1i64, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHLv1i8, ARM64_INS_SQRSHL: sqrshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHLv2i32, ARM64_INS_SQRSHL: sqrshl.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHLv2i64, ARM64_INS_SQRSHL: sqrshl.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHLv4i16, ARM64_INS_SQRSHL: sqrshl.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHLv4i32, ARM64_INS_SQRSHL: sqrshl.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHLv8i16, ARM64_INS_SQRSHL: sqrshl.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHLv8i8, ARM64_INS_SQRSHL: sqrshl.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRNb, ARM64_INS_SQRSHRN: sqrshrn $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRNh, ARM64_INS_SQRSHRN: sqrshrn $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRNs, ARM64_INS_SQRSHRN: sqrshrn $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRNv16i8_shift, ARM64_INS_SQRSHRN2: sqrshrn2.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRNv2i32_shift, ARM64_INS_SQRSHRN: sqrshrn.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRNv4i16_shift, ARM64_INS_SQRSHRN: sqrshrn.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRNv4i32_shift, ARM64_INS_SQRSHRN2: sqrshrn2.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRNv8i16_shift, ARM64_INS_SQRSHRN2: sqrshrn2.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRNv8i8_shift, ARM64_INS_SQRSHRN: sqrshrn.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRUNb, ARM64_INS_SQRSHRUN: sqrshrun $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRUNh, ARM64_INS_SQRSHRUN: sqrshrun $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRUNs, ARM64_INS_SQRSHRUN: sqrshrun $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRUNv16i8_shift, ARM64_INS_SQRSHRUN2: sqrshrun2.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRUNv2i32_shift, ARM64_INS_SQRSHRUN: sqrshrun.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRUNv4i16_shift, ARM64_INS_SQRSHRUN: sqrshrun.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRUNv4i32_shift, ARM64_INS_SQRSHRUN2: sqrshrun2.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRUNv8i16_shift, ARM64_INS_SQRSHRUN2: sqrshrun2.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQRSHRUNv8i8_shift, ARM64_INS_SQRSHRUN: sqrshrun.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLUb, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLUd, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLUh, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLUs, ARM64_INS_SQSHLU: sqshlu $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLUv16i8_shift, ARM64_INS_SQSHLU: sqshlu.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLUv2i32_shift, ARM64_INS_SQSHLU: sqshlu.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLUv2i64_shift, ARM64_INS_SQSHLU: sqshlu.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLUv4i16_shift, ARM64_INS_SQSHLU: sqshlu.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLUv4i32_shift, ARM64_INS_SQSHLU: sqshlu.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLUv8i16_shift, ARM64_INS_SQSHLU: sqshlu.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLUv8i8_shift, ARM64_INS_SQSHLU: sqshlu.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLb, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLd, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLh, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLs, ARM64_INS_SQSHL: sqshl $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv16i8, ARM64_INS_SQSHL: sqshl.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv16i8_shift, ARM64_INS_SQSHL: sqshl.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv1i16, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv1i32, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv1i64, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv1i8, ARM64_INS_SQSHL: sqshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv2i32, ARM64_INS_SQSHL: sqshl.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv2i32_shift, ARM64_INS_SQSHL: sqshl.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv2i64, ARM64_INS_SQSHL: sqshl.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv2i64_shift, ARM64_INS_SQSHL: sqshl.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv4i16, ARM64_INS_SQSHL: sqshl.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv4i16_shift, ARM64_INS_SQSHL: sqshl.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv4i32, ARM64_INS_SQSHL: sqshl.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv4i32_shift, ARM64_INS_SQSHL: sqshl.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv8i16, ARM64_INS_SQSHL: sqshl.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv8i16_shift, ARM64_INS_SQSHL: sqshl.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv8i8, ARM64_INS_SQSHL: sqshl.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHLv8i8_shift, ARM64_INS_SQSHL: sqshl.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRNb, ARM64_INS_SQSHRN: sqshrn $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRNh, ARM64_INS_SQSHRN: sqshrn $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRNs, ARM64_INS_SQSHRN: sqshrn $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRNv16i8_shift, ARM64_INS_SQSHRN2: sqshrn2.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRNv2i32_shift, ARM64_INS_SQSHRN: sqshrn.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRNv4i16_shift, ARM64_INS_SQSHRN: sqshrn.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRNv4i32_shift, ARM64_INS_SQSHRN2: sqshrn2.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRNv8i16_shift, ARM64_INS_SQSHRN2: sqshrn2.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRNv8i8_shift, ARM64_INS_SQSHRN: sqshrn.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRUNb, ARM64_INS_SQSHRUN: sqshrun $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRUNh, ARM64_INS_SQSHRUN: sqshrun $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRUNs, ARM64_INS_SQSHRUN: sqshrun $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRUNv16i8_shift, ARM64_INS_SQSHRUN2: sqshrun2.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRUNv2i32_shift, ARM64_INS_SQSHRUN: sqshrun.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRUNv4i16_shift, ARM64_INS_SQSHRUN: sqshrun.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRUNv4i32_shift, ARM64_INS_SQSHRUN2: sqshrun2.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRUNv8i16_shift, ARM64_INS_SQSHRUN2: sqshrun2.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSHRUNv8i8_shift, ARM64_INS_SQSHRUN: sqshrun.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSUBv16i8, ARM64_INS_SQSUB: sqsub.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSUBv1i16, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSUBv1i32, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSUBv1i64, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSUBv1i8, ARM64_INS_SQSUB: sqsub $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSUBv2i32, ARM64_INS_SQSUB: sqsub.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSUBv2i64, ARM64_INS_SQSUB: sqsub.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSUBv4i16, ARM64_INS_SQSUB: sqsub.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSUBv4i32, ARM64_INS_SQSUB: sqsub.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSUBv8i16, ARM64_INS_SQSUB: sqsub.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQSUBv8i8, ARM64_INS_SQSUB: sqsub.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTNv16i8, ARM64_INS_SQXTN2: sqxtn2.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTNv1i16, ARM64_INS_SQXTN: sqxtn $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTNv1i32, ARM64_INS_SQXTN: sqxtn $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTNv1i8, ARM64_INS_SQXTN: sqxtn $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTNv2i32, ARM64_INS_SQXTN: sqxtn.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTNv4i16, ARM64_INS_SQXTN: sqxtn.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTNv4i32, ARM64_INS_SQXTN2: sqxtn2.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTNv8i16, ARM64_INS_SQXTN2: sqxtn2.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTNv8i8, ARM64_INS_SQXTN: sqxtn.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTUNv16i8, ARM64_INS_SQXTUN2: sqxtun2.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTUNv1i16, ARM64_INS_SQXTUN: sqxtun $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTUNv1i32, ARM64_INS_SQXTUN: sqxtun $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTUNv1i8, ARM64_INS_SQXTUN: sqxtun $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTUNv2i32, ARM64_INS_SQXTUN: sqxtun.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTUNv4i16, ARM64_INS_SQXTUN: sqxtun.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTUNv4i32, ARM64_INS_SQXTUN2: sqxtun2.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTUNv8i16, ARM64_INS_SQXTUN2: sqxtun2.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SQXTUNv8i8, ARM64_INS_SQXTUN: sqxtun.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRHADDv16i8, ARM64_INS_SRHADD: srhadd.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRHADDv2i32, ARM64_INS_SRHADD: srhadd.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRHADDv4i16, ARM64_INS_SRHADD: srhadd.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRHADDv4i32, ARM64_INS_SRHADD: srhadd.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRHADDv8i16, ARM64_INS_SRHADD: srhadd.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRHADDv8i8, ARM64_INS_SRHADD: srhadd.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRId, ARM64_INS_SRI: sri $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRIv16i8_shift, ARM64_INS_SRI: sri.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRIv2i32_shift, ARM64_INS_SRI: sri.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRIv2i64_shift, ARM64_INS_SRI: sri.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRIv4i16_shift, ARM64_INS_SRI: sri.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRIv4i32_shift, ARM64_INS_SRI: sri.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRIv8i16_shift, ARM64_INS_SRI: sri.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRIv8i8_shift, ARM64_INS_SRI: sri.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHLv16i8, ARM64_INS_SRSHL: srshl.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHLv1i64, ARM64_INS_SRSHL: srshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHLv2i32, ARM64_INS_SRSHL: srshl.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHLv2i64, ARM64_INS_SRSHL: srshl.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHLv4i16, ARM64_INS_SRSHL: srshl.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHLv4i32, ARM64_INS_SRSHL: srshl.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHLv8i16, ARM64_INS_SRSHL: srshl.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHLv8i8, ARM64_INS_SRSHL: srshl.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHRd, ARM64_INS_SRSHR: srshr $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHRv16i8_shift, ARM64_INS_SRSHR: srshr.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHRv2i32_shift, ARM64_INS_SRSHR: srshr.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHRv2i64_shift, ARM64_INS_SRSHR: srshr.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHRv4i16_shift, ARM64_INS_SRSHR: srshr.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHRv4i32_shift, ARM64_INS_SRSHR: srshr.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHRv8i16_shift, ARM64_INS_SRSHR: srshr.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSHRv8i8_shift, ARM64_INS_SRSHR: srshr.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSRAd, ARM64_INS_SRSRA: srsra $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSRAv16i8_shift, ARM64_INS_SRSRA: srsra.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSRAv2i32_shift, ARM64_INS_SRSRA: srsra.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSRAv2i64_shift, ARM64_INS_SRSRA: srsra.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSRAv4i16_shift, ARM64_INS_SRSRA: srsra.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSRAv4i32_shift, ARM64_INS_SRSRA: srsra.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSRAv8i16_shift, ARM64_INS_SRSRA: srsra.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SRSRAv8i8_shift, ARM64_INS_SRSRA: srsra.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHLLv16i8_shift, ARM64_INS_SSHLL2: sshll2.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHLLv2i32_shift, ARM64_INS_SSHLL: sshll.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHLLv4i16_shift, ARM64_INS_SSHLL: sshll.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHLLv4i32_shift, ARM64_INS_SSHLL2: sshll2.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHLLv8i16_shift, ARM64_INS_SSHLL2: sshll2.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHLLv8i8_shift, ARM64_INS_SSHLL: sshll.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHLv16i8, ARM64_INS_SSHL: sshl.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHLv1i64, ARM64_INS_SSHL: sshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHLv2i32, ARM64_INS_SSHL: sshl.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHLv2i64, ARM64_INS_SSHL: sshl.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHLv4i16, ARM64_INS_SSHL: sshl.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHLv4i32, ARM64_INS_SSHL: sshl.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHLv8i16, ARM64_INS_SSHL: sshl.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHLv8i8, ARM64_INS_SSHL: sshl.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHRd, ARM64_INS_SSHR: sshr $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHRv16i8_shift, ARM64_INS_SSHR: sshr.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHRv2i32_shift, ARM64_INS_SSHR: sshr.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHRv2i64_shift, ARM64_INS_SSHR: sshr.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHRv4i16_shift, ARM64_INS_SSHR: sshr.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHRv4i32_shift, ARM64_INS_SSHR: sshr.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHRv8i16_shift, ARM64_INS_SSHR: sshr.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSHRv8i8_shift, ARM64_INS_SSHR: sshr.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSRAd, ARM64_INS_SSRA: ssra $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSRAv16i8_shift, ARM64_INS_SSRA: ssra.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSRAv2i32_shift, ARM64_INS_SSRA: ssra.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSRAv2i64_shift, ARM64_INS_SSRA: ssra.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSRAv4i16_shift, ARM64_INS_SSRA: ssra.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSRAv4i32_shift, ARM64_INS_SSRA: ssra.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSRAv8i16_shift, ARM64_INS_SSRA: ssra.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSRAv8i8_shift, ARM64_INS_SSRA: ssra.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSUBLv16i8_v8i16, ARM64_INS_SSUBL2: ssubl2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSUBLv2i32_v2i64, ARM64_INS_SSUBL: ssubl.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSUBLv4i16_v4i32, ARM64_INS_SSUBL: ssubl.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSUBLv4i32_v2i64, ARM64_INS_SSUBL2: ssubl2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSUBLv8i16_v4i32, ARM64_INS_SSUBL2: ssubl2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSUBLv8i8_v8i16, ARM64_INS_SSUBL: ssubl.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSUBWv16i8_v8i16, ARM64_INS_SSUBW2: ssubw2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSUBWv2i32_v2i64, ARM64_INS_SSUBW: ssubw.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSUBWv4i16_v4i32, ARM64_INS_SSUBW: ssubw.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSUBWv4i32_v2i64, ARM64_INS_SSUBW2: ssubw2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSUBWv8i16_v4i32, ARM64_INS_SSUBW2: ssubw2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SSUBWv8i8_v8i16, ARM64_INS_SSUBW: ssubw.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv16b, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv1d, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv2d, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv2s, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv4h, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv4s, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv8b, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv8h, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Fourv8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev16b, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev1d, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev2d, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev2s, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev4h, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev4s, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev8b, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev8h, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Onev8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev16b, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev1d, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev2d, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev2s, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev4h, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev4s, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev8b, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev8h, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Threev8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov16b, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov16b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov1d, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov1d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov2d, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov2d_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov2s, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov2s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov4h, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov4h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov4s, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov4s_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov8b, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov8b_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov8h, ARM64_INS_ST1: st1 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1Twov8h_POST, ARM64_INS_ST1: st1 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1i16, ARM64_INS_ST1: st1 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1i16_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1i32, ARM64_INS_ST1: st1 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1i32_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1i64, ARM64_INS_ST1: st1 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1i64_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1i8, ARM64_INS_ST1: st1 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST1i8_POST, ARM64_INS_ST1: st1 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2Twov16b, ARM64_INS_ST2: st2 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2Twov16b_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2Twov2d, ARM64_INS_ST2: st2 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2Twov2d_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2Twov2s, ARM64_INS_ST2: st2 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2Twov2s_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2Twov4h, ARM64_INS_ST2: st2 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2Twov4h_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2Twov4s, ARM64_INS_ST2: st2 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2Twov4s_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2Twov8b, ARM64_INS_ST2: st2 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2Twov8b_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2Twov8h, ARM64_INS_ST2: st2 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2Twov8h_POST, ARM64_INS_ST2: st2 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2i16, ARM64_INS_ST2: st2 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2i16_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2i32, ARM64_INS_ST2: st2 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2i32_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2i64, ARM64_INS_ST2: st2 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2i64_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2i8, ARM64_INS_ST2: st2 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST2i8_POST, ARM64_INS_ST2: st2 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3Threev16b, ARM64_INS_ST3: st3 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3Threev16b_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3Threev2d, ARM64_INS_ST3: st3 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3Threev2d_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3Threev2s, ARM64_INS_ST3: st3 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3Threev2s_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3Threev4h, ARM64_INS_ST3: st3 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3Threev4h_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3Threev4s, ARM64_INS_ST3: st3 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3Threev4s_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3Threev8b, ARM64_INS_ST3: st3 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3Threev8b_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3Threev8h, ARM64_INS_ST3: st3 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3Threev8h_POST, ARM64_INS_ST3: st3 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3i16, ARM64_INS_ST3: st3 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3i16_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3i32, ARM64_INS_ST3: st3 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3i32_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3i64, ARM64_INS_ST3: st3 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3i64_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3i8, ARM64_INS_ST3: st3 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST3i8_POST, ARM64_INS_ST3: st3 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4Fourv16b, ARM64_INS_ST4: st4 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4Fourv16b_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4Fourv2d, ARM64_INS_ST4: st4 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4Fourv2d_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4Fourv2s, ARM64_INS_ST4: st4 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4Fourv2s_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4Fourv4h, ARM64_INS_ST4: st4 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4Fourv4h_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4Fourv4s, ARM64_INS_ST4: st4 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4Fourv4s_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4Fourv8b, ARM64_INS_ST4: st4 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4Fourv8b_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4Fourv8h, ARM64_INS_ST4: st4 $vt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4Fourv8h_POST, ARM64_INS_ST4: st4 $vt, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4i16, ARM64_INS_ST4: st4 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4i16_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4i32, ARM64_INS_ST4: st4 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4i32_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4i64, ARM64_INS_ST4: st4 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4i64_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4i8, ARM64_INS_ST4: st4 $vt$idx, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, 0 }
+},
+{ /* AArch64_ST4i8_POST, ARM64_INS_ST4: st4 $vt$idx, [$rn], $xm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STLRB, ARM64_INS_STLRB: stlrb $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STLRH, ARM64_INS_STLRH: stlrh $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STLRW, ARM64_INS_STLR: stlr $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STLRX, ARM64_INS_STLR: stlr $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STLXPW, ARM64_INS_STLXP: stlxp $ws, $rt, $rt2, [$rn] */
+ 0,
+ { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STLXPX, ARM64_INS_STLXP: stlxp $ws, $rt, $rt2, [$rn] */
+ 0,
+ { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STLXRB, ARM64_INS_STLXRB: stlxrb $ws, $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STLXRH, ARM64_INS_STLXRH: stlxrh $ws, $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STLXRW, ARM64_INS_STLXR: stlxr $ws, $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STLXRX, ARM64_INS_STLXR: stlxr $ws, $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STNPDi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STNPQi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STNPSi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STNPWi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STNPXi, ARM64_INS_STNP: stnp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STPDi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STPDpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STPDpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STPQi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STPQpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STPQpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STPSi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STPSpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STPSpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STPWi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STPWpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STPWpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STPXi, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STPXpost, ARM64_INS_STP: stp $rt, $rt2, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STPXpre, ARM64_INS_STP: stp $rt, $rt2, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRBBpost, ARM64_INS_STRB: strb $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRBBpre, ARM64_INS_STRB: strb $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRBBroW, ARM64_INS_STRB: strb $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRBBroX, ARM64_INS_STRB: strb $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRBBui, ARM64_INS_STRB: strb $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRBpost, ARM64_INS_STR: str $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRBpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRBroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRBroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRBui, ARM64_INS_STR: str $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRDpost, ARM64_INS_STR: str $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRDpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRDroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRDroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRDui, ARM64_INS_STR: str $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRHHpost, ARM64_INS_STRH: strh $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRHHpre, ARM64_INS_STRH: strh $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRHHroW, ARM64_INS_STRH: strh $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRHHroX, ARM64_INS_STRH: strh $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRHHui, ARM64_INS_STRH: strh $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRHpost, ARM64_INS_STR: str $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRHpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRHroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRHroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRHui, ARM64_INS_STR: str $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRQpost, ARM64_INS_STR: str $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRQpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRQroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRQroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRQui, ARM64_INS_STR: str $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRSpost, ARM64_INS_STR: str $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRSpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRSroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRSroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRSui, ARM64_INS_STR: str $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRWpost, ARM64_INS_STR: str $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRWpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRWroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRWroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRWui, ARM64_INS_STR: str $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRXpost, ARM64_INS_STR: str $rt, [$rn], $offset */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRXpre, ARM64_INS_STR: str $rt, [$rn, $offset]! */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STRXroW, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRXroX, ARM64_INS_STR: str $rt, [$rn, $rm, $extend] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STRXui, ARM64_INS_STR: str $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STTRBi, ARM64_INS_STTRB: sttrb $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STTRHi, ARM64_INS_STTRH: sttrh $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STTRWi, ARM64_INS_STTR: sttr $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STTRXi, ARM64_INS_STTR: sttr $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STURBBi, ARM64_INS_STURB: sturb $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STURBi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STURDi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STURHHi, ARM64_INS_STURH: sturh $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STURHi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STURQi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STURSi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STURWi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STURXi, ARM64_INS_STUR: stur $rt, [$rn, $offset] */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STXPW, ARM64_INS_STXP: stxp $ws, $rt, $rt2, [$rn] */
+ 0,
+ { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STXPX, ARM64_INS_STXP: stxp $ws, $rt, $rt2, [$rn] */
+ 0,
+ { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_WRITE | CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_STXRB, ARM64_INS_STXRB: stxrb $ws, $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STXRH, ARM64_INS_STXRH: stxrh $ws, $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STXRW, ARM64_INS_STXR: stxr $ws, $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_STXRX, ARM64_INS_STXR: stxr $ws, $rt, [$rn] */
+ 0,
+ { CS_AC_WRITE, CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBHNv2i64_v2i32, ARM64_INS_SUBHN: subhn.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBHNv2i64_v4i32, ARM64_INS_SUBHN2: subhn2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBHNv4i32_v4i16, ARM64_INS_SUBHN: subhn.4h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBHNv4i32_v8i16, ARM64_INS_SUBHN2: subhn2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBHNv8i16_v16i8, ARM64_INS_SUBHN2: subhn2.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBHNv8i16_v8i8, ARM64_INS_SUBHN: subhn.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBSWri, ARM64_INS_SUBS: subs $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBSWrs, ARM64_INS_SUBS: subs $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBSWrx, ARM64_INS_SUBS: subs $r1, $r2, $r3 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBSXri, ARM64_INS_SUBS: subs $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBSXrs, ARM64_INS_SUBS: subs $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBSXrx, ARM64_INS_SUBS: subs $r1, $r2, $r3 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBSXrx64, ARM64_INS_SUBS: subs $rd, $rn, $rm$ext */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SUBWri, ARM64_INS_SUB: sub $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBWrs, ARM64_INS_SUB: sub $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBWrx, ARM64_INS_SUB: sub $r1, $r2, $r3 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBXri, ARM64_INS_SUB: sub $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBXrs, ARM64_INS_SUB: sub $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBXrx, ARM64_INS_SUB: sub $r1, $r2, $r3 */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBXrx64, ARM64_INS_SUB: sub $rd, $rn, $rm$ext */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SUBv16i8, ARM64_INS_SUB: sub.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBv1i64, ARM64_INS_SUB: sub $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBv2i32, ARM64_INS_SUB: sub.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBv2i64, ARM64_INS_SUB: sub.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBv4i16, ARM64_INS_SUB: sub.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBv4i32, ARM64_INS_SUB: sub.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBv8i16, ARM64_INS_SUB: sub.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUBv8i8, ARM64_INS_SUB: sub.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUQADDv16i8, ARM64_INS_SUQADD: suqadd.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUQADDv1i16, ARM64_INS_SUQADD: suqadd $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUQADDv1i32, ARM64_INS_SUQADD: suqadd $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUQADDv1i64, ARM64_INS_SUQADD: suqadd $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUQADDv1i8, ARM64_INS_SUQADD: suqadd $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUQADDv2i32, ARM64_INS_SUQADD: suqadd.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUQADDv2i64, ARM64_INS_SUQADD: suqadd.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUQADDv4i16, ARM64_INS_SUQADD: suqadd.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUQADDv4i32, ARM64_INS_SUQADD: suqadd.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUQADDv8i16, ARM64_INS_SUQADD: suqadd.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SUQADDv8i8, ARM64_INS_SUQADD: suqadd.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_SVC, ARM64_INS_SVC: svc $imm */
+ 0,
+ { CS_AC_READ, 0 }
+},
+{ /* AArch64_SYSLxt, ARM64_INS_SYSL: sysl $rt, $op1, $cn, $cm, $op2 */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ }
+},
+{ /* AArch64_SYSxt, ARM64_INS_SYS: sys $op1, $cn, $cm, $op2, $rt */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_WRITE | CS_AC_READ }
+},
+{ /* AArch64_TBLv16i8Four, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBLv16i8One, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBLv16i8Three, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBLv16i8Two, ARM64_INS_TBL: tbl $vd.16b, $vn, $vm.16b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBLv8i8Four, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBLv8i8One, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBLv8i8Three, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBLv8i8Two, ARM64_INS_TBL: tbl $vd.8b, $vn, $vm.8b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBNZW, ARM64_INS_TBNZ: tbnz $rt, $bit_off, $target */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBNZX, ARM64_INS_TBNZ: tbnz $rt, $bit_off, $target */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBXv16i8Four, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBXv16i8One, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBXv16i8Three, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBXv16i8Two, ARM64_INS_TBX: tbx $vd.16b, $vn, $vm.16b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBXv8i8Four, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBXv8i8One, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBXv8i8Three, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBXv8i8Two, ARM64_INS_TBX: tbx $vd.8b, $vn, $vm.8b */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBZW, ARM64_INS_TBZ: tbz $rt, $bit_off, $target */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TBZX, ARM64_INS_TBZ: tbz $rt, $bit_off, $target */
+ 0,
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TRN1v16i8, ARM64_INS_TRN1: trn1.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TRN1v2i32, ARM64_INS_TRN1: trn1.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TRN1v2i64, ARM64_INS_TRN1: trn1.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TRN1v4i16, ARM64_INS_TRN1: trn1.4h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TRN1v4i32, ARM64_INS_TRN1: trn1.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TRN1v8i16, ARM64_INS_TRN1: trn1.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TRN1v8i8, ARM64_INS_TRN1: trn1.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TRN2v16i8, ARM64_INS_TRN2: trn2.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TRN2v2i32, ARM64_INS_TRN2: trn2.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TRN2v2i64, ARM64_INS_TRN2: trn2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TRN2v4i16, ARM64_INS_TRN2: trn2.4h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TRN2v4i32, ARM64_INS_TRN2: trn2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TRN2v8i16, ARM64_INS_TRN2: trn2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_TRN2v8i8, ARM64_INS_TRN2: trn2.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABALv16i8_v8i16, ARM64_INS_UABAL2: uabal2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABALv2i32_v2i64, ARM64_INS_UABAL: uabal.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABALv4i16_v4i32, ARM64_INS_UABAL: uabal.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABALv4i32_v2i64, ARM64_INS_UABAL2: uabal2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABALv8i16_v4i32, ARM64_INS_UABAL2: uabal2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABALv8i8_v8i16, ARM64_INS_UABAL: uabal.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABAv16i8, ARM64_INS_UABA: uaba.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABAv2i32, ARM64_INS_UABA: uaba.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABAv4i16, ARM64_INS_UABA: uaba.4h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABAv4i32, ARM64_INS_UABA: uaba.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABAv8i16, ARM64_INS_UABA: uaba.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABAv8i8, ARM64_INS_UABA: uaba.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABDLv16i8_v8i16, ARM64_INS_UABDL2: uabdl2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABDLv2i32_v2i64, ARM64_INS_UABDL: uabdl.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABDLv4i16_v4i32, ARM64_INS_UABDL: uabdl.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABDLv4i32_v2i64, ARM64_INS_UABDL2: uabdl2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABDLv8i16_v4i32, ARM64_INS_UABDL2: uabdl2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABDLv8i8_v8i16, ARM64_INS_UABDL: uabdl.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABDv16i8, ARM64_INS_UABD: uabd.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABDv2i32, ARM64_INS_UABD: uabd.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABDv4i16, ARM64_INS_UABD: uabd.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABDv4i32, ARM64_INS_UABD: uabd.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABDv8i16, ARM64_INS_UABD: uabd.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UABDv8i8, ARM64_INS_UABD: uabd.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADALPv16i8_v8i16, ARM64_INS_UADALP: uadalp.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADALPv2i32_v1i64, ARM64_INS_UADALP: uadalp.1d $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADALPv4i16_v2i32, ARM64_INS_UADALP: uadalp.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADALPv4i32_v2i64, ARM64_INS_UADALP: uadalp.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADALPv8i16_v4i32, ARM64_INS_UADALP: uadalp.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADALPv8i8_v4i16, ARM64_INS_UADALP: uadalp.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLPv16i8_v8i16, ARM64_INS_UADDLP: uaddlp.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLPv2i32_v1i64, ARM64_INS_UADDLP: uaddlp.1d $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLPv4i16_v2i32, ARM64_INS_UADDLP: uaddlp.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLPv4i32_v2i64, ARM64_INS_UADDLP: uaddlp.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLPv8i16_v4i32, ARM64_INS_UADDLP: uaddlp.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLPv8i8_v4i16, ARM64_INS_UADDLP: uaddlp.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLVv16i8v, ARM64_INS_UADDLV: uaddlv.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLVv4i16v, ARM64_INS_UADDLV: uaddlv.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLVv4i32v, ARM64_INS_UADDLV: uaddlv.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLVv8i16v, ARM64_INS_UADDLV: uaddlv.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLVv8i8v, ARM64_INS_UADDLV: uaddlv.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLv16i8_v8i16, ARM64_INS_UADDL2: uaddl2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLv2i32_v2i64, ARM64_INS_UADDL: uaddl.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLv4i16_v4i32, ARM64_INS_UADDL: uaddl.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLv4i32_v2i64, ARM64_INS_UADDL2: uaddl2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLv8i16_v4i32, ARM64_INS_UADDL2: uaddl2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDLv8i8_v8i16, ARM64_INS_UADDL: uaddl.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDWv16i8_v8i16, ARM64_INS_UADDW2: uaddw2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDWv2i32_v2i64, ARM64_INS_UADDW: uaddw.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDWv4i16_v4i32, ARM64_INS_UADDW: uaddw.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDWv4i32_v2i64, ARM64_INS_UADDW2: uaddw2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDWv8i16_v4i32, ARM64_INS_UADDW2: uaddw2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UADDWv8i8_v8i16, ARM64_INS_UADDW: uaddw.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UBFMWri, ARM64_INS_UBFM: ubfm $rd, $rn, $immr, $imms */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UBFMXri, ARM64_INS_UBFM: ubfm $rd, $rn, $immr, $imms */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFSWDri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFSWSri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFSXDri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFSXSri, ARM64_INS_UCVTF: ucvtf $rd, $rn, $scale */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFUWDri, ARM64_INS_UCVTF: ucvtf $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFUWSri, ARM64_INS_UCVTF: ucvtf $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFUXDri, ARM64_INS_UCVTF: ucvtf $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFUXSri, ARM64_INS_UCVTF: ucvtf $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFd, ARM64_INS_UCVTF: ucvtf $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFs, ARM64_INS_UCVTF: ucvtf $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFv1i32, ARM64_INS_UCVTF: ucvtf $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFv1i64, ARM64_INS_UCVTF: ucvtf $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFv2f32, ARM64_INS_UCVTF: ucvtf.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFv2f64, ARM64_INS_UCVTF: ucvtf.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFv2i32_shift, ARM64_INS_UCVTF: ucvtf.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFv2i64_shift, ARM64_INS_UCVTF: ucvtf.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFv4f32, ARM64_INS_UCVTF: ucvtf.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UCVTFv4i32_shift, ARM64_INS_UCVTF: ucvtf.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UDIVWr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UDIVXr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UDIV_IntWr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UDIV_IntXr, ARM64_INS_UDIV: udiv $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UHADDv16i8, ARM64_INS_UHADD: uhadd.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UHADDv2i32, ARM64_INS_UHADD: uhadd.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UHADDv4i16, ARM64_INS_UHADD: uhadd.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UHADDv4i32, ARM64_INS_UHADD: uhadd.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UHADDv8i16, ARM64_INS_UHADD: uhadd.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UHADDv8i8, ARM64_INS_UHADD: uhadd.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UHSUBv16i8, ARM64_INS_UHSUB: uhsub.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UHSUBv2i32, ARM64_INS_UHSUB: uhsub.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UHSUBv4i16, ARM64_INS_UHSUB: uhsub.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UHSUBv4i32, ARM64_INS_UHSUB: uhsub.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UHSUBv8i16, ARM64_INS_UHSUB: uhsub.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UHSUBv8i8, ARM64_INS_UHSUB: uhsub.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMADDLrrr, ARM64_INS_UMADDL: umaddl $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXPv16i8, ARM64_INS_UMAXP: umaxp.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXPv2i32, ARM64_INS_UMAXP: umaxp.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXPv4i16, ARM64_INS_UMAXP: umaxp.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXPv4i32, ARM64_INS_UMAXP: umaxp.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXPv8i16, ARM64_INS_UMAXP: umaxp.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXPv8i8, ARM64_INS_UMAXP: umaxp.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXVv16i8v, ARM64_INS_UMAXV: umaxv.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXVv4i16v, ARM64_INS_UMAXV: umaxv.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXVv4i32v, ARM64_INS_UMAXV: umaxv.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXVv8i16v, ARM64_INS_UMAXV: umaxv.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXVv8i8v, ARM64_INS_UMAXV: umaxv.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXv16i8, ARM64_INS_UMAX: umax.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXv2i32, ARM64_INS_UMAX: umax.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXv4i16, ARM64_INS_UMAX: umax.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXv4i32, ARM64_INS_UMAX: umax.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXv8i16, ARM64_INS_UMAX: umax.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMAXv8i8, ARM64_INS_UMAX: umax.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINPv16i8, ARM64_INS_UMINP: uminp.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINPv2i32, ARM64_INS_UMINP: uminp.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINPv4i16, ARM64_INS_UMINP: uminp.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINPv4i32, ARM64_INS_UMINP: uminp.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINPv8i16, ARM64_INS_UMINP: uminp.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINPv8i8, ARM64_INS_UMINP: uminp.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINVv16i8v, ARM64_INS_UMINV: uminv.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINVv4i16v, ARM64_INS_UMINV: uminv.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINVv4i32v, ARM64_INS_UMINV: uminv.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINVv8i16v, ARM64_INS_UMINV: uminv.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINVv8i8v, ARM64_INS_UMINV: uminv.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINv16i8, ARM64_INS_UMIN: umin.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINv2i32, ARM64_INS_UMIN: umin.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINv4i16, ARM64_INS_UMIN: umin.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINv4i32, ARM64_INS_UMIN: umin.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINv8i16, ARM64_INS_UMIN: umin.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMINv8i8, ARM64_INS_UMIN: umin.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLALv16i8_v8i16, ARM64_INS_UMLAL2: umlal2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLALv2i32_indexed, ARM64_INS_UMLAL: umlal.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLALv2i32_v2i64, ARM64_INS_UMLAL: umlal.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLALv4i16_indexed, ARM64_INS_UMLAL: umlal.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLALv4i16_v4i32, ARM64_INS_UMLAL: umlal.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLALv4i32_indexed, ARM64_INS_UMLAL2: umlal2.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLALv4i32_v2i64, ARM64_INS_UMLAL2: umlal2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLALv8i16_indexed, ARM64_INS_UMLAL2: umlal2.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLALv8i16_v4i32, ARM64_INS_UMLAL2: umlal2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLALv8i8_v8i16, ARM64_INS_UMLAL: umlal.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLSLv16i8_v8i16, ARM64_INS_UMLSL2: umlsl2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLSLv2i32_indexed, ARM64_INS_UMLSL: umlsl.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLSLv2i32_v2i64, ARM64_INS_UMLSL: umlsl.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLSLv4i16_indexed, ARM64_INS_UMLSL: umlsl.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLSLv4i16_v4i32, ARM64_INS_UMLSL: umlsl.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLSLv4i32_indexed, ARM64_INS_UMLSL2: umlsl2.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLSLv4i32_v2i64, ARM64_INS_UMLSL2: umlsl2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLSLv8i16_indexed, ARM64_INS_UMLSL2: umlsl2.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLSLv8i16_v4i32, ARM64_INS_UMLSL2: umlsl2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMLSLv8i8_v8i16, ARM64_INS_UMLSL: umlsl.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMOVvi16, ARM64_INS_UMOV: umov.h $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMOVvi32, ARM64_INS_UMOV: umov.s $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMOVvi64, ARM64_INS_UMOV: umov.d $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMOVvi8, ARM64_INS_UMOV: umov.b $rd, $rn$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMSUBLrrr, ARM64_INS_UMSUBL: umsubl $rd, $rn, $rm, $ra */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMULHrr, ARM64_INS_UMULH: umulh $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMULLv16i8_v8i16, ARM64_INS_UMULL2: umull2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMULLv2i32_indexed, ARM64_INS_UMULL: umull.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMULLv2i32_v2i64, ARM64_INS_UMULL: umull.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMULLv4i16_indexed, ARM64_INS_UMULL: umull.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMULLv4i16_v4i32, ARM64_INS_UMULL: umull.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMULLv4i32_indexed, ARM64_INS_UMULL2: umull2.2d $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMULLv4i32_v2i64, ARM64_INS_UMULL2: umull2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMULLv8i16_indexed, ARM64_INS_UMULL2: umull2.4s $rd, $rn, $rm$idx */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMULLv8i16_v4i32, ARM64_INS_UMULL2: umull2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UMULLv8i8_v8i16, ARM64_INS_UMULL: umull.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQADDv16i8, ARM64_INS_UQADD: uqadd.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQADDv1i16, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQADDv1i32, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQADDv1i64, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQADDv1i8, ARM64_INS_UQADD: uqadd $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQADDv2i32, ARM64_INS_UQADD: uqadd.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQADDv2i64, ARM64_INS_UQADD: uqadd.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQADDv4i16, ARM64_INS_UQADD: uqadd.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQADDv4i32, ARM64_INS_UQADD: uqadd.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQADDv8i16, ARM64_INS_UQADD: uqadd.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQADDv8i8, ARM64_INS_UQADD: uqadd.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHLv16i8, ARM64_INS_UQRSHL: uqrshl.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHLv1i16, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHLv1i32, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHLv1i64, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHLv1i8, ARM64_INS_UQRSHL: uqrshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHLv2i32, ARM64_INS_UQRSHL: uqrshl.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHLv2i64, ARM64_INS_UQRSHL: uqrshl.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHLv4i16, ARM64_INS_UQRSHL: uqrshl.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHLv4i32, ARM64_INS_UQRSHL: uqrshl.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHLv8i16, ARM64_INS_UQRSHL: uqrshl.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHLv8i8, ARM64_INS_UQRSHL: uqrshl.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHRNb, ARM64_INS_UQRSHRN: uqrshrn $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHRNh, ARM64_INS_UQRSHRN: uqrshrn $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHRNs, ARM64_INS_UQRSHRN: uqrshrn $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHRNv16i8_shift, ARM64_INS_UQRSHRN2: uqrshrn2.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHRNv2i32_shift, ARM64_INS_UQRSHRN: uqrshrn.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHRNv4i16_shift, ARM64_INS_UQRSHRN: uqrshrn.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHRNv4i32_shift, ARM64_INS_UQRSHRN2: uqrshrn2.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHRNv8i16_shift, ARM64_INS_UQRSHRN2: uqrshrn2.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQRSHRNv8i8_shift, ARM64_INS_UQRSHRN: uqrshrn.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLb, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLd, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLh, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLs, ARM64_INS_UQSHL: uqshl $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv16i8, ARM64_INS_UQSHL: uqshl.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv16i8_shift, ARM64_INS_UQSHL: uqshl.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv1i16, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv1i32, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv1i64, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv1i8, ARM64_INS_UQSHL: uqshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv2i32, ARM64_INS_UQSHL: uqshl.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv2i32_shift, ARM64_INS_UQSHL: uqshl.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv2i64, ARM64_INS_UQSHL: uqshl.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv2i64_shift, ARM64_INS_UQSHL: uqshl.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv4i16, ARM64_INS_UQSHL: uqshl.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv4i16_shift, ARM64_INS_UQSHL: uqshl.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv4i32, ARM64_INS_UQSHL: uqshl.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv4i32_shift, ARM64_INS_UQSHL: uqshl.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv8i16, ARM64_INS_UQSHL: uqshl.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv8i16_shift, ARM64_INS_UQSHL: uqshl.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv8i8, ARM64_INS_UQSHL: uqshl.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHLv8i8_shift, ARM64_INS_UQSHL: uqshl.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHRNb, ARM64_INS_UQSHRN: uqshrn $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHRNh, ARM64_INS_UQSHRN: uqshrn $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHRNs, ARM64_INS_UQSHRN: uqshrn $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHRNv16i8_shift, ARM64_INS_UQSHRN2: uqshrn2.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHRNv2i32_shift, ARM64_INS_UQSHRN: uqshrn.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHRNv4i16_shift, ARM64_INS_UQSHRN: uqshrn.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHRNv4i32_shift, ARM64_INS_UQSHRN2: uqshrn2.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHRNv8i16_shift, ARM64_INS_UQSHRN2: uqshrn2.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSHRNv8i8_shift, ARM64_INS_UQSHRN: uqshrn.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSUBv16i8, ARM64_INS_UQSUB: uqsub.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSUBv1i16, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSUBv1i32, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSUBv1i64, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSUBv1i8, ARM64_INS_UQSUB: uqsub $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSUBv2i32, ARM64_INS_UQSUB: uqsub.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSUBv2i64, ARM64_INS_UQSUB: uqsub.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSUBv4i16, ARM64_INS_UQSUB: uqsub.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSUBv4i32, ARM64_INS_UQSUB: uqsub.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSUBv8i16, ARM64_INS_UQSUB: uqsub.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQSUBv8i8, ARM64_INS_UQSUB: uqsub.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQXTNv16i8, ARM64_INS_UQXTN2: uqxtn2.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQXTNv1i16, ARM64_INS_UQXTN: uqxtn $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQXTNv1i32, ARM64_INS_UQXTN: uqxtn $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQXTNv1i8, ARM64_INS_UQXTN: uqxtn $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQXTNv2i32, ARM64_INS_UQXTN: uqxtn.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQXTNv4i16, ARM64_INS_UQXTN: uqxtn.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQXTNv4i32, ARM64_INS_UQXTN2: uqxtn2.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQXTNv8i16, ARM64_INS_UQXTN2: uqxtn2.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_UQXTNv8i8, ARM64_INS_UQXTN: uqxtn.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_URECPEv2i32, ARM64_INS_URECPE: urecpe.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_URECPEv4i32, ARM64_INS_URECPE: urecpe.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_URHADDv16i8, ARM64_INS_URHADD: urhadd.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URHADDv2i32, ARM64_INS_URHADD: urhadd.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URHADDv4i16, ARM64_INS_URHADD: urhadd.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URHADDv4i32, ARM64_INS_URHADD: urhadd.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URHADDv8i16, ARM64_INS_URHADD: urhadd.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URHADDv8i8, ARM64_INS_URHADD: urhadd.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHLv16i8, ARM64_INS_URSHL: urshl.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHLv1i64, ARM64_INS_URSHL: urshl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHLv2i32, ARM64_INS_URSHL: urshl.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHLv2i64, ARM64_INS_URSHL: urshl.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHLv4i16, ARM64_INS_URSHL: urshl.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHLv4i32, ARM64_INS_URSHL: urshl.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHLv8i16, ARM64_INS_URSHL: urshl.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHLv8i8, ARM64_INS_URSHL: urshl.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHRd, ARM64_INS_URSHR: urshr $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHRv16i8_shift, ARM64_INS_URSHR: urshr.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHRv2i32_shift, ARM64_INS_URSHR: urshr.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHRv2i64_shift, ARM64_INS_URSHR: urshr.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHRv4i16_shift, ARM64_INS_URSHR: urshr.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHRv4i32_shift, ARM64_INS_URSHR: urshr.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHRv8i16_shift, ARM64_INS_URSHR: urshr.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSHRv8i8_shift, ARM64_INS_URSHR: urshr.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSQRTEv2i32, ARM64_INS_URSQRTE: ursqrte.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSQRTEv4i32, ARM64_INS_URSQRTE: ursqrte.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSRAd, ARM64_INS_URSRA: ursra $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSRAv16i8_shift, ARM64_INS_URSRA: ursra.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSRAv2i32_shift, ARM64_INS_URSRA: ursra.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSRAv2i64_shift, ARM64_INS_URSRA: ursra.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSRAv4i16_shift, ARM64_INS_URSRA: ursra.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSRAv4i32_shift, ARM64_INS_URSRA: ursra.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSRAv8i16_shift, ARM64_INS_URSRA: ursra.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_URSRAv8i8_shift, ARM64_INS_URSRA: ursra.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHLLv16i8_shift, ARM64_INS_USHLL2: ushll2.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHLLv2i32_shift, ARM64_INS_USHLL: ushll.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHLLv4i16_shift, ARM64_INS_USHLL: ushll.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHLLv4i32_shift, ARM64_INS_USHLL2: ushll2.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHLLv8i16_shift, ARM64_INS_USHLL2: ushll2.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHLLv8i8_shift, ARM64_INS_USHLL: ushll.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHLv16i8, ARM64_INS_USHL: ushl.16b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHLv1i64, ARM64_INS_USHL: ushl $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHLv2i32, ARM64_INS_USHL: ushl.2s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHLv2i64, ARM64_INS_USHL: ushl.2d $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHLv4i16, ARM64_INS_USHL: ushl.4h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHLv4i32, ARM64_INS_USHL: ushl.4s $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHLv8i16, ARM64_INS_USHL: ushl.8h $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHLv8i8, ARM64_INS_USHL: ushl.8b $rd, $rn, $rm| */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHRd, ARM64_INS_USHR: ushr $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHRv16i8_shift, ARM64_INS_USHR: ushr.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHRv2i32_shift, ARM64_INS_USHR: ushr.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHRv2i64_shift, ARM64_INS_USHR: ushr.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHRv4i16_shift, ARM64_INS_USHR: ushr.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHRv4i32_shift, ARM64_INS_USHR: ushr.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHRv8i16_shift, ARM64_INS_USHR: ushr.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USHRv8i8_shift, ARM64_INS_USHR: ushr.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USQADDv16i8, ARM64_INS_USQADD: usqadd.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USQADDv1i16, ARM64_INS_USQADD: usqadd $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USQADDv1i32, ARM64_INS_USQADD: usqadd $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USQADDv1i64, ARM64_INS_USQADD: usqadd $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USQADDv1i8, ARM64_INS_USQADD: usqadd $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USQADDv2i32, ARM64_INS_USQADD: usqadd.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USQADDv2i64, ARM64_INS_USQADD: usqadd.2d $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USQADDv4i16, ARM64_INS_USQADD: usqadd.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USQADDv4i32, ARM64_INS_USQADD: usqadd.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USQADDv8i16, ARM64_INS_USQADD: usqadd.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USQADDv8i8, ARM64_INS_USQADD: usqadd.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USRAd, ARM64_INS_USRA: usra $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USRAv16i8_shift, ARM64_INS_USRA: usra.16b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USRAv2i32_shift, ARM64_INS_USRA: usra.2s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USRAv2i64_shift, ARM64_INS_USRA: usra.2d $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USRAv4i16_shift, ARM64_INS_USRA: usra.4h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USRAv4i32_shift, ARM64_INS_USRA: usra.4s $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USRAv8i16_shift, ARM64_INS_USRA: usra.8h $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USRAv8i8_shift, ARM64_INS_USRA: usra.8b $rd, $rn, $imm */
+ 0,
+ { CS_AC_WRITE | CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USUBLv16i8_v8i16, ARM64_INS_USUBL2: usubl2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USUBLv2i32_v2i64, ARM64_INS_USUBL: usubl.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USUBLv4i16_v4i32, ARM64_INS_USUBL: usubl.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USUBLv4i32_v2i64, ARM64_INS_USUBL2: usubl2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USUBLv8i16_v4i32, ARM64_INS_USUBL2: usubl2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USUBLv8i8_v8i16, ARM64_INS_USUBL: usubl.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USUBWv16i8_v8i16, ARM64_INS_USUBW2: usubw2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USUBWv2i32_v2i64, ARM64_INS_USUBW: usubw.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USUBWv4i16_v4i32, ARM64_INS_USUBW: usubw.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USUBWv4i32_v2i64, ARM64_INS_USUBW2: usubw2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USUBWv8i16_v4i32, ARM64_INS_USUBW2: usubw2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_USUBWv8i8_v8i16, ARM64_INS_USUBW: usubw.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UZP1v16i8, ARM64_INS_UZP1: uzp1.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UZP1v2i32, ARM64_INS_UZP1: uzp1.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UZP1v2i64, ARM64_INS_UZP1: uzp1.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UZP1v4i16, ARM64_INS_UZP1: uzp1.4h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UZP1v4i32, ARM64_INS_UZP1: uzp1.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UZP1v8i16, ARM64_INS_UZP1: uzp1.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UZP1v8i8, ARM64_INS_UZP1: uzp1.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UZP2v16i8, ARM64_INS_UZP2: uzp2.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UZP2v2i32, ARM64_INS_UZP2: uzp2.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UZP2v2i64, ARM64_INS_UZP2: uzp2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UZP2v4i16, ARM64_INS_UZP2: uzp2.4h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UZP2v4i32, ARM64_INS_UZP2: uzp2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UZP2v8i16, ARM64_INS_UZP2: uzp2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_UZP2v8i8, ARM64_INS_UZP2: uzp2.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_XTNv16i8, ARM64_INS_XTN2: xtn2.16b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_XTNv2i32, ARM64_INS_XTN: xtn.2s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_XTNv4i16, ARM64_INS_XTN: xtn.4h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_XTNv4i32, ARM64_INS_XTN2: xtn2.4s $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_XTNv8i16, ARM64_INS_XTN2: xtn2.8h $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_XTNv8i8, ARM64_INS_XTN: xtn.8b $rd, $rn */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* AArch64_ZIP1v16i8, ARM64_INS_ZIP1: zip1.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ZIP1v2i32, ARM64_INS_ZIP1: zip1.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ZIP1v2i64, ARM64_INS_ZIP1: zip1.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ZIP1v4i16, ARM64_INS_ZIP1: zip1.4h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ZIP1v4i32, ARM64_INS_ZIP1: zip1.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ZIP1v8i16, ARM64_INS_ZIP1: zip1.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ZIP1v8i8, ARM64_INS_ZIP1: zip1.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ZIP2v16i8, ARM64_INS_ZIP2: zip2.16b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ZIP2v2i32, ARM64_INS_ZIP2: zip2.2s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ZIP2v2i64, ARM64_INS_ZIP2: zip2.2d $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ZIP2v4i16, ARM64_INS_ZIP2: zip2.4h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ZIP2v4i32, ARM64_INS_ZIP2: zip2.4s $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ZIP2v8i16, ARM64_INS_ZIP2: zip2.8h $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* AArch64_ZIP2v8i8, ARM64_INS_ZIP2: zip2.8b $rd, $rn, $rm */
+ 0,
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+}
diff --git a/arch/AArch64/AArch64Module.c b/arch/AArch64/AArch64Module.c
index 43b7e01..f44a7ea 100644
--- a/arch/AArch64/AArch64Module.c
+++ b/arch/AArch64/AArch64Module.c
@@ -29,6 +29,9 @@
ud->insn_name = AArch64_insn_name;
ud->group_name = AArch64_group_name;
ud->post_printer = AArch64_post_printer;
+#ifndef CAPSTONE_DIET
+ ud->reg_access = AArch64_reg_access;
+#endif
return CS_ERR_OK;
}
diff --git a/arch/AArch64/ARMMappingInsnOp.inc b/arch/AArch64/ARMMappingInsnOp.inc
new file mode 100644
index 0000000..dee436f
--- /dev/null
+++ b/arch/AArch64/ARMMappingInsnOp.inc
@@ -0,0 +1,6657 @@
+// This is auto-gen data for Capstone disassembly engine (www.capstone-engine.org)
+// By Nguyen Anh Quynh <aquynh@gmail.com>
+
+{ /* ARM_ADCri, ARM_INS_ADC: adc${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_ADCrr, ARM_INS_ADC: adc${s}${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_ADCrsi, ARM_INS_ADC: adc${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_ADCrsr, ARM_INS_ADC: adc${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_ADDri, ARM_INS_ADD: add${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_ADDrr, ARM_INS_ADD: add${s}${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_ADDrsi, ARM_INS_ADD: add${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_ADDrsr, ARM_INS_ADD: add${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_ADR, ARM_INS_ADR: adr${p} $rd, $label */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_AESD, ARM_INS_AESD: aesd.8 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_AESE, ARM_INS_AESE: aese.8 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_AESIMC, ARM_INS_AESIMC: aesimc.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_AESMC, ARM_INS_AESMC: aesmc.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_ANDri, ARM_INS_AND: and${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_ANDrr, ARM_INS_AND: and${s}${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_ANDrsi, ARM_INS_AND: and${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_ANDrsr, ARM_INS_AND: and${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_BFC, ARM_INS_BFC: bfc${p} $rd, $imm */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_BFI, ARM_INS_BFI: bfi${p} $rd, $rn, $imm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_BICri, ARM_INS_BIC: bic${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_BICrr, ARM_INS_BIC: bic${s}${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_BICrsi, ARM_INS_BIC: bic${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_BICrsr, ARM_INS_BIC: bic${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_BKPT, ARM_INS_BKPT: bkpt $val */
+ { 0 }
+},
+{ /* ARM_BL, ARM_INS_BL: bl $func */
+ { 0 }
+},
+{ /* ARM_BLX, ARM_INS_BLX: blx $func */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_BLX_pred, ARM_INS_BLX: blx${p} $func */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_BLXi, ARM_INS_BLX: blx $target */
+ { 0 }
+},
+{ /* ARM_BL_pred, ARM_INS_BL: bl${p} $func */
+ { 0 }
+},
+{ /* ARM_BX, ARM_INS_BX: bx $dst */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_BXJ, ARM_INS_BXJ: bxj${p} $func */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_BX_RET, ARM_INS_BX: bx${p} lr */
+ { 0 }
+},
+{ /* ARM_BX_pred, ARM_INS_BX: bx${p} $dst */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_Bcc, ARM_INS_B: b${p} $target */
+ { 0 }
+},
+{ /* ARM_CDP, ARM_INS_CDP: cdp${p} $cop, $opc1, $crd, $crn, $crm, $opc2 */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 }
+},
+{ /* ARM_CDP2, ARM_INS_CDP2: cdp2 $cop, $opc1, $crd, $crn, $crm, $opc2 */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 }
+},
+{ /* ARM_CLREX, ARM_INS_CLREX: clrex */
+ { 0 }
+},
+{ /* ARM_CLZ, ARM_INS_CLZ: clz${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_CMNri, ARM_INS_CMN: cmn${p} $rn, $imm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_CMNzrr, ARM_INS_CMN: cmn${p} $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_CMNzrsi, ARM_INS_CMN: cmn${p} $rn, $shift */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_CMNzrsr, ARM_INS_CMN: cmn${p} $rn, $shift */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_CMPri, ARM_INS_CMP: cmp${p} $rn, $imm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_CMPrr, ARM_INS_CMP: cmp${p} $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_CMPrsi, ARM_INS_CMP: cmp${p} $rn, $shift */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_CMPrsr, ARM_INS_CMP: cmp${p} $rn, $shift */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_CPS1p, ARM_INS_CPS: cps $mode */
+ { 0 }
+},
+{ /* ARM_CPS2p, ARM_INS_CPS: cps$imod $iflags */
+ { 0 }
+},
+{ /* ARM_CPS3p, ARM_INS_CPS: cps$imod $iflags, $mode */
+ { 0 }
+},
+{ /* ARM_CRC32B, ARM_INS_CRC32B: crc32b $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_CRC32CB, ARM_INS_CRC32CB: crc32cb $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_CRC32CH, ARM_INS_CRC32CH: crc32ch $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_CRC32CW, ARM_INS_CRC32CW: crc32cw $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_CRC32H, ARM_INS_CRC32H: crc32h $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_CRC32W, ARM_INS_CRC32W: crc32w $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_DBG, ARM_INS_DBG: dbg${p} $opt */
+ { 0 }
+},
+{ /* ARM_DMB, ARM_INS_DMB: dmb $opt */
+ { 0 }
+},
+{ /* ARM_DSB, ARM_INS_DSB: dsb $opt */
+ { 0 }
+},
+{ /* ARM_EORri, ARM_INS_EOR: eor${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_EORrr, ARM_INS_EOR: eor${s}${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_EORrsi, ARM_INS_EOR: eor${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_EORrsr, ARM_INS_EOR: eor${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_ERET, ARM_INS_ERET: eret${p} */
+ { 0 }
+},
+{ /* ARM_FCONSTD, ARM_INS_VMOV: vmov${p}.f64 $dd, $imm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_FCONSTS, ARM_INS_VMOV: vmov${p}.f32 $sd, $imm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_FLDMXDB_UPD, ARM_INS_FLDMDBX: fldmdbx${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_FLDMXIA, ARM_INS_FLDMIAX: fldmiax${p} $rn, $regs */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_FLDMXIA_UPD, ARM_INS_FLDMIAX: fldmiax${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_FMSTAT, ARM_INS_VMRS: vmrs${p} apsr_nzcv, fpscr */
+ { 0 }
+},
+{ /* ARM_FSTMXDB_UPD, ARM_INS_FSTMDBX: fstmdbx${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_FSTMXIA, ARM_INS_FSTMIAX: fstmiax${p} $rn, $regs */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_FSTMXIA_UPD, ARM_INS_FSTMIAX: fstmiax${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_HINT, ARM_INS_HINT: hint${p} $imm */
+ { 0 }
+},
+{ /* ARM_HLT, ARM_INS_HLT: hlt $val */
+ { 0 }
+},
+{ /* ARM_HVC, ARM_INS_HVC: hvc $imm */
+ { 0 }
+},
+{ /* ARM_ISB, ARM_INS_ISB: isb $opt */
+ { 0 }
+},
+{ /* ARM_LDA, ARM_INS_LDA: lda${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDAB, ARM_INS_LDAB: ldab${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDAEX, ARM_INS_LDAEX: ldaex${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDAEXB, ARM_INS_LDAEXB: ldaexb${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDAEXD, ARM_INS_LDAEXD: ldaexd${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDAEXH, ARM_INS_LDAEXH: ldaexh${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDAH, ARM_INS_LDAH: ldah${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDC2L_OFFSET, ARM_INS_LDC2L: ldc2l $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDC2L_OPTION, ARM_INS_LDC2L: ldc2l $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDC2L_POST, ARM_INS_LDC2L: ldc2l $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDC2L_PRE, ARM_INS_LDC2L: ldc2l $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDC2_OFFSET, ARM_INS_LDC2: ldc2 $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDC2_OPTION, ARM_INS_LDC2: ldc2 $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDC2_POST, ARM_INS_LDC2: ldc2 $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDC2_PRE, ARM_INS_LDC2: ldc2 $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDCL_OFFSET, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDCL_OPTION, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDCL_POST, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDCL_PRE, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDC_OFFSET, ARM_INS_LDC: ldc${p} $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDC_OPTION, ARM_INS_LDC: ldc${p} $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDC_POST, ARM_INS_LDC: ldc${p} $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDC_PRE, ARM_INS_LDC: ldc${p} $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDMDA, ARM_INS_LDMDA: ldmda${p} $rn, $regs */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDMDA_UPD, ARM_INS_LDMDA: ldmda${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDMDB, ARM_INS_LDMDB: ldmdb${p} $rn, $regs */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDMDB_UPD, ARM_INS_LDMDB: ldmdb${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDMIA, ARM_INS_LDM: ldm${p} $rn, $regs */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDMIA_UPD, ARM_INS_LDM: ldm${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDMIB, ARM_INS_LDMIB: ldmib${p} $rn, $regs */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDMIB_UPD, ARM_INS_LDMIB: ldmib${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDRBT_POST_IMM, ARM_INS_LDRBT: ldrbt${p} $rt, $addr, $offset */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRBT_POST_REG, ARM_INS_LDRBT: ldrbt${p} $rt, $addr, $offset */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRB_POST_IMM, ARM_INS_LDRB: ldrb${p} $rt, $addr, $offset */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRB_POST_REG, ARM_INS_LDRB: ldrb${p} $rt, $addr, $offset */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRB_PRE_IMM, ARM_INS_LDRB: ldrb${p} $rt, $addr! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRB_PRE_REG, ARM_INS_LDRB: ldrb${p} $rt, $addr! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRBi12, ARM_INS_LDRB: ldrb${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRBrs, ARM_INS_LDRB: ldrb${p} $rt, $shift */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRD, ARM_INS_LDRD: ldrd${p} $rt, $rt2, $addr */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDRD_POST, ARM_INS_LDRD: ldrd${p} $rt, $rt2, $addr, $offset */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRD_PRE, ARM_INS_LDRD: ldrd${p} $rt, $rt2, $addr! */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDREX, ARM_INS_LDREX: ldrex${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDREXB, ARM_INS_LDREXB: ldrexb${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDREXD, ARM_INS_LDREXD: ldrexd${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDREXH, ARM_INS_LDREXH: ldrexh${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRH, ARM_INS_LDRH: ldrh${p} $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDRHTi, ARM_INS_LDRHT: ldrht${p} $rt, $addr, $offset */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRHTr, ARM_INS_LDRHT: ldrht${p} $rt, $addr, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRH_POST, ARM_INS_LDRH: ldrh${p} $rt, $addr, $offset */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRH_PRE, ARM_INS_LDRH: ldrh${p} $rt, $addr! */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDRSB, ARM_INS_LDRSB: ldrsb${p} $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDRSBTi, ARM_INS_LDRSBT: ldrsbt${p} $rt, $addr, $offset */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRSBTr, ARM_INS_LDRSBT: ldrsbt${p} $rt, $addr, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRSB_POST, ARM_INS_LDRSB: ldrsb${p} $rt, $addr, $offset */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRSB_PRE, ARM_INS_LDRSB: ldrsb${p} $rt, $addr! */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDRSH, ARM_INS_LDRSH: ldrsh${p} $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDRSHTi, ARM_INS_LDRSHT: ldrsht${p} $rt, $addr, $offset */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRSHTr, ARM_INS_LDRSHT: ldrsht${p} $rt, $addr, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRSH_POST, ARM_INS_LDRSH: ldrsh${p} $rt, $addr, $offset */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRSH_PRE, ARM_INS_LDRSH: ldrsh${p} $rt, $addr! */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_LDRT_POST_IMM, ARM_INS_LDRT: ldrt${p} $rt, $addr, $offset */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRT_POST_REG, ARM_INS_LDRT: ldrt${p} $rt, $addr, $offset */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDR_POST_IMM, ARM_INS_LDR: ldr${p} $rt, $addr, $offset */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDR_POST_REG, ARM_INS_LDR: ldr${p} $rt, $addr, $offset */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDR_PRE_IMM, ARM_INS_LDR: ldr${p} $rt, $addr! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDR_PRE_REG, ARM_INS_LDR: ldr${p} $rt, $addr! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRcp, ARM_INS_LDR: ldr${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRi12, ARM_INS_LDR: ldr${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_LDRrs, ARM_INS_LDR: ldr${p} $rt, $shift */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_MCR, ARM_INS_MCR: mcr${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 }
+},
+{ /* ARM_MCR2, ARM_INS_MCR2: mcr2 $cop, $opc1, $rt, $crn, $crm, $opc2 */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 }
+},
+{ /* ARM_MCRR, ARM_INS_MCRR: mcrr${p} $cop, $opc1, $rt, $rt2, $crm */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_MCRR2, ARM_INS_MCRR2: mcrr2 $cop, $opc1, $rt, $rt2, $crm */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_MLA, ARM_INS_MLA: mla${s}${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_MLS, ARM_INS_MLS: mls${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_MOVPCLR, ARM_INS_MOV: mov${p} pc, lr */
+ { 0 }
+},
+{ /* ARM_MOVTi16, ARM_INS_MOVT: movt${p} $rd, $imm */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_MOVi, ARM_INS_MOV: mov${s}${p} $rd, $imm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_MOVi16, ARM_INS_MOVW: movw${p} $rd, $imm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_MOVr, ARM_INS_MOV: mov${s}${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_MOVr_TC, ARM_INS_MOV: mov${s}${p} $rd, $rm */
+ { 0 }
+},
+{ /* ARM_MOVsi, ARM_INS_MOV: mov${s}${p} $rd, $src */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_MOVsr, ARM_INS_MOV: mov${s}${p} $rd, $src */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_MRC, ARM_INS_MRC: mrc${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 }
+},
+{ /* ARM_MRC2, ARM_INS_MRC2: mrc2 $cop, $opc1, $rt, $crn, $crm, $opc2 */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 }
+},
+{ /* ARM_MRRC, ARM_INS_MRRC: mrrc${p} $cop, $opc1, $rt, $rt2, $crm */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_MRRC2, ARM_INS_MRRC2: mrrc2 $cop, $opc1, $rt, $rt2, $crm */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_MRS, ARM_INS_MRS: mrs${p} $rd, apsr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_MRSbanked, ARM_INS_MRS: mrs${p} $rd, $banked */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_MRSsys, ARM_INS_MRS: mrs${p} $rd, spsr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_MSR, ARM_INS_MSR: msr${p} $mask, $rn */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_MSRbanked, ARM_INS_MSR: msr${p} $banked, $rn */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_MSRi, ARM_INS_MSR: msr${p} $mask, $imm */
+ { 0 }
+},
+{ /* ARM_MUL, ARM_INS_MUL: mul${s}${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_MVNi, ARM_INS_MVN: mvn${s}${p} $rd, $imm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_MVNr, ARM_INS_MVN: mvn${s}${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_MVNsi, ARM_INS_MVN: mvn${s}${p} $rd, $shift */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_MVNsr, ARM_INS_MVN: mvn${s}${p} $rd, $shift */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_ORRri, ARM_INS_ORR: orr${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_ORRrr, ARM_INS_ORR: orr${s}${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_ORRrsi, ARM_INS_ORR: orr${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_ORRrsr, ARM_INS_ORR: orr${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_PKHBT, ARM_INS_PKHBT: pkhbt${p} $rd, $rn, $rm$sh */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_PKHTB, ARM_INS_PKHTB: pkhtb${p} $rd, $rn, $rm$sh */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_PLDWi12, ARM_INS_PLDW: pldw $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_PLDWrs, ARM_INS_PLDW: pldw $shift */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_PLDi12, ARM_INS_PLD: pld $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_PLDrs, ARM_INS_PLD: pld $shift */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_PLIi12, ARM_INS_PLI: pli $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_PLIrs, ARM_INS_PLI: pli $shift */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_QADD, ARM_INS_QADD: qadd${p} $rd, $rm, $rn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_QADD16, ARM_INS_QADD16: qadd16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_QADD8, ARM_INS_QADD8: qadd8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_QASX, ARM_INS_QASX: qasx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_QDADD, ARM_INS_QDADD: qdadd${p} $rd, $rm, $rn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_QDSUB, ARM_INS_QDSUB: qdsub${p} $rd, $rm, $rn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_QSAX, ARM_INS_QSAX: qsax${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_QSUB, ARM_INS_QSUB: qsub${p} $rd, $rm, $rn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_QSUB16, ARM_INS_QSUB16: qsub16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_QSUB8, ARM_INS_QSUB8: qsub8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_RBIT, ARM_INS_RBIT: rbit${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_REV, ARM_INS_REV: rev${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_REV16, ARM_INS_REV16: rev16${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_REVSH, ARM_INS_REVSH: revsh${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_RFEDA, ARM_INS_RFEDA: rfeda $rn */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_RFEDA_UPD, ARM_INS_RFEDA: rfeda $rn! */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_RFEDB, ARM_INS_RFEDB: rfedb $rn */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_RFEDB_UPD, ARM_INS_RFEDB: rfedb $rn! */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_RFEIA, ARM_INS_RFEIA: rfeia $rn */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_RFEIA_UPD, ARM_INS_RFEIA: rfeia $rn! */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_RFEIB, ARM_INS_RFEIB: rfeib $rn */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_RFEIB_UPD, ARM_INS_RFEIB: rfeib $rn! */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_RSBri, ARM_INS_RSB: rsb${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_RSBrr, ARM_INS_RSB: rsb${s}${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_RSBrsi, ARM_INS_RSB: rsb${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_RSBrsr, ARM_INS_RSB: rsb${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_RSCri, ARM_INS_RSC: rsc${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_RSCrr, ARM_INS_RSC: rsc${s}${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_RSCrsi, ARM_INS_RSC: rsc${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_RSCrsr, ARM_INS_RSC: rsc${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SADD16, ARM_INS_SADD16: sadd16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SADD8, ARM_INS_SADD8: sadd8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SASX, ARM_INS_SASX: sasx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SBCri, ARM_INS_SBC: sbc${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_SBCrr, ARM_INS_SBC: sbc${s}${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SBCrsi, ARM_INS_SBC: sbc${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_SBCrsr, ARM_INS_SBC: sbc${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SBFX, ARM_INS_SBFX: sbfx${p} $rd, $rn, $lsb, $width */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_SDIV, ARM_INS_SDIV: sdiv${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SEL, ARM_INS_SEL: sel${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SETEND, ARM_INS_SETEND: setend $end */
+ { 0 }
+},
+{ /* ARM_SHA1C, ARM_INS_SHA1C: sha1c.32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SHA1H, ARM_INS_SHA1H: sha1h.32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_SHA1M, ARM_INS_SHA1M: sha1m.32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SHA1P, ARM_INS_SHA1P: sha1p.32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SHA1SU0, ARM_INS_SHA1SU0: sha1su0.32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SHA1SU1, ARM_INS_SHA1SU1: sha1su1.32 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_SHA256H, ARM_INS_SHA256H: sha256h.32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SHA256H2, ARM_INS_SHA256H2: sha256h2.32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SHA256SU0, ARM_INS_SHA256SU0: sha256su0.32 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_SHA256SU1, ARM_INS_SHA256SU1: sha256su1.32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SHADD16, ARM_INS_SHADD16: shadd16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SHADD8, ARM_INS_SHADD8: shadd8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SHASX, ARM_INS_SHASX: shasx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SHSAX, ARM_INS_SHSAX: shsax${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SHSUB16, ARM_INS_SHSUB16: shsub16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SHSUB8, ARM_INS_SHSUB8: shsub8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMC, ARM_INS_SMC: smc${p} $opt */
+ { 0 }
+},
+{ /* ARM_SMLABB, ARM_INS_SMLABB: smlabb${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLABT, ARM_INS_SMLABT: smlabt${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLAD, ARM_INS_SMLAD: smlad${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLADX, ARM_INS_SMLADX: smladx${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLAL, ARM_INS_SMLAL: smlal${s}${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLALBB, ARM_INS_SMLALBB: smlalbb${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLALBT, ARM_INS_SMLALBT: smlalbt${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLALD, ARM_INS_SMLALD: smlald${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLALDX, ARM_INS_SMLALDX: smlaldx${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLALTB, ARM_INS_SMLALTB: smlaltb${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLALTT, ARM_INS_SMLALTT: smlaltt${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLATB, ARM_INS_SMLATB: smlatb${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLATT, ARM_INS_SMLATT: smlatt${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLAWB, ARM_INS_SMLAWB: smlawb${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLAWT, ARM_INS_SMLAWT: smlawt${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLSD, ARM_INS_SMLSD: smlsd${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLSDX, ARM_INS_SMLSDX: smlsdx${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLSLD, ARM_INS_SMLSLD: smlsld${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMLSLDX, ARM_INS_SMLSLDX: smlsldx${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMMLA, ARM_INS_SMMLA: smmla${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMMLAR, ARM_INS_SMMLAR: smmlar${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMMLS, ARM_INS_SMMLS: smmls${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMMLSR, ARM_INS_SMMLSR: smmlsr${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMMUL, ARM_INS_SMMUL: smmul${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMMULR, ARM_INS_SMMULR: smmulr${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMUAD, ARM_INS_SMUAD: smuad${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMUADX, ARM_INS_SMUADX: smuadx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMULBB, ARM_INS_SMULBB: smulbb${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMULBT, ARM_INS_SMULBT: smulbt${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMULL, ARM_INS_SMULL: smull${s}${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMULTB, ARM_INS_SMULTB: smultb${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMULTT, ARM_INS_SMULTT: smultt${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMULWB, ARM_INS_SMULWB: smulwb${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMULWT, ARM_INS_SMULWT: smulwt${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMUSD, ARM_INS_SMUSD: smusd${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SMUSDX, ARM_INS_SMUSDX: smusdx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SRSDA, ARM_INS_SRSDA: srsda sp, $mode */
+ { 0 }
+},
+{ /* ARM_SRSDA_UPD, ARM_INS_SRSDA: srsda sp!, $mode */
+ { 0 }
+},
+{ /* ARM_SRSDB, ARM_INS_SRSDB: srsdb sp, $mode */
+ { 0 }
+},
+{ /* ARM_SRSDB_UPD, ARM_INS_SRSDB: srsdb sp!, $mode */
+ { 0 }
+},
+{ /* ARM_SRSIA, ARM_INS_SRSIA: srsia sp, $mode */
+ { 0 }
+},
+{ /* ARM_SRSIA_UPD, ARM_INS_SRSIA: srsia sp!, $mode */
+ { 0 }
+},
+{ /* ARM_SRSIB, ARM_INS_SRSIB: srsib sp, $mode */
+ { 0 }
+},
+{ /* ARM_SRSIB_UPD, ARM_INS_SRSIB: srsib sp!, $mode */
+ { 0 }
+},
+{ /* ARM_SSAT, ARM_INS_SSAT: ssat${p} $rd, $sat_imm, $rn$sh */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_SSAT16, ARM_INS_SSAT16: ssat16${p} $rd, $sat_imm, $rn */
+ { CS_AC_WRITE, CS_AC_IGNORE, CS_AC_READ, 0 }
+},
+{ /* ARM_SSAX, ARM_INS_SSAX: ssax${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SSUB16, ARM_INS_SSUB16: ssub16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SSUB8, ARM_INS_SSUB8: ssub8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STC2L_OFFSET, ARM_INS_STC2L: stc2l $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STC2L_OPTION, ARM_INS_STC2L: stc2l $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STC2L_POST, ARM_INS_STC2L: stc2l $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STC2L_PRE, ARM_INS_STC2L: stc2l $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STC2_OFFSET, ARM_INS_STC2: stc2 $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STC2_OPTION, ARM_INS_STC2: stc2 $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STC2_POST, ARM_INS_STC2: stc2 $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STC2_PRE, ARM_INS_STC2: stc2 $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STCL_OFFSET, ARM_INS_STCL: stcl${p} $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STCL_OPTION, ARM_INS_STCL: stcl${p} $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STCL_POST, ARM_INS_STCL: stcl${p} $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STCL_PRE, ARM_INS_STCL: stcl${p} $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STC_OFFSET, ARM_INS_STC: stc${p} $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STC_OPTION, ARM_INS_STC: stc${p} $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STC_POST, ARM_INS_STC: stc${p} $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STC_PRE, ARM_INS_STC: stc${p} $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STL, ARM_INS_STL: stl${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STLB, ARM_INS_STLB: stlb${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STLEX, ARM_INS_STLEX: stlex${p} $rd, $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STLEXB, ARM_INS_STLEXB: stlexb${p} $rd, $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STLEXD, ARM_INS_STLEXD: stlexd${p} $rd, $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STLEXH, ARM_INS_STLEXH: stlexh${p} $rd, $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STLH, ARM_INS_STLH: stlh${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STMDA, ARM_INS_STMDA: stmda${p} $rn, $regs */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STMDA_UPD, ARM_INS_STMDA: stmda${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_STMDB, ARM_INS_STMDB: stmdb${p} $rn, $regs */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STMDB_UPD, ARM_INS_STMDB: stmdb${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_STMIA, ARM_INS_STM: stm${p} $rn, $regs */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STMIA_UPD, ARM_INS_STM: stm${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_STMIB, ARM_INS_STMIB: stmib${p} $rn, $regs */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STMIB_UPD, ARM_INS_STMIB: stmib${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_STRBT_POST_IMM, ARM_INS_STRBT: strbt${p} $rt, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STRBT_POST_REG, ARM_INS_STRBT: strbt${p} $rt, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STRB_POST_IMM, ARM_INS_STRB: strb${p} $rt, $addr, $offset */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_STRB_POST_REG, ARM_INS_STRB: strb${p} $rt, $addr, $offset */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_STRB_PRE_IMM, ARM_INS_STRB: strb${p} $rt, $addr! */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_STRB_PRE_REG, ARM_INS_STRB: strb${p} $rt, $addr! */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_STRBi12, ARM_INS_STRB: strb${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_STRBrs, ARM_INS_STRB: strb${p} $rt, $shift */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_STRD, ARM_INS_STRD: strd${p} $rt, $rt2, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STRD_POST, ARM_INS_STRD: strd${p} $rt, $rt2, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STRD_PRE, ARM_INS_STRD: strd${p} $rt, $rt2, $addr! */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STREX, ARM_INS_STREX: strex${p} $rd, $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STREXB, ARM_INS_STREXB: strexb${p} $rd, $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STREXD, ARM_INS_STREXD: strexd${p} $rd, $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STREXH, ARM_INS_STREXH: strexh${p} $rd, $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STRH, ARM_INS_STRH: strh${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_STRHTi, ARM_INS_STRHT: strht${p} $rt, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STRHTr, ARM_INS_STRHT: strht${p} $rt, $addr, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STRH_POST, ARM_INS_STRH: strh${p} $rt, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_STRH_PRE, ARM_INS_STRH: strh${p} $rt, $addr! */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_STRT_POST_IMM, ARM_INS_STRT: strt${p} $rt, $addr, $offset */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_STRT_POST_REG, ARM_INS_STRT: strt${p} $rt, $addr, $offset */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_STR_POST_IMM, ARM_INS_STR: str${p} $rt, $addr, $offset */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_STR_POST_REG, ARM_INS_STR: str${p} $rt, $addr, $offset */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_STR_PRE_IMM, ARM_INS_STR: str${p} $rt, $addr! */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_STR_PRE_REG, ARM_INS_STR: str${p} $rt, $addr! */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_STRi12, ARM_INS_STR: str${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_STRrs, ARM_INS_STR: str${p} $rt, $shift */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_SUBri, ARM_INS_SUB: sub${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_SUBrr, ARM_INS_SUB: sub${s}${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SUBrsi, ARM_INS_SUB: sub${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_SUBrsr, ARM_INS_SUB: sub${s}${p} $rd, $rn, $shift */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SVC, ARM_INS_SVC: svc${p} $svc */
+ { 0 }
+},
+{ /* ARM_SWP, ARM_INS_SWP: swp${p} $rt, $rt2, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SWPB, ARM_INS_SWPB: swpb${p} $rt, $rt2, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_SXTAB, ARM_INS_SXTAB: sxtab${p} $rd, $rn, $rm$rot */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_SXTAB16, ARM_INS_SXTAB16: sxtab16${p} $rd, $rn, $rm$rot */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_SXTAH, ARM_INS_SXTAH: sxtah${p} $rd, $rn, $rm$rot */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_SXTB, ARM_INS_SXTB: sxtb${p} $rd, $rm$rot */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_SXTB16, ARM_INS_SXTB16: sxtb16${p} $rd, $rm$rot */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_SXTH, ARM_INS_SXTH: sxth${p} $rd, $rm$rot */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_TEQri, ARM_INS_TEQ: teq${p} $rn, $imm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_TEQrr, ARM_INS_TEQ: teq${p} $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_TEQrsi, ARM_INS_TEQ: teq${p} $rn, $shift */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_TEQrsr, ARM_INS_TEQ: teq${p} $rn, $shift */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_TRAP, ARM_INS_TRAP: trap */
+ { 0 }
+},
+{ /* ARM_TRAPNaCl, ARM_INS_TRAP: trap */
+ { 0 }
+},
+{ /* ARM_TSTri, ARM_INS_TST: tst${p} $rn, $imm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_TSTrr, ARM_INS_TST: tst${p} $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_TSTrsi, ARM_INS_TST: tst${p} $rn, $shift */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_TSTrsr, ARM_INS_TST: tst${p} $rn, $shift */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UADD16, ARM_INS_UADD16: uadd16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UADD8, ARM_INS_UADD8: uadd8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UASX, ARM_INS_UASX: uasx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UBFX, ARM_INS_UBFX: ubfx${p} $rd, $rn, $lsb, $width */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_UDF, ARM_INS_UDF: udf $imm16 */
+ { 0 }
+},
+{ /* ARM_UDIV, ARM_INS_UDIV: udiv${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UHADD16, ARM_INS_UHADD16: uhadd16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UHADD8, ARM_INS_UHADD8: uhadd8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UHASX, ARM_INS_UHASX: uhasx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UHSAX, ARM_INS_UHSAX: uhsax${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UHSUB16, ARM_INS_UHSUB16: uhsub16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UHSUB8, ARM_INS_UHSUB8: uhsub8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UMAAL, ARM_INS_UMAAL: umaal${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UMLAL, ARM_INS_UMLAL: umlal${s}${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UMULL, ARM_INS_UMULL: umull${s}${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UQADD16, ARM_INS_UQADD16: uqadd16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UQADD8, ARM_INS_UQADD8: uqadd8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UQASX, ARM_INS_UQASX: uqasx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UQSAX, ARM_INS_UQSAX: uqsax${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UQSUB16, ARM_INS_UQSUB16: uqsub16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UQSUB8, ARM_INS_UQSUB8: uqsub8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_USAD8, ARM_INS_USAD8: usad8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_USADA8, ARM_INS_USADA8: usada8${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_USAT, ARM_INS_USAT: usat${p} $rd, $sat_imm, $rn$sh */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_USAT16, ARM_INS_USAT16: usat16${p} $rd, $sat_imm, $rn */
+ { CS_AC_WRITE, CS_AC_IGNORE, CS_AC_READ, 0 }
+},
+{ /* ARM_USAX, ARM_INS_USAX: usax${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_USUB16, ARM_INS_USUB16: usub16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_USUB8, ARM_INS_USUB8: usub8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_UXTAB, ARM_INS_UXTAB: uxtab${p} $rd, $rn, $rm$rot */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_UXTAB16, ARM_INS_UXTAB16: uxtab16${p} $rd, $rn, $rm$rot */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_UXTAH, ARM_INS_UXTAH: uxtah${p} $rd, $rn, $rm$rot */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_UXTB, ARM_INS_UXTB: uxtb${p} $rd, $rm$rot */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_UXTB16, ARM_INS_UXTB16: uxtb16${p} $rd, $rm$rot */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_UXTH, ARM_INS_UXTH: uxth${p} $rd, $rm$rot */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VABALsv2i64, ARM_INS_VABAL: vabal${p}.s32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABALsv4i32, ARM_INS_VABAL: vabal${p}.s16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABALsv8i16, ARM_INS_VABAL: vabal${p}.s8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABALuv2i64, ARM_INS_VABAL: vabal${p}.u32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABALuv4i32, ARM_INS_VABAL: vabal${p}.u16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABALuv8i16, ARM_INS_VABAL: vabal${p}.u8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABAsv16i8, ARM_INS_VABA: vaba${p}.s8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABAsv2i32, ARM_INS_VABA: vaba${p}.s32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABAsv4i16, ARM_INS_VABA: vaba${p}.s16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABAsv4i32, ARM_INS_VABA: vaba${p}.s32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABAsv8i16, ARM_INS_VABA: vaba${p}.s16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABAsv8i8, ARM_INS_VABA: vaba${p}.s8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABAuv16i8, ARM_INS_VABA: vaba${p}.u8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABAuv2i32, ARM_INS_VABA: vaba${p}.u32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABAuv4i16, ARM_INS_VABA: vaba${p}.u16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABAuv4i32, ARM_INS_VABA: vaba${p}.u32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABAuv8i16, ARM_INS_VABA: vaba${p}.u16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABAuv8i8, ARM_INS_VABA: vaba${p}.u8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDLsv2i64, ARM_INS_VABDL: vabdl${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDLsv4i32, ARM_INS_VABDL: vabdl${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDLsv8i16, ARM_INS_VABDL: vabdl${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDLuv2i64, ARM_INS_VABDL: vabdl${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDLuv4i32, ARM_INS_VABDL: vabdl${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDLuv8i16, ARM_INS_VABDL: vabdl${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDfd, ARM_INS_VABD: vabd${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDfq, ARM_INS_VABD: vabd${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDsv16i8, ARM_INS_VABD: vabd${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDsv2i32, ARM_INS_VABD: vabd${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDsv4i16, ARM_INS_VABD: vabd${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDsv4i32, ARM_INS_VABD: vabd${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDsv8i16, ARM_INS_VABD: vabd${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDsv8i8, ARM_INS_VABD: vabd${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDuv16i8, ARM_INS_VABD: vabd${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDuv2i32, ARM_INS_VABD: vabd${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDuv4i16, ARM_INS_VABD: vabd${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDuv4i32, ARM_INS_VABD: vabd${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDuv8i16, ARM_INS_VABD: vabd${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABDuv8i8, ARM_INS_VABD: vabd${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VABSD, ARM_INS_VABS: vabs${p}.f64 $dd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VABSS, ARM_INS_VABS: vabs${p}.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VABSfd, ARM_INS_VABS: vabs${p}.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VABSfq, ARM_INS_VABS: vabs${p}.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VABSv16i8, ARM_INS_VABS: vabs${p}.s8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VABSv2i32, ARM_INS_VABS: vabs${p}.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VABSv4i16, ARM_INS_VABS: vabs${p}.s16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VABSv4i32, ARM_INS_VABS: vabs${p}.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VABSv8i16, ARM_INS_VABS: vabs${p}.s16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VABSv8i8, ARM_INS_VABS: vabs${p}.s8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VACGEd, ARM_INS_VACGE: vacge${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VACGEq, ARM_INS_VACGE: vacge${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VACGTd, ARM_INS_VACGT: vacgt${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VACGTq, ARM_INS_VACGT: vacgt${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDD, ARM_INS_VADD: vadd${p}.f64 $dd, $dn, $dm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDHNv2i32, ARM_INS_VADDHN: vaddhn${p}.i64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDHNv4i16, ARM_INS_VADDHN: vaddhn${p}.i32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDHNv8i8, ARM_INS_VADDHN: vaddhn${p}.i16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDLsv2i64, ARM_INS_VADDL: vaddl${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDLsv4i32, ARM_INS_VADDL: vaddl${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDLsv8i16, ARM_INS_VADDL: vaddl${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDLuv2i64, ARM_INS_VADDL: vaddl${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDLuv4i32, ARM_INS_VADDL: vaddl${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDLuv8i16, ARM_INS_VADDL: vaddl${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDS, ARM_INS_VADD: vadd${p}.f32 $sd, $sn, $sm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDWsv2i64, ARM_INS_VADDW: vaddw${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDWsv4i32, ARM_INS_VADDW: vaddw${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDWsv8i16, ARM_INS_VADDW: vaddw${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDWuv2i64, ARM_INS_VADDW: vaddw${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDWuv4i32, ARM_INS_VADDW: vaddw${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDWuv8i16, ARM_INS_VADDW: vaddw${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDfd, ARM_INS_VADD: vadd${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDfq, ARM_INS_VADD: vadd${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDv16i8, ARM_INS_VADD: vadd${p}.i8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDv1i64, ARM_INS_VADD: vadd${p}.i64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDv2i32, ARM_INS_VADD: vadd${p}.i32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDv2i64, ARM_INS_VADD: vadd${p}.i64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDv4i16, ARM_INS_VADD: vadd${p}.i16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDv4i32, ARM_INS_VADD: vadd${p}.i32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDv8i16, ARM_INS_VADD: vadd${p}.i16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VADDv8i8, ARM_INS_VADD: vadd${p}.i8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VANDd, ARM_INS_VAND: vand${p} $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VANDq, ARM_INS_VAND: vand${p} $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VBICd, ARM_INS_VBIC: vbic${p} $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VBICiv2i32, ARM_INS_VBIC: vbic${p}.i32 $vd, $simm */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VBICiv4i16, ARM_INS_VBIC: vbic${p}.i16 $vd, $simm */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VBICiv4i32, ARM_INS_VBIC: vbic${p}.i32 $vd, $simm */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VBICiv8i16, ARM_INS_VBIC: vbic${p}.i16 $vd, $simm */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VBICq, ARM_INS_VBIC: vbic${p} $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VBIFd, ARM_INS_VBIF: vbif${p} $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VBIFq, ARM_INS_VBIF: vbif${p} $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VBITd, ARM_INS_VBIT: vbit${p} $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VBITq, ARM_INS_VBIT: vbit${p} $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VBSLd, ARM_INS_VBSL: vbsl${p} $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VBSLq, ARM_INS_VBSL: vbsl${p} $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQfd, ARM_INS_VCEQ: vceq${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQfq, ARM_INS_VCEQ: vceq${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQv16i8, ARM_INS_VCEQ: vceq${p}.i8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQv2i32, ARM_INS_VCEQ: vceq${p}.i32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQv4i16, ARM_INS_VCEQ: vceq${p}.i16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQv4i32, ARM_INS_VCEQ: vceq${p}.i32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQv8i16, ARM_INS_VCEQ: vceq${p}.i16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQv8i8, ARM_INS_VCEQ: vceq${p}.i8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQzv16i8, ARM_INS_VCEQ: vceq${p}.i8 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQzv2f32, ARM_INS_VCEQ: vceq${p}.f32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQzv2i32, ARM_INS_VCEQ: vceq${p}.i32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQzv4f32, ARM_INS_VCEQ: vceq${p}.f32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQzv4i16, ARM_INS_VCEQ: vceq${p}.i16 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQzv4i32, ARM_INS_VCEQ: vceq${p}.i32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQzv8i16, ARM_INS_VCEQ: vceq${p}.i16 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCEQzv8i8, ARM_INS_VCEQ: vceq${p}.i8 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEfd, ARM_INS_VCGE: vcge${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEfq, ARM_INS_VCGE: vcge${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEsv16i8, ARM_INS_VCGE: vcge${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEsv2i32, ARM_INS_VCGE: vcge${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEsv4i16, ARM_INS_VCGE: vcge${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEsv4i32, ARM_INS_VCGE: vcge${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEsv8i16, ARM_INS_VCGE: vcge${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEsv8i8, ARM_INS_VCGE: vcge${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEuv16i8, ARM_INS_VCGE: vcge${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEuv2i32, ARM_INS_VCGE: vcge${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEuv4i16, ARM_INS_VCGE: vcge${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEuv4i32, ARM_INS_VCGE: vcge${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEuv8i16, ARM_INS_VCGE: vcge${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEuv8i8, ARM_INS_VCGE: vcge${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEzv16i8, ARM_INS_VCGE: vcge${p}.s8 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEzv2f32, ARM_INS_VCGE: vcge${p}.f32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEzv2i32, ARM_INS_VCGE: vcge${p}.s32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEzv4f32, ARM_INS_VCGE: vcge${p}.f32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEzv4i16, ARM_INS_VCGE: vcge${p}.s16 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEzv4i32, ARM_INS_VCGE: vcge${p}.s32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEzv8i16, ARM_INS_VCGE: vcge${p}.s16 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGEzv8i8, ARM_INS_VCGE: vcge${p}.s8 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTfd, ARM_INS_VCGT: vcgt${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTfq, ARM_INS_VCGT: vcgt${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTsv16i8, ARM_INS_VCGT: vcgt${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTsv2i32, ARM_INS_VCGT: vcgt${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTsv4i16, ARM_INS_VCGT: vcgt${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTsv4i32, ARM_INS_VCGT: vcgt${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTsv8i16, ARM_INS_VCGT: vcgt${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTsv8i8, ARM_INS_VCGT: vcgt${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTuv16i8, ARM_INS_VCGT: vcgt${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTuv2i32, ARM_INS_VCGT: vcgt${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTuv4i16, ARM_INS_VCGT: vcgt${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTuv4i32, ARM_INS_VCGT: vcgt${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTuv8i16, ARM_INS_VCGT: vcgt${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTuv8i8, ARM_INS_VCGT: vcgt${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTzv16i8, ARM_INS_VCGT: vcgt${p}.s8 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTzv2f32, ARM_INS_VCGT: vcgt${p}.f32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTzv2i32, ARM_INS_VCGT: vcgt${p}.s32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTzv4f32, ARM_INS_VCGT: vcgt${p}.f32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTzv4i16, ARM_INS_VCGT: vcgt${p}.s16 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTzv4i32, ARM_INS_VCGT: vcgt${p}.s32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTzv8i16, ARM_INS_VCGT: vcgt${p}.s16 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCGTzv8i8, ARM_INS_VCGT: vcgt${p}.s8 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLEzv16i8, ARM_INS_VCLE: vcle${p}.s8 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLEzv2f32, ARM_INS_VCLE: vcle${p}.f32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLEzv2i32, ARM_INS_VCLE: vcle${p}.s32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLEzv4f32, ARM_INS_VCLE: vcle${p}.f32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLEzv4i16, ARM_INS_VCLE: vcle${p}.s16 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLEzv4i32, ARM_INS_VCLE: vcle${p}.s32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLEzv8i16, ARM_INS_VCLE: vcle${p}.s16 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLEzv8i8, ARM_INS_VCLE: vcle${p}.s8 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLSv16i8, ARM_INS_VCLS: vcls${p}.s8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLSv2i32, ARM_INS_VCLS: vcls${p}.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLSv4i16, ARM_INS_VCLS: vcls${p}.s16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLSv4i32, ARM_INS_VCLS: vcls${p}.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLSv8i16, ARM_INS_VCLS: vcls${p}.s16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLSv8i8, ARM_INS_VCLS: vcls${p}.s8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLTzv16i8, ARM_INS_VCLT: vclt${p}.s8 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLTzv2f32, ARM_INS_VCLT: vclt${p}.f32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLTzv2i32, ARM_INS_VCLT: vclt${p}.s32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLTzv4f32, ARM_INS_VCLT: vclt${p}.f32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLTzv4i16, ARM_INS_VCLT: vclt${p}.s16 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLTzv4i32, ARM_INS_VCLT: vclt${p}.s32 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLTzv8i16, ARM_INS_VCLT: vclt${p}.s16 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLTzv8i8, ARM_INS_VCLT: vclt${p}.s8 $vd, $vm, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLZv16i8, ARM_INS_VCLZ: vclz${p}.i8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLZv2i32, ARM_INS_VCLZ: vclz${p}.i32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLZv4i16, ARM_INS_VCLZ: vclz${p}.i16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLZv4i32, ARM_INS_VCLZ: vclz${p}.i32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLZv8i16, ARM_INS_VCLZ: vclz${p}.i16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCLZv8i8, ARM_INS_VCLZ: vclz${p}.i8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCMPD, ARM_INS_VCMP: vcmp${p}.f64 $dd, $dm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCMPED, ARM_INS_VCMPE: vcmpe${p}.f64 $dd, $dm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCMPES, ARM_INS_VCMPE: vcmpe${p}.f32 $sd, $sm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCMPEZD, ARM_INS_VCMPE: vcmpe${p}.f64 $dd, #0 */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_VCMPEZS, ARM_INS_VCMPE: vcmpe${p}.f32 $sd, #0 */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_VCMPS, ARM_INS_VCMP: vcmp${p}.f32 $sd, $sm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VCMPZD, ARM_INS_VCMP: vcmp${p}.f64 $dd, #0 */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_VCMPZS, ARM_INS_VCMP: vcmp${p}.f32 $sd, #0 */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_VCNTd, ARM_INS_VCNT: vcnt${p}.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCNTq, ARM_INS_VCNT: vcnt${p}.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTANSD, ARM_INS_VCVTA: vcvta.s32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTANSQ, ARM_INS_VCVTA: vcvta.s32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTANUD, ARM_INS_VCVTA: vcvta.u32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTANUQ, ARM_INS_VCVTA: vcvta.u32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTASD, ARM_INS_VCVTA: vcvta.s32.f64 $sd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTASS, ARM_INS_VCVTA: vcvta.s32.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTAUD, ARM_INS_VCVTA: vcvta.u32.f64 $sd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTAUS, ARM_INS_VCVTA: vcvta.u32.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTBDH, ARM_INS_VCVTB: vcvtb${p}.f16.f64 $sd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTBHD, ARM_INS_VCVTB: vcvtb${p}.f64.f16 $dd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTBHS, ARM_INS_VCVTB: vcvtb${p}.f32.f16 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTBSH, ARM_INS_VCVTB: vcvtb${p}.f16.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTDS, ARM_INS_VCVT: vcvt${p}.f64.f32 $dd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTMNSD, ARM_INS_VCVTM: vcvtm.s32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTMNSQ, ARM_INS_VCVTM: vcvtm.s32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTMNUD, ARM_INS_VCVTM: vcvtm.u32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTMNUQ, ARM_INS_VCVTM: vcvtm.u32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTMSD, ARM_INS_VCVTM: vcvtm.s32.f64 $sd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTMSS, ARM_INS_VCVTM: vcvtm.s32.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTMUD, ARM_INS_VCVTM: vcvtm.u32.f64 $sd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTMUS, ARM_INS_VCVTM: vcvtm.u32.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTNNSD, ARM_INS_VCVTN: vcvtn.s32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTNNSQ, ARM_INS_VCVTN: vcvtn.s32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTNNUD, ARM_INS_VCVTN: vcvtn.u32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTNNUQ, ARM_INS_VCVTN: vcvtn.u32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTNSD, ARM_INS_VCVTN: vcvtn.s32.f64 $sd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTNSS, ARM_INS_VCVTN: vcvtn.s32.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTNUD, ARM_INS_VCVTN: vcvtn.u32.f64 $sd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTNUS, ARM_INS_VCVTN: vcvtn.u32.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTPNSD, ARM_INS_VCVTP: vcvtp.s32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTPNSQ, ARM_INS_VCVTP: vcvtp.s32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTPNUD, ARM_INS_VCVTP: vcvtp.u32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTPNUQ, ARM_INS_VCVTP: vcvtp.u32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTPSD, ARM_INS_VCVTP: vcvtp.s32.f64 $sd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTPSS, ARM_INS_VCVTP: vcvtp.s32.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTPUD, ARM_INS_VCVTP: vcvtp.u32.f64 $sd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTPUS, ARM_INS_VCVTP: vcvtp.u32.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTSD, ARM_INS_VCVT: vcvt${p}.f32.f64 $sd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTTDH, ARM_INS_VCVTT: vcvtt${p}.f16.f64 $sd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTTHD, ARM_INS_VCVTT: vcvtt${p}.f64.f16 $dd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTTHS, ARM_INS_VCVTT: vcvtt${p}.f32.f16 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTTSH, ARM_INS_VCVTT: vcvtt${p}.f16.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTf2h, ARM_INS_VCVT: vcvt${p}.f16.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTf2sd, ARM_INS_VCVT: vcvt${p}.s32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTf2sq, ARM_INS_VCVT: vcvt${p}.s32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTf2ud, ARM_INS_VCVT: vcvt${p}.u32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTf2uq, ARM_INS_VCVT: vcvt${p}.u32.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTf2xsd, ARM_INS_VCVT: vcvt${p}.s32.f32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTf2xsq, ARM_INS_VCVT: vcvt${p}.s32.f32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTf2xud, ARM_INS_VCVT: vcvt${p}.u32.f32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTf2xuq, ARM_INS_VCVT: vcvt${p}.u32.f32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTh2f, ARM_INS_VCVT: vcvt${p}.f32.f16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTs2fd, ARM_INS_VCVT: vcvt${p}.f32.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTs2fq, ARM_INS_VCVT: vcvt${p}.f32.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTu2fd, ARM_INS_VCVT: vcvt${p}.f32.u32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTu2fq, ARM_INS_VCVT: vcvt${p}.f32.u32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTxs2fd, ARM_INS_VCVT: vcvt${p}.f32.s32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTxs2fq, ARM_INS_VCVT: vcvt${p}.f32.s32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTxu2fd, ARM_INS_VCVT: vcvt${p}.f32.u32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VCVTxu2fq, ARM_INS_VCVT: vcvt${p}.f32.u32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VDIVD, ARM_INS_VDIV: vdiv${p}.f64 $dd, $dn, $dm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VDIVS, ARM_INS_VDIV: vdiv${p}.f32 $sd, $sn, $sm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VDUP16d, ARM_INS_VDUP: vdup${p}.16 $v, $r */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VDUP16q, ARM_INS_VDUP: vdup${p}.16 $v, $r */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VDUP32d, ARM_INS_VDUP: vdup${p}.32 $v, $r */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VDUP32q, ARM_INS_VDUP: vdup${p}.32 $v, $r */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VDUP8d, ARM_INS_VDUP: vdup${p}.8 $v, $r */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VDUP8q, ARM_INS_VDUP: vdup${p}.8 $v, $r */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VDUPLN16d, ARM_INS_VDUP: vdup${p}.16 $vd, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VDUPLN16q, ARM_INS_VDUP: vdup${p}.16 $vd, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VDUPLN32d, ARM_INS_VDUP: vdup${p}.32 $vd, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VDUPLN32q, ARM_INS_VDUP: vdup${p}.32 $vd, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VDUPLN8d, ARM_INS_VDUP: vdup${p}.8 $vd, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VDUPLN8q, ARM_INS_VDUP: vdup${p}.8 $vd, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VEORd, ARM_INS_VEOR: veor${p} $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VEORq, ARM_INS_VEOR: veor${p} $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VEXTd16, ARM_INS_VEXT: vext${p}.16 $vd, $vn, $vm, $index */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VEXTd32, ARM_INS_VEXT: vext${p}.32 $vd, $vn, $vm, $index */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VEXTd8, ARM_INS_VEXT: vext${p}.8 $vd, $vn, $vm, $index */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VEXTq16, ARM_INS_VEXT: vext${p}.16 $vd, $vn, $vm, $index */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VEXTq32, ARM_INS_VEXT: vext${p}.32 $vd, $vn, $vm, $index */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VEXTq64, ARM_INS_VEXT: vext${p}.64 $vd, $vn, $vm, $index */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VEXTq8, ARM_INS_VEXT: vext${p}.8 $vd, $vn, $vm, $index */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VFMAD, ARM_INS_VFMA: vfma${p}.f64 $dd, $dn, $dm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VFMAS, ARM_INS_VFMA: vfma${p}.f32 $sd, $sn, $sm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VFMAfd, ARM_INS_VFMA: vfma${p}.f32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VFMAfq, ARM_INS_VFMA: vfma${p}.f32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VFMSD, ARM_INS_VFMS: vfms${p}.f64 $dd, $dn, $dm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VFMSS, ARM_INS_VFMS: vfms${p}.f32 $sd, $sn, $sm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VFMSfd, ARM_INS_VFMS: vfms${p}.f32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VFMSfq, ARM_INS_VFMS: vfms${p}.f32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VFNMAD, ARM_INS_VFNMA: vfnma${p}.f64 $dd, $dn, $dm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VFNMAS, ARM_INS_VFNMA: vfnma${p}.f32 $sd, $sn, $sm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VFNMSD, ARM_INS_VFNMS: vfnms${p}.f64 $dd, $dn, $dm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VFNMSS, ARM_INS_VFNMS: vfnms${p}.f32 $sd, $sn, $sm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VGETLNi32, ARM_INS_VMOV: vmov${p}.32 $r, $v$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VGETLNs16, ARM_INS_VMOV: vmov${p}.s16 $r, $v$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VGETLNs8, ARM_INS_VMOV: vmov${p}.s8 $r, $v$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VGETLNu16, ARM_INS_VMOV: vmov${p}.u16 $r, $v$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VGETLNu8, ARM_INS_VMOV: vmov${p}.u8 $r, $v$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VHADDsv16i8, ARM_INS_VHADD: vhadd${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHADDsv2i32, ARM_INS_VHADD: vhadd${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHADDsv4i16, ARM_INS_VHADD: vhadd${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHADDsv4i32, ARM_INS_VHADD: vhadd${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHADDsv8i16, ARM_INS_VHADD: vhadd${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHADDsv8i8, ARM_INS_VHADD: vhadd${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHADDuv16i8, ARM_INS_VHADD: vhadd${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHADDuv2i32, ARM_INS_VHADD: vhadd${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHADDuv4i16, ARM_INS_VHADD: vhadd${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHADDuv4i32, ARM_INS_VHADD: vhadd${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHADDuv8i16, ARM_INS_VHADD: vhadd${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHADDuv8i8, ARM_INS_VHADD: vhadd${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHSUBsv16i8, ARM_INS_VHSUB: vhsub${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHSUBsv2i32, ARM_INS_VHSUB: vhsub${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHSUBsv4i16, ARM_INS_VHSUB: vhsub${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHSUBsv4i32, ARM_INS_VHSUB: vhsub${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHSUBsv8i16, ARM_INS_VHSUB: vhsub${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHSUBsv8i8, ARM_INS_VHSUB: vhsub${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHSUBuv16i8, ARM_INS_VHSUB: vhsub${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHSUBuv2i32, ARM_INS_VHSUB: vhsub${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHSUBuv4i16, ARM_INS_VHSUB: vhsub${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHSUBuv4i32, ARM_INS_VHSUB: vhsub${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHSUBuv8i16, ARM_INS_VHSUB: vhsub${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VHSUBuv8i8, ARM_INS_VHSUB: vhsub${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPd16, ARM_INS_VLD1: vld1${p}.16 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPd16wb_fixed, ARM_INS_VLD1: vld1${p}.16 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPd16wb_register, ARM_INS_VLD1: vld1${p}.16 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPd32, ARM_INS_VLD1: vld1${p}.32 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPd32wb_fixed, ARM_INS_VLD1: vld1${p}.32 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPd32wb_register, ARM_INS_VLD1: vld1${p}.32 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPd8, ARM_INS_VLD1: vld1${p}.8 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPd8wb_fixed, ARM_INS_VLD1: vld1${p}.8 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPd8wb_register, ARM_INS_VLD1: vld1${p}.8 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPq16, ARM_INS_VLD1: vld1${p}.16 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPq16wb_fixed, ARM_INS_VLD1: vld1${p}.16 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPq16wb_register, ARM_INS_VLD1: vld1${p}.16 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPq32, ARM_INS_VLD1: vld1${p}.32 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPq32wb_fixed, ARM_INS_VLD1: vld1${p}.32 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPq32wb_register, ARM_INS_VLD1: vld1${p}.32 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPq8, ARM_INS_VLD1: vld1${p}.8 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPq8wb_fixed, ARM_INS_VLD1: vld1${p}.8 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1DUPq8wb_register, ARM_INS_VLD1: vld1${p}.8 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1LNd16, ARM_INS_VLD1: vld1${p}.16 \{$vd[$lane]\}, $rn */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1LNd16_UPD, ARM_INS_VLD1: vld1${p}.16 \{$vd[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD1LNd32, ARM_INS_VLD1: vld1${p}.32 \{$vd[$lane]\}, $rn */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD1LNd32_UPD, ARM_INS_VLD1: vld1${p}.32 \{$vd[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD1LNd8, ARM_INS_VLD1: vld1${p}.8 \{$vd[$lane]\}, $rn */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1LNd8_UPD, ARM_INS_VLD1: vld1${p}.8 \{$vd[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD1d16, ARM_INS_VLD1: vld1${p}.16 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d16Q, ARM_INS_VLD1: vld1${p}.16 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d16Qwb_fixed, ARM_INS_VLD1: vld1${p}.16 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d16Qwb_register, ARM_INS_VLD1: vld1${p}.16 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d16T, ARM_INS_VLD1: vld1${p}.16 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d16Twb_fixed, ARM_INS_VLD1: vld1${p}.16 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d16Twb_register, ARM_INS_VLD1: vld1${p}.16 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d16wb_fixed, ARM_INS_VLD1: vld1${p}.16 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d16wb_register, ARM_INS_VLD1: vld1${p}.16 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d32, ARM_INS_VLD1: vld1${p}.32 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d32Q, ARM_INS_VLD1: vld1${p}.32 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d32Qwb_fixed, ARM_INS_VLD1: vld1${p}.32 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d32Qwb_register, ARM_INS_VLD1: vld1${p}.32 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d32T, ARM_INS_VLD1: vld1${p}.32 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d32Twb_fixed, ARM_INS_VLD1: vld1${p}.32 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d32Twb_register, ARM_INS_VLD1: vld1${p}.32 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d32wb_fixed, ARM_INS_VLD1: vld1${p}.32 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d32wb_register, ARM_INS_VLD1: vld1${p}.32 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d64, ARM_INS_VLD1: vld1${p}.64 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d64Q, ARM_INS_VLD1: vld1${p}.64 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d64Qwb_fixed, ARM_INS_VLD1: vld1${p}.64 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d64Qwb_register, ARM_INS_VLD1: vld1${p}.64 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d64T, ARM_INS_VLD1: vld1${p}.64 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d64Twb_fixed, ARM_INS_VLD1: vld1${p}.64 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d64Twb_register, ARM_INS_VLD1: vld1${p}.64 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d64wb_fixed, ARM_INS_VLD1: vld1${p}.64 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d64wb_register, ARM_INS_VLD1: vld1${p}.64 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d8, ARM_INS_VLD1: vld1${p}.8 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d8Q, ARM_INS_VLD1: vld1${p}.8 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d8Qwb_fixed, ARM_INS_VLD1: vld1${p}.8 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d8Qwb_register, ARM_INS_VLD1: vld1${p}.8 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d8T, ARM_INS_VLD1: vld1${p}.8 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d8Twb_fixed, ARM_INS_VLD1: vld1${p}.8 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d8Twb_register, ARM_INS_VLD1: vld1${p}.8 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d8wb_fixed, ARM_INS_VLD1: vld1${p}.8 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1d8wb_register, ARM_INS_VLD1: vld1${p}.8 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1q16, ARM_INS_VLD1: vld1${p}.16 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1q16wb_fixed, ARM_INS_VLD1: vld1${p}.16 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1q16wb_register, ARM_INS_VLD1: vld1${p}.16 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1q32, ARM_INS_VLD1: vld1${p}.32 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1q32wb_fixed, ARM_INS_VLD1: vld1${p}.32 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1q32wb_register, ARM_INS_VLD1: vld1${p}.32 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1q64, ARM_INS_VLD1: vld1${p}.64 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1q64wb_fixed, ARM_INS_VLD1: vld1${p}.64 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1q64wb_register, ARM_INS_VLD1: vld1${p}.64 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1q8, ARM_INS_VLD1: vld1${p}.8 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1q8wb_fixed, ARM_INS_VLD1: vld1${p}.8 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD1q8wb_register, ARM_INS_VLD1: vld1${p}.8 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd16, ARM_INS_VLD2: vld2${p}.16 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd16wb_fixed, ARM_INS_VLD2: vld2${p}.16 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd16wb_register, ARM_INS_VLD2: vld2${p}.16 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd16x2, ARM_INS_VLD2: vld2${p}.16 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd16x2wb_fixed, ARM_INS_VLD2: vld2${p}.16 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd16x2wb_register, ARM_INS_VLD2: vld2${p}.16 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd32, ARM_INS_VLD2: vld2${p}.32 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd32wb_fixed, ARM_INS_VLD2: vld2${p}.32 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd32wb_register, ARM_INS_VLD2: vld2${p}.32 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd32x2, ARM_INS_VLD2: vld2${p}.32 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd32x2wb_fixed, ARM_INS_VLD2: vld2${p}.32 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd32x2wb_register, ARM_INS_VLD2: vld2${p}.32 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd8, ARM_INS_VLD2: vld2${p}.8 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd8wb_fixed, ARM_INS_VLD2: vld2${p}.8 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd8wb_register, ARM_INS_VLD2: vld2${p}.8 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd8x2, ARM_INS_VLD2: vld2${p}.8 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd8x2wb_fixed, ARM_INS_VLD2: vld2${p}.8 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2DUPd8x2wb_register, ARM_INS_VLD2: vld2${p}.8 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2LNd16, ARM_INS_VLD2: vld2${p}.16 \{$vd[$lane], $dst2[$lane]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2LNd16_UPD, ARM_INS_VLD2: vld2${p}.16 \{$vd[$lane], $dst2[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD2LNd32, ARM_INS_VLD2: vld2${p}.32 \{$vd[$lane], $dst2[$lane]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2LNd32_UPD, ARM_INS_VLD2: vld2${p}.32 \{$vd[$lane], $dst2[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD2LNd8, ARM_INS_VLD2: vld2${p}.8 \{$vd[$lane], $dst2[$lane]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2LNd8_UPD, ARM_INS_VLD2: vld2${p}.8 \{$vd[$lane], $dst2[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD2LNq16, ARM_INS_VLD2: vld2${p}.16 \{$vd[$lane], $dst2[$lane]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2LNq16_UPD, ARM_INS_VLD2: vld2${p}.16 \{$vd[$lane], $dst2[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD2LNq32, ARM_INS_VLD2: vld2${p}.32 \{$vd[$lane], $dst2[$lane]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2LNq32_UPD, ARM_INS_VLD2: vld2${p}.32 \{$vd[$lane], $dst2[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD2b16, ARM_INS_VLD2: vld2${p}.16 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2b16wb_fixed, ARM_INS_VLD2: vld2${p}.16 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2b16wb_register, ARM_INS_VLD2: vld2${p}.16 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2b32, ARM_INS_VLD2: vld2${p}.32 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2b32wb_fixed, ARM_INS_VLD2: vld2${p}.32 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2b32wb_register, ARM_INS_VLD2: vld2${p}.32 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2b8, ARM_INS_VLD2: vld2${p}.8 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2b8wb_fixed, ARM_INS_VLD2: vld2${p}.8 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2b8wb_register, ARM_INS_VLD2: vld2${p}.8 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2d16, ARM_INS_VLD2: vld2${p}.16 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2d16wb_fixed, ARM_INS_VLD2: vld2${p}.16 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2d16wb_register, ARM_INS_VLD2: vld2${p}.16 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2d32, ARM_INS_VLD2: vld2${p}.32 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2d32wb_fixed, ARM_INS_VLD2: vld2${p}.32 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2d32wb_register, ARM_INS_VLD2: vld2${p}.32 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2d8, ARM_INS_VLD2: vld2${p}.8 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2d8wb_fixed, ARM_INS_VLD2: vld2${p}.8 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2d8wb_register, ARM_INS_VLD2: vld2${p}.8 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2q16, ARM_INS_VLD2: vld2${p}.16 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2q16wb_fixed, ARM_INS_VLD2: vld2${p}.16 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2q16wb_register, ARM_INS_VLD2: vld2${p}.16 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2q32, ARM_INS_VLD2: vld2${p}.32 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2q32wb_fixed, ARM_INS_VLD2: vld2${p}.32 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2q32wb_register, ARM_INS_VLD2: vld2${p}.32 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2q8, ARM_INS_VLD2: vld2${p}.8 $vd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2q8wb_fixed, ARM_INS_VLD2: vld2${p}.8 $vd, $rn! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD2q8wb_register, ARM_INS_VLD2: vld2${p}.8 $vd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3DUPd16, ARM_INS_VLD3: vld3${p}.16 \{$vd[], $dst2[], $dst3[]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3DUPd16_UPD, ARM_INS_VLD3: vld3${p}.16 \{$vd[], $dst2[], $dst3[]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3DUPd32, ARM_INS_VLD3: vld3${p}.32 \{$vd[], $dst2[], $dst3[]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3DUPd32_UPD, ARM_INS_VLD3: vld3${p}.32 \{$vd[], $dst2[], $dst3[]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3DUPd8, ARM_INS_VLD3: vld3${p}.8 \{$vd[], $dst2[], $dst3[]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3DUPd8_UPD, ARM_INS_VLD3: vld3${p}.8 \{$vd[], $dst2[], $dst3[]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3DUPq16, ARM_INS_VLD3: vld3${p}.16 \{$vd[], $dst2[], $dst3[]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3DUPq16_UPD, ARM_INS_VLD3: vld3${p}.16 \{$vd[], $dst2[], $dst3[]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3DUPq32, ARM_INS_VLD3: vld3${p}.32 \{$vd[], $dst2[], $dst3[]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3DUPq32_UPD, ARM_INS_VLD3: vld3${p}.32 \{$vd[], $dst2[], $dst3[]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3DUPq8, ARM_INS_VLD3: vld3${p}.8 \{$vd[], $dst2[], $dst3[]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3DUPq8_UPD, ARM_INS_VLD3: vld3${p}.8 \{$vd[], $dst2[], $dst3[]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3LNd16, ARM_INS_VLD3: vld3${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3LNd16_UPD, ARM_INS_VLD3: vld3${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD3LNd32, ARM_INS_VLD3: vld3${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3LNd32_UPD, ARM_INS_VLD3: vld3${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD3LNd8, ARM_INS_VLD3: vld3${p}.8 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3LNd8_UPD, ARM_INS_VLD3: vld3${p}.8 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD3LNq16, ARM_INS_VLD3: vld3${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3LNq16_UPD, ARM_INS_VLD3: vld3${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD3LNq32, ARM_INS_VLD3: vld3${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3LNq32_UPD, ARM_INS_VLD3: vld3${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD3d16, ARM_INS_VLD3: vld3${p}.16 \{$vd, $dst2, $dst3\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3d16_UPD, ARM_INS_VLD3: vld3${p}.16 \{$vd, $dst2, $dst3\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD3d32, ARM_INS_VLD3: vld3${p}.32 \{$vd, $dst2, $dst3\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3d32_UPD, ARM_INS_VLD3: vld3${p}.32 \{$vd, $dst2, $dst3\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD3d8, ARM_INS_VLD3: vld3${p}.8 \{$vd, $dst2, $dst3\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3d8_UPD, ARM_INS_VLD3: vld3${p}.8 \{$vd, $dst2, $dst3\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD3q16, ARM_INS_VLD3: vld3${p}.16 \{$vd, $dst2, $dst3\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3q16_UPD, ARM_INS_VLD3: vld3${p}.16 \{$vd, $dst2, $dst3\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD3q32, ARM_INS_VLD3: vld3${p}.32 \{$vd, $dst2, $dst3\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3q32_UPD, ARM_INS_VLD3: vld3${p}.32 \{$vd, $dst2, $dst3\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD3q8, ARM_INS_VLD3: vld3${p}.8 \{$vd, $dst2, $dst3\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD3q8_UPD, ARM_INS_VLD3: vld3${p}.8 \{$vd, $dst2, $dst3\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD4DUPd16, ARM_INS_VLD4: vld4${p}.16 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4DUPd16_UPD, ARM_INS_VLD4: vld4${p}.16 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4DUPd32, ARM_INS_VLD4: vld4${p}.32 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4DUPd32_UPD, ARM_INS_VLD4: vld4${p}.32 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4DUPd8, ARM_INS_VLD4: vld4${p}.8 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4DUPd8_UPD, ARM_INS_VLD4: vld4${p}.8 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4DUPq16, ARM_INS_VLD4: vld4${p}.16 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4DUPq16_UPD, ARM_INS_VLD4: vld4${p}.16 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4DUPq32, ARM_INS_VLD4: vld4${p}.32 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4DUPq32_UPD, ARM_INS_VLD4: vld4${p}.32 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4DUPq8, ARM_INS_VLD4: vld4${p}.8 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4DUPq8_UPD, ARM_INS_VLD4: vld4${p}.8 \{$vd[], $dst2[], $dst3[], $dst4[]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4LNd16, ARM_INS_VLD4: vld4${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4LNd16_UPD, ARM_INS_VLD4: vld4${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD4LNd32, ARM_INS_VLD4: vld4${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4LNd32_UPD, ARM_INS_VLD4: vld4${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD4LNd8, ARM_INS_VLD4: vld4${p}.8 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4LNd8_UPD, ARM_INS_VLD4: vld4${p}.8 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD4LNq16, ARM_INS_VLD4: vld4${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4LNq16_UPD, ARM_INS_VLD4: vld4${p}.16 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD4LNq32, ARM_INS_VLD4: vld4${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4LNq32_UPD, ARM_INS_VLD4: vld4${p}.32 \{$vd[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD4d16, ARM_INS_VLD4: vld4${p}.16 \{$vd, $dst2, $dst3, $dst4\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4d16_UPD, ARM_INS_VLD4: vld4${p}.16 \{$vd, $dst2, $dst3, $dst4\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD4d32, ARM_INS_VLD4: vld4${p}.32 \{$vd, $dst2, $dst3, $dst4\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4d32_UPD, ARM_INS_VLD4: vld4${p}.32 \{$vd, $dst2, $dst3, $dst4\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD4d8, ARM_INS_VLD4: vld4${p}.8 \{$vd, $dst2, $dst3, $dst4\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4d8_UPD, ARM_INS_VLD4: vld4${p}.8 \{$vd, $dst2, $dst3, $dst4\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD4q16, ARM_INS_VLD4: vld4${p}.16 \{$vd, $dst2, $dst3, $dst4\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4q16_UPD, ARM_INS_VLD4: vld4${p}.16 \{$vd, $dst2, $dst3, $dst4\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD4q32, ARM_INS_VLD4: vld4${p}.32 \{$vd, $dst2, $dst3, $dst4\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4q32_UPD, ARM_INS_VLD4: vld4${p}.32 \{$vd, $dst2, $dst3, $dst4\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLD4q8, ARM_INS_VLD4: vld4${p}.8 \{$vd, $dst2, $dst3, $dst4\}, $rn */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VLD4q8_UPD, ARM_INS_VLD4: vld4${p}.8 \{$vd, $dst2, $dst3, $dst4\}, $rn$rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLDMDDB_UPD, ARM_INS_VLDMDB: vldmdb${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLDMDIA, ARM_INS_VLDMIA: vldmia${p} $rn, $regs */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_VLDMDIA_UPD, ARM_INS_VLDMIA: vldmia${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLDMSDB_UPD, ARM_INS_VLDMDB: vldmdb${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLDMSIA, ARM_INS_VLDMIA: vldmia${p} $rn, $regs */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_VLDMSIA_UPD, ARM_INS_VLDMIA: vldmia${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLDRD, ARM_INS_VLDR: vldr${p} $dd, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VLDRS, ARM_INS_VLDR: vldr${p} $sd, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMAXNMD, ARM_INS_VMAXNM: vmaxnm.f64 $dd, $dn, $dm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXNMND, ARM_INS_VMAXNM: vmaxnm.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXNMNQ, ARM_INS_VMAXNM: vmaxnm.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXNMS, ARM_INS_VMAXNM: vmaxnm.f32 $sd, $sn, $sm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXfd, ARM_INS_VMAX: vmax${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXfq, ARM_INS_VMAX: vmax${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXsv16i8, ARM_INS_VMAX: vmax${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXsv2i32, ARM_INS_VMAX: vmax${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXsv4i16, ARM_INS_VMAX: vmax${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXsv4i32, ARM_INS_VMAX: vmax${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXsv8i16, ARM_INS_VMAX: vmax${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXsv8i8, ARM_INS_VMAX: vmax${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXuv16i8, ARM_INS_VMAX: vmax${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXuv2i32, ARM_INS_VMAX: vmax${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXuv4i16, ARM_INS_VMAX: vmax${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXuv4i32, ARM_INS_VMAX: vmax${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXuv8i16, ARM_INS_VMAX: vmax${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMAXuv8i8, ARM_INS_VMAX: vmax${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINNMD, ARM_INS_VMINNM: vminnm.f64 $dd, $dn, $dm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINNMND, ARM_INS_VMINNM: vminnm.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINNMNQ, ARM_INS_VMINNM: vminnm.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINNMS, ARM_INS_VMINNM: vminnm.f32 $sd, $sn, $sm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINfd, ARM_INS_VMIN: vmin${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINfq, ARM_INS_VMIN: vmin${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINsv16i8, ARM_INS_VMIN: vmin${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINsv2i32, ARM_INS_VMIN: vmin${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINsv4i16, ARM_INS_VMIN: vmin${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINsv4i32, ARM_INS_VMIN: vmin${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINsv8i16, ARM_INS_VMIN: vmin${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINsv8i8, ARM_INS_VMIN: vmin${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINuv16i8, ARM_INS_VMIN: vmin${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINuv2i32, ARM_INS_VMIN: vmin${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINuv4i16, ARM_INS_VMIN: vmin${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINuv4i32, ARM_INS_VMIN: vmin${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINuv8i16, ARM_INS_VMIN: vmin${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMINuv8i8, ARM_INS_VMIN: vmin${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAD, ARM_INS_VMLA: vmla${p}.f64 $dd, $dn, $dm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLALslsv2i32, ARM_INS_VMLAL: vmlal${p}.s32 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLALslsv4i16, ARM_INS_VMLAL: vmlal${p}.s16 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLALsluv2i32, ARM_INS_VMLAL: vmlal${p}.u32 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLALsluv4i16, ARM_INS_VMLAL: vmlal${p}.u16 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLALsv2i64, ARM_INS_VMLAL: vmlal${p}.s32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLALsv4i32, ARM_INS_VMLAL: vmlal${p}.s16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLALsv8i16, ARM_INS_VMLAL: vmlal${p}.s8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLALuv2i64, ARM_INS_VMLAL: vmlal${p}.u32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLALuv4i32, ARM_INS_VMLAL: vmlal${p}.u16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLALuv8i16, ARM_INS_VMLAL: vmlal${p}.u8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAS, ARM_INS_VMLA: vmla${p}.f32 $sd, $sn, $sm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAfd, ARM_INS_VMLA: vmla${p}.f32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAfq, ARM_INS_VMLA: vmla${p}.f32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAslfd, ARM_INS_VMLA: vmla${p}.f32 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAslfq, ARM_INS_VMLA: vmla${p}.f32 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAslv2i32, ARM_INS_VMLA: vmla${p}.i32 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAslv4i16, ARM_INS_VMLA: vmla${p}.i16 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAslv4i32, ARM_INS_VMLA: vmla${p}.i32 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAslv8i16, ARM_INS_VMLA: vmla${p}.i16 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAv16i8, ARM_INS_VMLA: vmla${p}.i8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAv2i32, ARM_INS_VMLA: vmla${p}.i32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAv4i16, ARM_INS_VMLA: vmla${p}.i16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAv4i32, ARM_INS_VMLA: vmla${p}.i32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAv8i16, ARM_INS_VMLA: vmla${p}.i16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLAv8i8, ARM_INS_VMLA: vmla${p}.i8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSD, ARM_INS_VMLS: vmls${p}.f64 $dd, $dn, $dm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSLslsv2i32, ARM_INS_VMLSL: vmlsl${p}.s32 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSLslsv4i16, ARM_INS_VMLSL: vmlsl${p}.s16 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSLsluv2i32, ARM_INS_VMLSL: vmlsl${p}.u32 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSLsluv4i16, ARM_INS_VMLSL: vmlsl${p}.u16 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSLsv2i64, ARM_INS_VMLSL: vmlsl${p}.s32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSLsv4i32, ARM_INS_VMLSL: vmlsl${p}.s16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSLsv8i16, ARM_INS_VMLSL: vmlsl${p}.s8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSLuv2i64, ARM_INS_VMLSL: vmlsl${p}.u32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSLuv4i32, ARM_INS_VMLSL: vmlsl${p}.u16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSLuv8i16, ARM_INS_VMLSL: vmlsl${p}.u8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSS, ARM_INS_VMLS: vmls${p}.f32 $sd, $sn, $sm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSfd, ARM_INS_VMLS: vmls${p}.f32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSfq, ARM_INS_VMLS: vmls${p}.f32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSslfd, ARM_INS_VMLS: vmls${p}.f32 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSslfq, ARM_INS_VMLS: vmls${p}.f32 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSslv2i32, ARM_INS_VMLS: vmls${p}.i32 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSslv4i16, ARM_INS_VMLS: vmls${p}.i16 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSslv4i32, ARM_INS_VMLS: vmls${p}.i32 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSslv8i16, ARM_INS_VMLS: vmls${p}.i16 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSv16i8, ARM_INS_VMLS: vmls${p}.i8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSv2i32, ARM_INS_VMLS: vmls${p}.i32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSv4i16, ARM_INS_VMLS: vmls${p}.i16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSv4i32, ARM_INS_VMLS: vmls${p}.i32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSv8i16, ARM_INS_VMLS: vmls${p}.i16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMLSv8i8, ARM_INS_VMLS: vmls${p}.i8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVD, ARM_INS_VMOV: vmov${p}.f64 $dd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVDRR, ARM_INS_VMOV: vmov${p} $dm, $rt, $rt2 */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVLsv2i64, ARM_INS_VMOVL: vmovl${p}.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVLsv4i32, ARM_INS_VMOVL: vmovl${p}.s16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVLsv8i16, ARM_INS_VMOVL: vmovl${p}.s8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVLuv2i64, ARM_INS_VMOVL: vmovl${p}.u32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVLuv4i32, ARM_INS_VMOVL: vmovl${p}.u16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVLuv8i16, ARM_INS_VMOVL: vmovl${p}.u8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVNv2i32, ARM_INS_VMOVN: vmovn${p}.i64 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVNv4i16, ARM_INS_VMOVN: vmovn${p}.i32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVNv8i8, ARM_INS_VMOVN: vmovn${p}.i16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVRRD, ARM_INS_VMOV: vmov${p} $rt, $rt2, $dm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVRRS, ARM_INS_VMOV: vmov${p} $rt, $rt2, $src1, $src2 */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVRS, ARM_INS_VMOV: vmov${p} $rt, $sn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVS, ARM_INS_VMOV: vmov${p}.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVSR, ARM_INS_VMOV: vmov${p} $sn, $rt */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVSRR, ARM_INS_VMOV: vmov${p} $dst1, $dst2, $src1, $src2 */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMOVv16i8, ARM_INS_VMOV: vmov${p}.i8 $vd, $simm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMOVv1i64, ARM_INS_VMOV: vmov${p}.i64 $vd, $simm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMOVv2f32, ARM_INS_VMOV: vmov${p}.f32 $vd, $simm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMOVv2i32, ARM_INS_VMOV: vmov${p}.i32 $vd, $simm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMOVv2i64, ARM_INS_VMOV: vmov${p}.i64 $vd, $simm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMOVv4f32, ARM_INS_VMOV: vmov${p}.f32 $vd, $simm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMOVv4i16, ARM_INS_VMOV: vmov${p}.i16 $vd, $simm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMOVv4i32, ARM_INS_VMOV: vmov${p}.i32 $vd, $simm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMOVv8i16, ARM_INS_VMOV: vmov${p}.i16 $vd, $simm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMOVv8i8, ARM_INS_VMOV: vmov${p}.i8 $vd, $simm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMRS, ARM_INS_VMRS: vmrs${p} $rt, fpscr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMRS_FPEXC, ARM_INS_VMRS: vmrs${p} $rt, fpexc */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMRS_FPINST, ARM_INS_VMRS: vmrs${p} $rt, fpinst */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMRS_FPINST2, ARM_INS_VMRS: vmrs${p} $rt, fpinst2 */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMRS_FPSID, ARM_INS_VMRS: vmrs${p} $rt, fpsid */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMRS_MVFR0, ARM_INS_VMRS: vmrs${p} $rt, mvfr0 */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMRS_MVFR1, ARM_INS_VMRS: vmrs${p} $rt, mvfr1 */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMRS_MVFR2, ARM_INS_VMRS: vmrs${p} $rt, mvfr2 */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMSR, ARM_INS_VMSR: vmsr${p} fpscr, $src */
+ { CS_AC_IGNORE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMSR_FPEXC, ARM_INS_VMSR: vmsr${p} fpexc, $src */
+ { CS_AC_IGNORE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMSR_FPINST, ARM_INS_VMSR: vmsr${p} fpinst, $src */
+ { CS_AC_IGNORE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMSR_FPINST2, ARM_INS_VMSR: vmsr${p} fpinst2, $src */
+ { CS_AC_IGNORE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMSR_FPSID, ARM_INS_VMSR: vmsr${p} fpsid, $src */
+ { CS_AC_IGNORE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULD, ARM_INS_VMUL: vmul${p}.f64 $dd, $dn, $dm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULLp64, ARM_INS_VMULL: vmull.p64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULLp8, ARM_INS_VMULL: vmull${p}.p8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULLslsv2i32, ARM_INS_VMULL: vmull${p}.s32 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULLslsv4i16, ARM_INS_VMULL: vmull${p}.s16 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULLsluv2i32, ARM_INS_VMULL: vmull${p}.u32 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULLsluv4i16, ARM_INS_VMULL: vmull${p}.u16 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULLsv2i64, ARM_INS_VMULL: vmull${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULLsv4i32, ARM_INS_VMULL: vmull${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULLsv8i16, ARM_INS_VMULL: vmull${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULLuv2i64, ARM_INS_VMULL: vmull${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULLuv4i32, ARM_INS_VMULL: vmull${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULLuv8i16, ARM_INS_VMULL: vmull${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULS, ARM_INS_VMUL: vmul${p}.f32 $sd, $sn, $sm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULfd, ARM_INS_VMUL: vmul${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULfq, ARM_INS_VMUL: vmul${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULpd, ARM_INS_VMUL: vmul${p}.p8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULpq, ARM_INS_VMUL: vmul${p}.p8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULslfd, ARM_INS_VMUL: vmul${p}.f32 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULslfq, ARM_INS_VMUL: vmul${p}.f32 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULslv2i32, ARM_INS_VMUL: vmul${p}.i32 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULslv4i16, ARM_INS_VMUL: vmul${p}.i16 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULslv4i32, ARM_INS_VMUL: vmul${p}.i32 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULslv8i16, ARM_INS_VMUL: vmul${p}.i16 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULv16i8, ARM_INS_VMUL: vmul${p}.i8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULv2i32, ARM_INS_VMUL: vmul${p}.i32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULv4i16, ARM_INS_VMUL: vmul${p}.i16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULv4i32, ARM_INS_VMUL: vmul${p}.i32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULv8i16, ARM_INS_VMUL: vmul${p}.i16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMULv8i8, ARM_INS_VMUL: vmul${p}.i8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VMVNd, ARM_INS_VMVN: vmvn${p} $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMVNq, ARM_INS_VMVN: vmvn${p} $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VMVNv2i32, ARM_INS_VMVN: vmvn${p}.i32 $vd, $simm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMVNv4i16, ARM_INS_VMVN: vmvn${p}.i16 $vd, $simm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMVNv4i32, ARM_INS_VMVN: vmvn${p}.i32 $vd, $simm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VMVNv8i16, ARM_INS_VMVN: vmvn${p}.i16 $vd, $simm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_VNEGD, ARM_INS_VNEG: vneg${p}.f64 $dd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VNEGS, ARM_INS_VNEG: vneg${p}.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VNEGf32q, ARM_INS_VNEG: vneg${p}.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VNEGfd, ARM_INS_VNEG: vneg${p}.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VNEGs16d, ARM_INS_VNEG: vneg${p}.s16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VNEGs16q, ARM_INS_VNEG: vneg${p}.s16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VNEGs32d, ARM_INS_VNEG: vneg${p}.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VNEGs32q, ARM_INS_VNEG: vneg${p}.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VNEGs8d, ARM_INS_VNEG: vneg${p}.s8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VNEGs8q, ARM_INS_VNEG: vneg${p}.s8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VNMLAD, ARM_INS_VNMLA: vnmla${p}.f64 $dd, $dn, $dm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VNMLAS, ARM_INS_VNMLA: vnmla${p}.f32 $sd, $sn, $sm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VNMLSD, ARM_INS_VNMLS: vnmls${p}.f64 $dd, $dn, $dm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VNMLSS, ARM_INS_VNMLS: vnmls${p}.f32 $sd, $sn, $sm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VNMULD, ARM_INS_VNMUL: vnmul${p}.f64 $dd, $dn, $dm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VNMULS, ARM_INS_VNMUL: vnmul${p}.f32 $sd, $sn, $sm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VORNd, ARM_INS_VORN: vorn${p} $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VORNq, ARM_INS_VORN: vorn${p} $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VORRd, ARM_INS_VORR: vorr${p} $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VORRiv2i32, ARM_INS_VORR: vorr${p}.i32 $vd, $simm */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VORRiv4i16, ARM_INS_VORR: vorr${p}.i16 $vd, $simm */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VORRiv4i32, ARM_INS_VORR: vorr${p}.i32 $vd, $simm */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VORRiv8i16, ARM_INS_VORR: vorr${p}.i16 $vd, $simm */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VORRq, ARM_INS_VORR: vorr${p} $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADALsv16i8, ARM_INS_VPADAL: vpadal${p}.s8 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADALsv2i32, ARM_INS_VPADAL: vpadal${p}.s32 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADALsv4i16, ARM_INS_VPADAL: vpadal${p}.s16 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADALsv4i32, ARM_INS_VPADAL: vpadal${p}.s32 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADALsv8i16, ARM_INS_VPADAL: vpadal${p}.s16 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADALsv8i8, ARM_INS_VPADAL: vpadal${p}.s8 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADALuv16i8, ARM_INS_VPADAL: vpadal${p}.u8 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADALuv2i32, ARM_INS_VPADAL: vpadal${p}.u32 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADALuv4i16, ARM_INS_VPADAL: vpadal${p}.u16 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADALuv4i32, ARM_INS_VPADAL: vpadal${p}.u32 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADALuv8i16, ARM_INS_VPADAL: vpadal${p}.u16 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADALuv8i8, ARM_INS_VPADAL: vpadal${p}.u8 $vd, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDLsv16i8, ARM_INS_VPADDL: vpaddl${p}.s8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDLsv2i32, ARM_INS_VPADDL: vpaddl${p}.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDLsv4i16, ARM_INS_VPADDL: vpaddl${p}.s16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDLsv4i32, ARM_INS_VPADDL: vpaddl${p}.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDLsv8i16, ARM_INS_VPADDL: vpaddl${p}.s16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDLsv8i8, ARM_INS_VPADDL: vpaddl${p}.s8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDLuv16i8, ARM_INS_VPADDL: vpaddl${p}.u8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDLuv2i32, ARM_INS_VPADDL: vpaddl${p}.u32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDLuv4i16, ARM_INS_VPADDL: vpaddl${p}.u16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDLuv4i32, ARM_INS_VPADDL: vpaddl${p}.u32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDLuv8i16, ARM_INS_VPADDL: vpaddl${p}.u16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDLuv8i8, ARM_INS_VPADDL: vpaddl${p}.u8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDf, ARM_INS_VPADD: vpadd${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDi16, ARM_INS_VPADD: vpadd${p}.i16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDi32, ARM_INS_VPADD: vpadd${p}.i32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPADDi8, ARM_INS_VPADD: vpadd${p}.i8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPMAXf, ARM_INS_VPMAX: vpmax${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPMAXs16, ARM_INS_VPMAX: vpmax${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPMAXs32, ARM_INS_VPMAX: vpmax${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPMAXs8, ARM_INS_VPMAX: vpmax${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPMAXu16, ARM_INS_VPMAX: vpmax${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPMAXu32, ARM_INS_VPMAX: vpmax${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPMAXu8, ARM_INS_VPMAX: vpmax${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPMINf, ARM_INS_VPMIN: vpmin${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPMINs16, ARM_INS_VPMIN: vpmin${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPMINs32, ARM_INS_VPMIN: vpmin${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPMINs8, ARM_INS_VPMIN: vpmin${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPMINu16, ARM_INS_VPMIN: vpmin${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPMINu32, ARM_INS_VPMIN: vpmin${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VPMINu8, ARM_INS_VPMIN: vpmin${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQABSv16i8, ARM_INS_VQABS: vqabs${p}.s8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQABSv2i32, ARM_INS_VQABS: vqabs${p}.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQABSv4i16, ARM_INS_VQABS: vqabs${p}.s16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQABSv4i32, ARM_INS_VQABS: vqabs${p}.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQABSv8i16, ARM_INS_VQABS: vqabs${p}.s16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQABSv8i8, ARM_INS_VQABS: vqabs${p}.s8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDsv16i8, ARM_INS_VQADD: vqadd${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDsv1i64, ARM_INS_VQADD: vqadd${p}.s64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDsv2i32, ARM_INS_VQADD: vqadd${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDsv2i64, ARM_INS_VQADD: vqadd${p}.s64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDsv4i16, ARM_INS_VQADD: vqadd${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDsv4i32, ARM_INS_VQADD: vqadd${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDsv8i16, ARM_INS_VQADD: vqadd${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDsv8i8, ARM_INS_VQADD: vqadd${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDuv16i8, ARM_INS_VQADD: vqadd${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDuv1i64, ARM_INS_VQADD: vqadd${p}.u64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDuv2i32, ARM_INS_VQADD: vqadd${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDuv2i64, ARM_INS_VQADD: vqadd${p}.u64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDuv4i16, ARM_INS_VQADD: vqadd${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDuv4i32, ARM_INS_VQADD: vqadd${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDuv8i16, ARM_INS_VQADD: vqadd${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQADDuv8i8, ARM_INS_VQADD: vqadd${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMLALslv2i32, ARM_INS_VQDMLAL: vqdmlal${p}.s32 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMLALslv4i16, ARM_INS_VQDMLAL: vqdmlal${p}.s16 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMLALv2i64, ARM_INS_VQDMLAL: vqdmlal${p}.s32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMLALv4i32, ARM_INS_VQDMLAL: vqdmlal${p}.s16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMLSLslv2i32, ARM_INS_VQDMLSL: vqdmlsl${p}.s32 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMLSLslv4i16, ARM_INS_VQDMLSL: vqdmlsl${p}.s16 $vd, $vn, $vm$lane */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMLSLv2i64, ARM_INS_VQDMLSL: vqdmlsl${p}.s32 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMLSLv4i32, ARM_INS_VQDMLSL: vqdmlsl${p}.s16 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMULHslv2i32, ARM_INS_VQDMULH: vqdmulh${p}.s32 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMULHslv4i16, ARM_INS_VQDMULH: vqdmulh${p}.s16 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMULHslv4i32, ARM_INS_VQDMULH: vqdmulh${p}.s32 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMULHslv8i16, ARM_INS_VQDMULH: vqdmulh${p}.s16 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMULHv2i32, ARM_INS_VQDMULH: vqdmulh${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMULHv4i16, ARM_INS_VQDMULH: vqdmulh${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMULHv4i32, ARM_INS_VQDMULH: vqdmulh${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMULHv8i16, ARM_INS_VQDMULH: vqdmulh${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMULLslv2i32, ARM_INS_VQDMULL: vqdmull${p}.s32 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMULLslv4i16, ARM_INS_VQDMULL: vqdmull${p}.s16 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMULLv2i64, ARM_INS_VQDMULL: vqdmull${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQDMULLv4i32, ARM_INS_VQDMULL: vqdmull${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQMOVNsuv2i32, ARM_INS_VQMOVUN: vqmovun${p}.s64 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQMOVNsuv4i16, ARM_INS_VQMOVUN: vqmovun${p}.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQMOVNsuv8i8, ARM_INS_VQMOVUN: vqmovun${p}.s16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQMOVNsv2i32, ARM_INS_VQMOVN: vqmovn${p}.s64 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQMOVNsv4i16, ARM_INS_VQMOVN: vqmovn${p}.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQMOVNsv8i8, ARM_INS_VQMOVN: vqmovn${p}.s16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQMOVNuv2i32, ARM_INS_VQMOVN: vqmovn${p}.u64 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQMOVNuv4i16, ARM_INS_VQMOVN: vqmovn${p}.u32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQMOVNuv8i8, ARM_INS_VQMOVN: vqmovn${p}.u16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQNEGv16i8, ARM_INS_VQNEG: vqneg${p}.s8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQNEGv2i32, ARM_INS_VQNEG: vqneg${p}.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQNEGv4i16, ARM_INS_VQNEG: vqneg${p}.s16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQNEGv4i32, ARM_INS_VQNEG: vqneg${p}.s32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQNEGv8i16, ARM_INS_VQNEG: vqneg${p}.s16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQNEGv8i8, ARM_INS_VQNEG: vqneg${p}.s8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRDMULHslv2i32, ARM_INS_VQRDMULH: vqrdmulh${p}.s32 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRDMULHslv4i16, ARM_INS_VQRDMULH: vqrdmulh${p}.s16 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRDMULHslv4i32, ARM_INS_VQRDMULH: vqrdmulh${p}.s32 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRDMULHslv8i16, ARM_INS_VQRDMULH: vqrdmulh${p}.s16 $vd, $vn, $vm$lane */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRDMULHv2i32, ARM_INS_VQRDMULH: vqrdmulh${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRDMULHv4i16, ARM_INS_VQRDMULH: vqrdmulh${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRDMULHv4i32, ARM_INS_VQRDMULH: vqrdmulh${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRDMULHv8i16, ARM_INS_VQRDMULH: vqrdmulh${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLsv16i8, ARM_INS_VQRSHL: vqrshl${p}.s8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLsv1i64, ARM_INS_VQRSHL: vqrshl${p}.s64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLsv2i32, ARM_INS_VQRSHL: vqrshl${p}.s32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLsv2i64, ARM_INS_VQRSHL: vqrshl${p}.s64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLsv4i16, ARM_INS_VQRSHL: vqrshl${p}.s16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLsv4i32, ARM_INS_VQRSHL: vqrshl${p}.s32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLsv8i16, ARM_INS_VQRSHL: vqrshl${p}.s16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLsv8i8, ARM_INS_VQRSHL: vqrshl${p}.s8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLuv16i8, ARM_INS_VQRSHL: vqrshl${p}.u8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLuv1i64, ARM_INS_VQRSHL: vqrshl${p}.u64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLuv2i32, ARM_INS_VQRSHL: vqrshl${p}.u32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLuv2i64, ARM_INS_VQRSHL: vqrshl${p}.u64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLuv4i16, ARM_INS_VQRSHL: vqrshl${p}.u16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLuv4i32, ARM_INS_VQRSHL: vqrshl${p}.u32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLuv8i16, ARM_INS_VQRSHL: vqrshl${p}.u16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHLuv8i8, ARM_INS_VQRSHL: vqrshl${p}.u8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHRNsv2i32, ARM_INS_VQRSHRN: vqrshrn${p}.s64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHRNsv4i16, ARM_INS_VQRSHRN: vqrshrn${p}.s32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHRNsv8i8, ARM_INS_VQRSHRN: vqrshrn${p}.s16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHRNuv2i32, ARM_INS_VQRSHRN: vqrshrn${p}.u64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHRNuv4i16, ARM_INS_VQRSHRN: vqrshrn${p}.u32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHRNuv8i8, ARM_INS_VQRSHRN: vqrshrn${p}.u16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHRUNv2i32, ARM_INS_VQRSHRUN: vqrshrun${p}.s64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHRUNv4i16, ARM_INS_VQRSHRUN: vqrshrun${p}.s32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQRSHRUNv8i8, ARM_INS_VQRSHRUN: vqrshrun${p}.s16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsiv16i8, ARM_INS_VQSHL: vqshl${p}.s8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsiv1i64, ARM_INS_VQSHL: vqshl${p}.s64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsiv2i32, ARM_INS_VQSHL: vqshl${p}.s32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsiv2i64, ARM_INS_VQSHL: vqshl${p}.s64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsiv4i16, ARM_INS_VQSHL: vqshl${p}.s16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsiv4i32, ARM_INS_VQSHL: vqshl${p}.s32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsiv8i16, ARM_INS_VQSHL: vqshl${p}.s16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsiv8i8, ARM_INS_VQSHL: vqshl${p}.s8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsuv16i8, ARM_INS_VQSHLU: vqshlu${p}.s8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsuv1i64, ARM_INS_VQSHLU: vqshlu${p}.s64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsuv2i32, ARM_INS_VQSHLU: vqshlu${p}.s32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsuv2i64, ARM_INS_VQSHLU: vqshlu${p}.s64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsuv4i16, ARM_INS_VQSHLU: vqshlu${p}.s16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsuv4i32, ARM_INS_VQSHLU: vqshlu${p}.s32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsuv8i16, ARM_INS_VQSHLU: vqshlu${p}.s16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsuv8i8, ARM_INS_VQSHLU: vqshlu${p}.s8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsv16i8, ARM_INS_VQSHL: vqshl${p}.s8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsv1i64, ARM_INS_VQSHL: vqshl${p}.s64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsv2i32, ARM_INS_VQSHL: vqshl${p}.s32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsv2i64, ARM_INS_VQSHL: vqshl${p}.s64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsv4i16, ARM_INS_VQSHL: vqshl${p}.s16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsv4i32, ARM_INS_VQSHL: vqshl${p}.s32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsv8i16, ARM_INS_VQSHL: vqshl${p}.s16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLsv8i8, ARM_INS_VQSHL: vqshl${p}.s8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuiv16i8, ARM_INS_VQSHL: vqshl${p}.u8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuiv1i64, ARM_INS_VQSHL: vqshl${p}.u64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuiv2i32, ARM_INS_VQSHL: vqshl${p}.u32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuiv2i64, ARM_INS_VQSHL: vqshl${p}.u64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuiv4i16, ARM_INS_VQSHL: vqshl${p}.u16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuiv4i32, ARM_INS_VQSHL: vqshl${p}.u32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuiv8i16, ARM_INS_VQSHL: vqshl${p}.u16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuiv8i8, ARM_INS_VQSHL: vqshl${p}.u8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuv16i8, ARM_INS_VQSHL: vqshl${p}.u8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuv1i64, ARM_INS_VQSHL: vqshl${p}.u64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuv2i32, ARM_INS_VQSHL: vqshl${p}.u32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuv2i64, ARM_INS_VQSHL: vqshl${p}.u64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuv4i16, ARM_INS_VQSHL: vqshl${p}.u16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuv4i32, ARM_INS_VQSHL: vqshl${p}.u32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuv8i16, ARM_INS_VQSHL: vqshl${p}.u16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHLuv8i8, ARM_INS_VQSHL: vqshl${p}.u8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHRNsv2i32, ARM_INS_VQSHRN: vqshrn${p}.s64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHRNsv4i16, ARM_INS_VQSHRN: vqshrn${p}.s32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHRNsv8i8, ARM_INS_VQSHRN: vqshrn${p}.s16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHRNuv2i32, ARM_INS_VQSHRN: vqshrn${p}.u64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHRNuv4i16, ARM_INS_VQSHRN: vqshrn${p}.u32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHRNuv8i8, ARM_INS_VQSHRN: vqshrn${p}.u16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHRUNv2i32, ARM_INS_VQSHRUN: vqshrun${p}.s64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHRUNv4i16, ARM_INS_VQSHRUN: vqshrun${p}.s32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSHRUNv8i8, ARM_INS_VQSHRUN: vqshrun${p}.s16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBsv16i8, ARM_INS_VQSUB: vqsub${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBsv1i64, ARM_INS_VQSUB: vqsub${p}.s64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBsv2i32, ARM_INS_VQSUB: vqsub${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBsv2i64, ARM_INS_VQSUB: vqsub${p}.s64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBsv4i16, ARM_INS_VQSUB: vqsub${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBsv4i32, ARM_INS_VQSUB: vqsub${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBsv8i16, ARM_INS_VQSUB: vqsub${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBsv8i8, ARM_INS_VQSUB: vqsub${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBuv16i8, ARM_INS_VQSUB: vqsub${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBuv1i64, ARM_INS_VQSUB: vqsub${p}.u64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBuv2i32, ARM_INS_VQSUB: vqsub${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBuv2i64, ARM_INS_VQSUB: vqsub${p}.u64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBuv4i16, ARM_INS_VQSUB: vqsub${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBuv4i32, ARM_INS_VQSUB: vqsub${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBuv8i16, ARM_INS_VQSUB: vqsub${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VQSUBuv8i8, ARM_INS_VQSUB: vqsub${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRADDHNv2i32, ARM_INS_VRADDHN: vraddhn${p}.i64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRADDHNv4i16, ARM_INS_VRADDHN: vraddhn${p}.i32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRADDHNv8i8, ARM_INS_VRADDHN: vraddhn${p}.i16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRECPEd, ARM_INS_VRECPE: vrecpe${p}.u32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRECPEfd, ARM_INS_VRECPE: vrecpe${p}.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRECPEfq, ARM_INS_VRECPE: vrecpe${p}.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRECPEq, ARM_INS_VRECPE: vrecpe${p}.u32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRECPSfd, ARM_INS_VRECPS: vrecps${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRECPSfq, ARM_INS_VRECPS: vrecps${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VREV16d8, ARM_INS_VREV16: vrev16${p}.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VREV16q8, ARM_INS_VREV16: vrev16${p}.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VREV32d16, ARM_INS_VREV32: vrev32${p}.16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VREV32d8, ARM_INS_VREV32: vrev32${p}.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VREV32q16, ARM_INS_VREV32: vrev32${p}.16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VREV32q8, ARM_INS_VREV32: vrev32${p}.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VREV64d16, ARM_INS_VREV64: vrev64${p}.16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VREV64d32, ARM_INS_VREV64: vrev64${p}.32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VREV64d8, ARM_INS_VREV64: vrev64${p}.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VREV64q16, ARM_INS_VREV64: vrev64${p}.16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VREV64q32, ARM_INS_VREV64: vrev64${p}.32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VREV64q8, ARM_INS_VREV64: vrev64${p}.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRHADDsv16i8, ARM_INS_VRHADD: vrhadd${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRHADDsv2i32, ARM_INS_VRHADD: vrhadd${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRHADDsv4i16, ARM_INS_VRHADD: vrhadd${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRHADDsv4i32, ARM_INS_VRHADD: vrhadd${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRHADDsv8i16, ARM_INS_VRHADD: vrhadd${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRHADDsv8i8, ARM_INS_VRHADD: vrhadd${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRHADDuv16i8, ARM_INS_VRHADD: vrhadd${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRHADDuv2i32, ARM_INS_VRHADD: vrhadd${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRHADDuv4i16, ARM_INS_VRHADD: vrhadd${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRHADDuv4i32, ARM_INS_VRHADD: vrhadd${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRHADDuv8i16, ARM_INS_VRHADD: vrhadd${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRHADDuv8i8, ARM_INS_VRHADD: vrhadd${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTAD, ARM_INS_VRINTA: vrinta.f64 $dd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTAND, ARM_INS_VRINTA: vrinta.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTANQ, ARM_INS_VRINTA: vrinta.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTAS, ARM_INS_VRINTA: vrinta.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTMD, ARM_INS_VRINTM: vrintm.f64 $dd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTMND, ARM_INS_VRINTM: vrintm.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTMNQ, ARM_INS_VRINTM: vrintm.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTMS, ARM_INS_VRINTM: vrintm.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTND, ARM_INS_VRINTN: vrintn.f64 $dd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTNND, ARM_INS_VRINTN: vrintn.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTNNQ, ARM_INS_VRINTN: vrintn.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTNS, ARM_INS_VRINTN: vrintn.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTPD, ARM_INS_VRINTP: vrintp.f64 $dd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTPND, ARM_INS_VRINTP: vrintp.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTPNQ, ARM_INS_VRINTP: vrintp.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTPS, ARM_INS_VRINTP: vrintp.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTRD, ARM_INS_VRINTR: vrintr${p}.f64 $dd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTRS, ARM_INS_VRINTR: vrintr${p}.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTXD, ARM_INS_VRINTX: vrintx${p}.f64 $dd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTXND, ARM_INS_VRINTX: vrintx.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTXNQ, ARM_INS_VRINTX: vrintx.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTXS, ARM_INS_VRINTX: vrintx${p}.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTZD, ARM_INS_VRINTZ: vrintz${p}.f64 $dd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTZND, ARM_INS_VRINTZ: vrintz.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTZNQ, ARM_INS_VRINTZ: vrintz.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRINTZS, ARM_INS_VRINTZ: vrintz${p}.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLsv16i8, ARM_INS_VRSHL: vrshl${p}.s8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLsv1i64, ARM_INS_VRSHL: vrshl${p}.s64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLsv2i32, ARM_INS_VRSHL: vrshl${p}.s32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLsv2i64, ARM_INS_VRSHL: vrshl${p}.s64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLsv4i16, ARM_INS_VRSHL: vrshl${p}.s16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLsv4i32, ARM_INS_VRSHL: vrshl${p}.s32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLsv8i16, ARM_INS_VRSHL: vrshl${p}.s16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLsv8i8, ARM_INS_VRSHL: vrshl${p}.s8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLuv16i8, ARM_INS_VRSHL: vrshl${p}.u8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLuv1i64, ARM_INS_VRSHL: vrshl${p}.u64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLuv2i32, ARM_INS_VRSHL: vrshl${p}.u32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLuv2i64, ARM_INS_VRSHL: vrshl${p}.u64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLuv4i16, ARM_INS_VRSHL: vrshl${p}.u16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLuv4i32, ARM_INS_VRSHL: vrshl${p}.u32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLuv8i16, ARM_INS_VRSHL: vrshl${p}.u16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHLuv8i8, ARM_INS_VRSHL: vrshl${p}.u8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRNv2i32, ARM_INS_VRSHRN: vrshrn${p}.i64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRNv4i16, ARM_INS_VRSHRN: vrshrn${p}.i32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRNv8i8, ARM_INS_VRSHRN: vrshrn${p}.i16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRsv16i8, ARM_INS_VRSHR: vrshr${p}.s8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRsv1i64, ARM_INS_VRSHR: vrshr${p}.s64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRsv2i32, ARM_INS_VRSHR: vrshr${p}.s32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRsv2i64, ARM_INS_VRSHR: vrshr${p}.s64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRsv4i16, ARM_INS_VRSHR: vrshr${p}.s16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRsv4i32, ARM_INS_VRSHR: vrshr${p}.s32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRsv8i16, ARM_INS_VRSHR: vrshr${p}.s16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRsv8i8, ARM_INS_VRSHR: vrshr${p}.s8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRuv16i8, ARM_INS_VRSHR: vrshr${p}.u8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRuv1i64, ARM_INS_VRSHR: vrshr${p}.u64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRuv2i32, ARM_INS_VRSHR: vrshr${p}.u32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRuv2i64, ARM_INS_VRSHR: vrshr${p}.u64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRuv4i16, ARM_INS_VRSHR: vrshr${p}.u16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRuv4i32, ARM_INS_VRSHR: vrshr${p}.u32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRuv8i16, ARM_INS_VRSHR: vrshr${p}.u16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSHRuv8i8, ARM_INS_VRSHR: vrshr${p}.u8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSQRTEd, ARM_INS_VRSQRTE: vrsqrte${p}.u32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSQRTEfd, ARM_INS_VRSQRTE: vrsqrte${p}.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSQRTEfq, ARM_INS_VRSQRTE: vrsqrte${p}.f32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSQRTEq, ARM_INS_VRSQRTE: vrsqrte${p}.u32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSQRTSfd, ARM_INS_VRSQRTS: vrsqrts${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSQRTSfq, ARM_INS_VRSQRTS: vrsqrts${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAsv16i8, ARM_INS_VRSRA: vrsra${p}.s8 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAsv1i64, ARM_INS_VRSRA: vrsra${p}.s64 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAsv2i32, ARM_INS_VRSRA: vrsra${p}.s32 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAsv2i64, ARM_INS_VRSRA: vrsra${p}.s64 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAsv4i16, ARM_INS_VRSRA: vrsra${p}.s16 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAsv4i32, ARM_INS_VRSRA: vrsra${p}.s32 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAsv8i16, ARM_INS_VRSRA: vrsra${p}.s16 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAsv8i8, ARM_INS_VRSRA: vrsra${p}.s8 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAuv16i8, ARM_INS_VRSRA: vrsra${p}.u8 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAuv1i64, ARM_INS_VRSRA: vrsra${p}.u64 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAuv2i32, ARM_INS_VRSRA: vrsra${p}.u32 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAuv2i64, ARM_INS_VRSRA: vrsra${p}.u64 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAuv4i16, ARM_INS_VRSRA: vrsra${p}.u16 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAuv4i32, ARM_INS_VRSRA: vrsra${p}.u32 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAuv8i16, ARM_INS_VRSRA: vrsra${p}.u16 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSRAuv8i8, ARM_INS_VRSRA: vrsra${p}.u8 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSUBHNv2i32, ARM_INS_VRSUBHN: vrsubhn${p}.i64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSUBHNv4i16, ARM_INS_VRSUBHN: vrsubhn${p}.i32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VRSUBHNv8i8, ARM_INS_VRSUBHN: vrsubhn${p}.i16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSELEQD, ARM_INS_VSELEQ: vseleq.f64 $dd, $dn, $dm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSELEQS, ARM_INS_VSELEQ: vseleq.f32 $sd, $sn, $sm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSELGED, ARM_INS_VSELGE: vselge.f64 $dd, $dn, $dm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSELGES, ARM_INS_VSELGE: vselge.f32 $sd, $sn, $sm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSELGTD, ARM_INS_VSELGT: vselgt.f64 $dd, $dn, $dm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSELGTS, ARM_INS_VSELGT: vselgt.f32 $sd, $sn, $sm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSELVSD, ARM_INS_VSELVS: vselvs.f64 $dd, $dn, $dm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSELVSS, ARM_INS_VSELVS: vselvs.f32 $sd, $sn, $sm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSETLNi16, ARM_INS_VMOV: vmov${p}.16 $v$lane, $r */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSETLNi32, ARM_INS_VMOV: vmov${p}.32 $v$lane, $r */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSETLNi8, ARM_INS_VMOV: vmov${p}.8 $v$lane, $r */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLLi16, ARM_INS_VSHLL: vshll${p}.i16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLLi32, ARM_INS_VSHLL: vshll${p}.i32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLLi8, ARM_INS_VSHLL: vshll${p}.i8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLLsv2i64, ARM_INS_VSHLL: vshll${p}.s32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLLsv4i32, ARM_INS_VSHLL: vshll${p}.s16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLLsv8i16, ARM_INS_VSHLL: vshll${p}.s8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLLuv2i64, ARM_INS_VSHLL: vshll${p}.u32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLLuv4i32, ARM_INS_VSHLL: vshll${p}.u16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLLuv8i16, ARM_INS_VSHLL: vshll${p}.u8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLiv16i8, ARM_INS_VSHL: vshl${p}.i8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLiv1i64, ARM_INS_VSHL: vshl${p}.i64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLiv2i32, ARM_INS_VSHL: vshl${p}.i32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLiv2i64, ARM_INS_VSHL: vshl${p}.i64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLiv4i16, ARM_INS_VSHL: vshl${p}.i16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLiv4i32, ARM_INS_VSHL: vshl${p}.i32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLiv8i16, ARM_INS_VSHL: vshl${p}.i16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLiv8i8, ARM_INS_VSHL: vshl${p}.i8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLsv16i8, ARM_INS_VSHL: vshl${p}.s8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLsv1i64, ARM_INS_VSHL: vshl${p}.s64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLsv2i32, ARM_INS_VSHL: vshl${p}.s32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLsv2i64, ARM_INS_VSHL: vshl${p}.s64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLsv4i16, ARM_INS_VSHL: vshl${p}.s16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLsv4i32, ARM_INS_VSHL: vshl${p}.s32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLsv8i16, ARM_INS_VSHL: vshl${p}.s16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLsv8i8, ARM_INS_VSHL: vshl${p}.s8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLuv16i8, ARM_INS_VSHL: vshl${p}.u8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLuv1i64, ARM_INS_VSHL: vshl${p}.u64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLuv2i32, ARM_INS_VSHL: vshl${p}.u32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLuv2i64, ARM_INS_VSHL: vshl${p}.u64 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLuv4i16, ARM_INS_VSHL: vshl${p}.u16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLuv4i32, ARM_INS_VSHL: vshl${p}.u32 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLuv8i16, ARM_INS_VSHL: vshl${p}.u16 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHLuv8i8, ARM_INS_VSHL: vshl${p}.u8 $vd, $vm, $vn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRNv2i32, ARM_INS_VSHRN: vshrn${p}.i64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRNv4i16, ARM_INS_VSHRN: vshrn${p}.i32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRNv8i8, ARM_INS_VSHRN: vshrn${p}.i16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRsv16i8, ARM_INS_VSHR: vshr${p}.s8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRsv1i64, ARM_INS_VSHR: vshr${p}.s64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRsv2i32, ARM_INS_VSHR: vshr${p}.s32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRsv2i64, ARM_INS_VSHR: vshr${p}.s64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRsv4i16, ARM_INS_VSHR: vshr${p}.s16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRsv4i32, ARM_INS_VSHR: vshr${p}.s32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRsv8i16, ARM_INS_VSHR: vshr${p}.s16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRsv8i8, ARM_INS_VSHR: vshr${p}.s8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRuv16i8, ARM_INS_VSHR: vshr${p}.u8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRuv1i64, ARM_INS_VSHR: vshr${p}.u64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRuv2i32, ARM_INS_VSHR: vshr${p}.u32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRuv2i64, ARM_INS_VSHR: vshr${p}.u64 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRuv4i16, ARM_INS_VSHR: vshr${p}.u16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRuv4i32, ARM_INS_VSHR: vshr${p}.u32 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRuv8i16, ARM_INS_VSHR: vshr${p}.u16 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHRuv8i8, ARM_INS_VSHR: vshr${p}.u8 $vd, $vm, $simm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSHTOD, ARM_INS_VCVT: vcvt${p}.f64.s16 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VSHTOS, ARM_INS_VCVT: vcvt${p}.f32.s16 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VSITOD, ARM_INS_VCVT: vcvt${p}.f64.s32 $dd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSITOS, ARM_INS_VCVT: vcvt${p}.f32.s32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSLIv16i8, ARM_INS_VSLI: vsli${p}.8 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSLIv1i64, ARM_INS_VSLI: vsli${p}.64 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSLIv2i32, ARM_INS_VSLI: vsli${p}.32 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSLIv2i64, ARM_INS_VSLI: vsli${p}.64 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSLIv4i16, ARM_INS_VSLI: vsli${p}.16 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSLIv4i32, ARM_INS_VSLI: vsli${p}.32 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSLIv8i16, ARM_INS_VSLI: vsli${p}.16 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSLIv8i8, ARM_INS_VSLI: vsli${p}.8 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSLTOD, ARM_INS_VCVT: vcvt${p}.f64.s32 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VSLTOS, ARM_INS_VCVT: vcvt${p}.f32.s32 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VSQRTD, ARM_INS_VSQRT: vsqrt${p}.f64 $dd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSQRTS, ARM_INS_VSQRT: vsqrt${p}.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAsv16i8, ARM_INS_VSRA: vsra${p}.s8 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAsv1i64, ARM_INS_VSRA: vsra${p}.s64 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAsv2i32, ARM_INS_VSRA: vsra${p}.s32 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAsv2i64, ARM_INS_VSRA: vsra${p}.s64 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAsv4i16, ARM_INS_VSRA: vsra${p}.s16 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAsv4i32, ARM_INS_VSRA: vsra${p}.s32 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAsv8i16, ARM_INS_VSRA: vsra${p}.s16 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAsv8i8, ARM_INS_VSRA: vsra${p}.s8 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAuv16i8, ARM_INS_VSRA: vsra${p}.u8 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAuv1i64, ARM_INS_VSRA: vsra${p}.u64 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAuv2i32, ARM_INS_VSRA: vsra${p}.u32 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAuv2i64, ARM_INS_VSRA: vsra${p}.u64 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAuv4i16, ARM_INS_VSRA: vsra${p}.u16 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAuv4i32, ARM_INS_VSRA: vsra${p}.u32 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAuv8i16, ARM_INS_VSRA: vsra${p}.u16 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRAuv8i8, ARM_INS_VSRA: vsra${p}.u8 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRIv16i8, ARM_INS_VSRI: vsri${p}.8 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRIv1i64, ARM_INS_VSRI: vsri${p}.64 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRIv2i32, ARM_INS_VSRI: vsri${p}.32 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRIv2i64, ARM_INS_VSRI: vsri${p}.64 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRIv4i16, ARM_INS_VSRI: vsri${p}.16 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRIv4i32, ARM_INS_VSRI: vsri${p}.32 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRIv8i16, ARM_INS_VSRI: vsri${p}.16 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VSRIv8i8, ARM_INS_VSRI: vsri${p}.8 $vd, $vm, $simm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1LNd16, ARM_INS_VST1: vst1${p}.16 \{$vd[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1LNd16_UPD, ARM_INS_VST1: vst1${p}.16 \{$vd[$lane]\}, $rn$rm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_VST1LNd32, ARM_INS_VST1: vst1${p}.32 \{$vd[$lane]\}, $rn */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_VST1LNd32_UPD, ARM_INS_VST1: vst1${p}.32 \{$vd[$lane]\}, $rn$rm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_VST1LNd8, ARM_INS_VST1: vst1${p}.8 \{$vd[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1LNd8_UPD, ARM_INS_VST1: vst1${p}.8 \{$vd[$lane]\}, $rn$rm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d16, ARM_INS_VST1: vst1${p}.16 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d16Q, ARM_INS_VST1: vst1${p}.16 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d16Qwb_fixed, ARM_INS_VST1: vst1${p}.16 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d16Qwb_register, ARM_INS_VST1: vst1${p}.16 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d16T, ARM_INS_VST1: vst1${p}.16 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d16Twb_fixed, ARM_INS_VST1: vst1${p}.16 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d16Twb_register, ARM_INS_VST1: vst1${p}.16 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d16wb_fixed, ARM_INS_VST1: vst1${p}.16 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d16wb_register, ARM_INS_VST1: vst1${p}.16 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d32, ARM_INS_VST1: vst1${p}.32 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d32Q, ARM_INS_VST1: vst1${p}.32 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d32Qwb_fixed, ARM_INS_VST1: vst1${p}.32 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d32Qwb_register, ARM_INS_VST1: vst1${p}.32 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d32T, ARM_INS_VST1: vst1${p}.32 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d32Twb_fixed, ARM_INS_VST1: vst1${p}.32 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d32Twb_register, ARM_INS_VST1: vst1${p}.32 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d32wb_fixed, ARM_INS_VST1: vst1${p}.32 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d32wb_register, ARM_INS_VST1: vst1${p}.32 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d64, ARM_INS_VST1: vst1${p}.64 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d64Q, ARM_INS_VST1: vst1${p}.64 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d64Qwb_fixed, ARM_INS_VST1: vst1${p}.64 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d64Qwb_register, ARM_INS_VST1: vst1${p}.64 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d64T, ARM_INS_VST1: vst1${p}.64 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d64Twb_fixed, ARM_INS_VST1: vst1${p}.64 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d64Twb_register, ARM_INS_VST1: vst1${p}.64 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d64wb_fixed, ARM_INS_VST1: vst1${p}.64 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d64wb_register, ARM_INS_VST1: vst1${p}.64 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d8, ARM_INS_VST1: vst1${p}.8 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d8Q, ARM_INS_VST1: vst1${p}.8 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d8Qwb_fixed, ARM_INS_VST1: vst1${p}.8 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d8Qwb_register, ARM_INS_VST1: vst1${p}.8 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d8T, ARM_INS_VST1: vst1${p}.8 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d8Twb_fixed, ARM_INS_VST1: vst1${p}.8 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d8Twb_register, ARM_INS_VST1: vst1${p}.8 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d8wb_fixed, ARM_INS_VST1: vst1${p}.8 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1d8wb_register, ARM_INS_VST1: vst1${p}.8 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1q16, ARM_INS_VST1: vst1${p}.16 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1q16wb_fixed, ARM_INS_VST1: vst1${p}.16 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1q16wb_register, ARM_INS_VST1: vst1${p}.16 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1q32, ARM_INS_VST1: vst1${p}.32 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1q32wb_fixed, ARM_INS_VST1: vst1${p}.32 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1q32wb_register, ARM_INS_VST1: vst1${p}.32 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1q64, ARM_INS_VST1: vst1${p}.64 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1q64wb_fixed, ARM_INS_VST1: vst1${p}.64 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1q64wb_register, ARM_INS_VST1: vst1${p}.64 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1q8, ARM_INS_VST1: vst1${p}.8 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1q8wb_fixed, ARM_INS_VST1: vst1${p}.8 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST1q8wb_register, ARM_INS_VST1: vst1${p}.8 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2LNd16, ARM_INS_VST2: vst2${p}.16 \{$vd[$lane], $src2[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2LNd16_UPD, ARM_INS_VST2: vst2${p}.16 \{$vd[$lane], $src2[$lane]\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2LNd32, ARM_INS_VST2: vst2${p}.32 \{$vd[$lane], $src2[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2LNd32_UPD, ARM_INS_VST2: vst2${p}.32 \{$vd[$lane], $src2[$lane]\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2LNd8, ARM_INS_VST2: vst2${p}.8 \{$vd[$lane], $src2[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2LNd8_UPD, ARM_INS_VST2: vst2${p}.8 \{$vd[$lane], $src2[$lane]\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2LNq16, ARM_INS_VST2: vst2${p}.16 \{$vd[$lane], $src2[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2LNq16_UPD, ARM_INS_VST2: vst2${p}.16 \{$vd[$lane], $src2[$lane]\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2LNq32, ARM_INS_VST2: vst2${p}.32 \{$vd[$lane], $src2[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2LNq32_UPD, ARM_INS_VST2: vst2${p}.32 \{$vd[$lane], $src2[$lane]\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2b16, ARM_INS_VST2: vst2${p}.16 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2b16wb_fixed, ARM_INS_VST2: vst2${p}.16 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2b16wb_register, ARM_INS_VST2: vst2${p}.16 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2b32, ARM_INS_VST2: vst2${p}.32 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2b32wb_fixed, ARM_INS_VST2: vst2${p}.32 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2b32wb_register, ARM_INS_VST2: vst2${p}.32 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2b8, ARM_INS_VST2: vst2${p}.8 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2b8wb_fixed, ARM_INS_VST2: vst2${p}.8 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2b8wb_register, ARM_INS_VST2: vst2${p}.8 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2d16, ARM_INS_VST2: vst2${p}.16 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2d16wb_fixed, ARM_INS_VST2: vst2${p}.16 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2d16wb_register, ARM_INS_VST2: vst2${p}.16 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2d32, ARM_INS_VST2: vst2${p}.32 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2d32wb_fixed, ARM_INS_VST2: vst2${p}.32 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2d32wb_register, ARM_INS_VST2: vst2${p}.32 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2d8, ARM_INS_VST2: vst2${p}.8 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2d8wb_fixed, ARM_INS_VST2: vst2${p}.8 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2d8wb_register, ARM_INS_VST2: vst2${p}.8 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2q16, ARM_INS_VST2: vst2${p}.16 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2q16wb_fixed, ARM_INS_VST2: vst2${p}.16 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2q16wb_register, ARM_INS_VST2: vst2${p}.16 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2q32, ARM_INS_VST2: vst2${p}.32 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2q32wb_fixed, ARM_INS_VST2: vst2${p}.32 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2q32wb_register, ARM_INS_VST2: vst2${p}.32 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2q8, ARM_INS_VST2: vst2${p}.8 $vd, $rn */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2q8wb_fixed, ARM_INS_VST2: vst2${p}.8 $vd, $rn! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST2q8wb_register, ARM_INS_VST2: vst2${p}.8 $vd, $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3LNd16, ARM_INS_VST3: vst3${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3LNd16_UPD, ARM_INS_VST3: vst3${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3LNd32, ARM_INS_VST3: vst3${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3LNd32_UPD, ARM_INS_VST3: vst3${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3LNd8, ARM_INS_VST3: vst3${p}.8 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3LNd8_UPD, ARM_INS_VST3: vst3${p}.8 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3LNq16, ARM_INS_VST3: vst3${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3LNq16_UPD, ARM_INS_VST3: vst3${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3LNq32, ARM_INS_VST3: vst3${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3LNq32_UPD, ARM_INS_VST3: vst3${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane]\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3d16, ARM_INS_VST3: vst3${p}.16 \{$vd, $src2, $src3\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3d16_UPD, ARM_INS_VST3: vst3${p}.16 \{$vd, $src2, $src3\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3d32, ARM_INS_VST3: vst3${p}.32 \{$vd, $src2, $src3\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3d32_UPD, ARM_INS_VST3: vst3${p}.32 \{$vd, $src2, $src3\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3d8, ARM_INS_VST3: vst3${p}.8 \{$vd, $src2, $src3\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3d8_UPD, ARM_INS_VST3: vst3${p}.8 \{$vd, $src2, $src3\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3q16, ARM_INS_VST3: vst3${p}.16 \{$vd, $src2, $src3\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3q16_UPD, ARM_INS_VST3: vst3${p}.16 \{$vd, $src2, $src3\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3q32, ARM_INS_VST3: vst3${p}.32 \{$vd, $src2, $src3\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3q32_UPD, ARM_INS_VST3: vst3${p}.32 \{$vd, $src2, $src3\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3q8, ARM_INS_VST3: vst3${p}.8 \{$vd, $src2, $src3\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST3q8_UPD, ARM_INS_VST3: vst3${p}.8 \{$vd, $src2, $src3\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4LNd16, ARM_INS_VST4: vst4${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4LNd16_UPD, ARM_INS_VST4: vst4${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4LNd32, ARM_INS_VST4: vst4${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4LNd32_UPD, ARM_INS_VST4: vst4${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4LNd8, ARM_INS_VST4: vst4${p}.8 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4LNd8_UPD, ARM_INS_VST4: vst4${p}.8 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4LNq16, ARM_INS_VST4: vst4${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4LNq16_UPD, ARM_INS_VST4: vst4${p}.16 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4LNq32, ARM_INS_VST4: vst4${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4LNq32_UPD, ARM_INS_VST4: vst4${p}.32 \{$vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4d16, ARM_INS_VST4: vst4${p}.16 \{$vd, $src2, $src3, $src4\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4d16_UPD, ARM_INS_VST4: vst4${p}.16 \{$vd, $src2, $src3, $src4\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4d32, ARM_INS_VST4: vst4${p}.32 \{$vd, $src2, $src3, $src4\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4d32_UPD, ARM_INS_VST4: vst4${p}.32 \{$vd, $src2, $src3, $src4\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4d8, ARM_INS_VST4: vst4${p}.8 \{$vd, $src2, $src3, $src4\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4d8_UPD, ARM_INS_VST4: vst4${p}.8 \{$vd, $src2, $src3, $src4\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4q16, ARM_INS_VST4: vst4${p}.16 \{$vd, $src2, $src3, $src4\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4q16_UPD, ARM_INS_VST4: vst4${p}.16 \{$vd, $src2, $src3, $src4\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4q32, ARM_INS_VST4: vst4${p}.32 \{$vd, $src2, $src3, $src4\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4q32_UPD, ARM_INS_VST4: vst4${p}.32 \{$vd, $src2, $src3, $src4\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4q8, ARM_INS_VST4: vst4${p}.8 \{$vd, $src2, $src3, $src4\}, $rn */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VST4q8_UPD, ARM_INS_VST4: vst4${p}.8 \{$vd, $src2, $src3, $src4\}, $rn$rm */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSTMDDB_UPD, ARM_INS_VSTMDB: vstmdb${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VSTMDIA, ARM_INS_VSTMIA: vstmia${p} $rn, $regs */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_VSTMDIA_UPD, ARM_INS_VSTMIA: vstmia${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VSTMSDB_UPD, ARM_INS_VSTMDB: vstmdb${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VSTMSIA, ARM_INS_VSTMIA: vstmia${p} $rn, $regs */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_VSTMSIA_UPD, ARM_INS_VSTMIA: vstmia${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VSTRD, ARM_INS_VSTR: vstr${p} $dd, $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_VSTRS, ARM_INS_VSTR: vstr${p} $sd, $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBD, ARM_INS_VSUB: vsub${p}.f64 $dd, $dn, $dm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBHNv2i32, ARM_INS_VSUBHN: vsubhn${p}.i64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBHNv4i16, ARM_INS_VSUBHN: vsubhn${p}.i32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBHNv8i8, ARM_INS_VSUBHN: vsubhn${p}.i16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBLsv2i64, ARM_INS_VSUBL: vsubl${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBLsv4i32, ARM_INS_VSUBL: vsubl${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBLsv8i16, ARM_INS_VSUBL: vsubl${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBLuv2i64, ARM_INS_VSUBL: vsubl${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBLuv4i32, ARM_INS_VSUBL: vsubl${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBLuv8i16, ARM_INS_VSUBL: vsubl${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBS, ARM_INS_VSUB: vsub${p}.f32 $sd, $sn, $sm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBWsv2i64, ARM_INS_VSUBW: vsubw${p}.s32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBWsv4i32, ARM_INS_VSUBW: vsubw${p}.s16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBWsv8i16, ARM_INS_VSUBW: vsubw${p}.s8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBWuv2i64, ARM_INS_VSUBW: vsubw${p}.u32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBWuv4i32, ARM_INS_VSUBW: vsubw${p}.u16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBWuv8i16, ARM_INS_VSUBW: vsubw${p}.u8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBfd, ARM_INS_VSUB: vsub${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBfq, ARM_INS_VSUB: vsub${p}.f32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBv16i8, ARM_INS_VSUB: vsub${p}.i8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBv1i64, ARM_INS_VSUB: vsub${p}.i64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBv2i32, ARM_INS_VSUB: vsub${p}.i32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBv2i64, ARM_INS_VSUB: vsub${p}.i64 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBv4i16, ARM_INS_VSUB: vsub${p}.i16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBv4i32, ARM_INS_VSUB: vsub${p}.i32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBv8i16, ARM_INS_VSUB: vsub${p}.i16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSUBv8i8, ARM_INS_VSUB: vsub${p}.i8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VSWPd, ARM_INS_VSWP: vswp${p} $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VSWPq, ARM_INS_VSWP: vswp${p} $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VTBL1, ARM_INS_VTBL: vtbl${p}.8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VTBL2, ARM_INS_VTBL: vtbl${p}.8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VTBL3, ARM_INS_VTBL: vtbl${p}.8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VTBL4, ARM_INS_VTBL: vtbl${p}.8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VTBX1, ARM_INS_VTBX: vtbx${p}.8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VTBX2, ARM_INS_VTBX: vtbx${p}.8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VTBX3, ARM_INS_VTBX: vtbx${p}.8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VTBX4, ARM_INS_VTBX: vtbx${p}.8 $vd, $vn, $vm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VTOSHD, ARM_INS_VCVT: vcvt${p}.s16.f64 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VTOSHS, ARM_INS_VCVT: vcvt${p}.s16.f32 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VTOSIRD, ARM_INS_VCVTR: vcvtr${p}.s32.f64 $sd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VTOSIRS, ARM_INS_VCVTR: vcvtr${p}.s32.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VTOSIZD, ARM_INS_VCVT: vcvt${p}.s32.f64 $sd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VTOSIZS, ARM_INS_VCVT: vcvt${p}.s32.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VTOSLD, ARM_INS_VCVT: vcvt${p}.s32.f64 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VTOSLS, ARM_INS_VCVT: vcvt${p}.s32.f32 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VTOUHD, ARM_INS_VCVT: vcvt${p}.u16.f64 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VTOUHS, ARM_INS_VCVT: vcvt${p}.u16.f32 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VTOUIRD, ARM_INS_VCVTR: vcvtr${p}.u32.f64 $sd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VTOUIRS, ARM_INS_VCVTR: vcvtr${p}.u32.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VTOUIZD, ARM_INS_VCVT: vcvt${p}.u32.f64 $sd, $dm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VTOUIZS, ARM_INS_VCVT: vcvt${p}.u32.f32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VTOULD, ARM_INS_VCVT: vcvt${p}.u32.f64 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VTOULS, ARM_INS_VCVT: vcvt${p}.u32.f32 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VTRNd16, ARM_INS_VTRN: vtrn${p}.16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VTRNd32, ARM_INS_VTRN: vtrn${p}.32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VTRNd8, ARM_INS_VTRN: vtrn${p}.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VTRNq16, ARM_INS_VTRN: vtrn${p}.16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VTRNq32, ARM_INS_VTRN: vtrn${p}.32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VTRNq8, ARM_INS_VTRN: vtrn${p}.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VTSTv16i8, ARM_INS_VTST: vtst${p}.8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VTSTv2i32, ARM_INS_VTST: vtst${p}.32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VTSTv4i16, ARM_INS_VTST: vtst${p}.16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VTSTv4i32, ARM_INS_VTST: vtst${p}.32 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VTSTv8i16, ARM_INS_VTST: vtst${p}.16 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VTSTv8i8, ARM_INS_VTST: vtst${p}.8 $vd, $vn, $vm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_VUHTOD, ARM_INS_VCVT: vcvt${p}.f64.u16 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VUHTOS, ARM_INS_VCVT: vcvt${p}.f32.u16 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VUITOD, ARM_INS_VCVT: vcvt${p}.f64.u32 $dd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VUITOS, ARM_INS_VCVT: vcvt${p}.f32.u32 $sd, $sm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_VULTOD, ARM_INS_VCVT: vcvt${p}.f64.u32 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VULTOS, ARM_INS_VCVT: vcvt${p}.f32.u32 $dst, $a, $fbits */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_VUZPd16, ARM_INS_VUZP: vuzp${p}.16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VUZPd8, ARM_INS_VUZP: vuzp${p}.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VUZPq16, ARM_INS_VUZP: vuzp${p}.16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VUZPq32, ARM_INS_VUZP: vuzp${p}.32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VUZPq8, ARM_INS_VUZP: vuzp${p}.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VZIPd16, ARM_INS_VZIP: vzip${p}.16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VZIPd8, ARM_INS_VZIP: vzip${p}.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VZIPq16, ARM_INS_VZIP: vzip${p}.16 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VZIPq32, ARM_INS_VZIP: vzip${p}.32 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_VZIPq8, ARM_INS_VZIP: vzip${p}.8 $vd, $vm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_sysLDMDA, ARM_INS_LDMDA: ldmda${p} $rn, $regs ^ */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_sysLDMDA_UPD, ARM_INS_LDMDA: ldmda${p} $rn!, $regs ^ */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_sysLDMDB, ARM_INS_LDMDB: ldmdb${p} $rn, $regs ^ */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_sysLDMDB_UPD, ARM_INS_LDMDB: ldmdb${p} $rn!, $regs ^ */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_sysLDMIA, ARM_INS_LDM: ldm${p} $rn, $regs ^ */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_sysLDMIA_UPD, ARM_INS_LDM: ldm${p} $rn!, $regs ^ */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_sysLDMIB, ARM_INS_LDMIB: ldmib${p} $rn, $regs ^ */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_sysLDMIB_UPD, ARM_INS_LDMIB: ldmib${p} $rn!, $regs ^ */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_sysSTMDA, ARM_INS_STMDA: stmda${p} $rn, $regs ^ */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_sysSTMDA_UPD, ARM_INS_STMDA: stmda${p} $rn!, $regs ^ */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_sysSTMDB, ARM_INS_STMDB: stmdb${p} $rn, $regs ^ */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_sysSTMDB_UPD, ARM_INS_STMDB: stmdb${p} $rn!, $regs ^ */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_sysSTMIA, ARM_INS_STM: stm${p} $rn, $regs ^ */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_sysSTMIA_UPD, ARM_INS_STM: stm${p} $rn!, $regs ^ */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_sysSTMIB, ARM_INS_STMIB: stmib${p} $rn, $regs ^ */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_sysSTMIB_UPD, ARM_INS_STMIB: stmib${p} $rn!, $regs ^ */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ADCri, ARM_INS_ADC: adc${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ADCrr, ARM_INS_ADC: adc${s}${p}.w $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ADCrs, ARM_INS_ADC: adc${s}${p}.w $rd, $rn, $shiftedrm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ADDri, ARM_INS_ADD: add${s}${p}.w $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ADDri12, ARM_INS_ADDW: addw${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ADDrr, ARM_INS_ADD: add${s}${p}.w $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ADDrs, ARM_INS_ADD: add${s}${p}.w $rd, $rn, $shiftedrm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ADR, ARM_INS_ADR: adr{$p}.w $rd, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2ANDri, ARM_INS_AND: and${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ANDrr, ARM_INS_AND: and${s}${p}.w $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ANDrs, ARM_INS_AND: and${s}${p}.w $rd, $rn, $shiftedrm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ASRri, ARM_INS_ASR: asr${s}${p}.w $rd, $rm, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ASRrr, ARM_INS_ASR: asr${s}${p}.w $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2B, ARM_INS_B: b${p}.w $target */
+ { 0 }
+},
+{ /* ARM_t2BFC, ARM_INS_BFC: bfc${p} $rd, $imm */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2BFI, ARM_INS_BFI: bfi${p} $rd, $rn, $imm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2BICri, ARM_INS_BIC: bic${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2BICrr, ARM_INS_BIC: bic${s}${p}.w $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2BICrs, ARM_INS_BIC: bic${s}${p}.w $rd, $rn, $shiftedrm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2BXJ, ARM_INS_BXJ: bxj${p} $func */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2Bcc, ARM_INS_B: b${p}.w $target */
+ { 0 }
+},
+{ /* ARM_t2CDP, ARM_INS_CDP: cdp${p} $cop, $opc1, $crd, $crn, $crm, $opc2 */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 }
+},
+{ /* ARM_t2CDP2, ARM_INS_CDP2: cdp2${p} $cop, $opc1, $crd, $crn, $crm, $opc2 */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 }
+},
+{ /* ARM_t2CLREX, ARM_INS_CLREX: clrex${p} */
+ { 0 }
+},
+{ /* ARM_t2CLZ, ARM_INS_CLZ: clz${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2CMNri, ARM_INS_CMN: cmn${p}.w $rn, $imm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2CMNzrr, ARM_INS_CMN: cmn${p}.w $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2CMNzrs, ARM_INS_CMN: cmn${p}.w $rn, $shiftedrm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2CMPri, ARM_INS_CMP: cmp${p}.w $rn, $imm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2CMPrr, ARM_INS_CMP: cmp${p}.w $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2CMPrs, ARM_INS_CMP: cmp${p}.w $rn, $shiftedrm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2CPS1p, ARM_INS_CPS: cps $mode */
+ { 0 }
+},
+{ /* ARM_t2CPS2p, ARM_INS_CPS: cps$imod.w $iflags */
+ { 0 }
+},
+{ /* ARM_t2CPS3p, ARM_INS_CPS: cps$imod $iflags, $mode */
+ { 0 }
+},
+{ /* ARM_t2CRC32B, ARM_INS_CRC32B: crc32b $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2CRC32CB, ARM_INS_CRC32CB: crc32cb $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2CRC32CH, ARM_INS_CRC32CH: crc32ch $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2CRC32CW, ARM_INS_CRC32CW: crc32cw $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2CRC32H, ARM_INS_CRC32H: crc32h $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2CRC32W, ARM_INS_CRC32W: crc32w $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2DBG, ARM_INS_DBG: dbg${p} $opt */
+ { 0 }
+},
+{ /* ARM_t2DCPS1, ARM_INS_DCPS1: dcps1${p} */
+ { 0 }
+},
+{ /* ARM_t2DCPS2, ARM_INS_DCPS2: dcps2${p} */
+ { 0 }
+},
+{ /* ARM_t2DCPS3, ARM_INS_DCPS3: dcps3${p} */
+ { 0 }
+},
+{ /* ARM_t2DMB, ARM_INS_DMB: dmb${p} $opt */
+ { 0 }
+},
+{ /* ARM_t2DSB, ARM_INS_DSB: dsb${p} $opt */
+ { 0 }
+},
+{ /* ARM_t2EORri, ARM_INS_EOR: eor${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2EORrr, ARM_INS_EOR: eor${s}${p}.w $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2EORrs, ARM_INS_EOR: eor${s}${p}.w $rd, $rn, $shiftedrm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2HINT, ARM_INS_HINT: hint${p}.w $imm */
+ { 0 }
+},
+{ /* ARM_t2HVC, ARM_INS_HVC: hvc.w $imm16 */
+ { 0 }
+},
+{ /* ARM_t2ISB, ARM_INS_ISB: isb${p} $opt */
+ { 0 }
+},
+{ /* ARM_t2IT, ARM_INS_IT: it$mask $cc */
+ { 0 }
+},
+{ /* ARM_t2LDA, ARM_INS_LDA: lda${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDAB, ARM_INS_LDAB: ldab${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDAEX, ARM_INS_LDAEX: ldaex${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDAEXB, ARM_INS_LDAEXB: ldaexb${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDAEXD, ARM_INS_LDAEXD: ldaexd${p} $rt, $rt2, $addr */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDAEXH, ARM_INS_LDAEXH: ldaexh${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDAH, ARM_INS_LDAH: ldah${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDC2L_OFFSET, ARM_INS_LDC2L: ldc2l${p} $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDC2L_OPTION, ARM_INS_LDC2L: ldc2l${p} $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDC2L_POST, ARM_INS_LDC2L: ldc2l${p} $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDC2L_PRE, ARM_INS_LDC2L: ldc2l${p} $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDC2_OFFSET, ARM_INS_LDC2: ldc2${p} $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDC2_OPTION, ARM_INS_LDC2: ldc2${p} $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDC2_POST, ARM_INS_LDC2: ldc2${p} $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDC2_PRE, ARM_INS_LDC2: ldc2${p} $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDCL_OFFSET, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDCL_OPTION, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDCL_POST, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDCL_PRE, ARM_INS_LDCL: ldcl${p} $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDC_OFFSET, ARM_INS_LDC: ldc${p} $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDC_OPTION, ARM_INS_LDC: ldc${p} $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDC_POST, ARM_INS_LDC: ldc${p} $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDC_PRE, ARM_INS_LDC: ldc${p} $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDMDB, ARM_INS_LDMDB: ldmdb${p} $rn, $regs */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDMDB_UPD, ARM_INS_LDMDB: ldmdb${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDMIA, ARM_INS_LDM: ldm${p}.w $rn, $regs */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDMIA_UPD, ARM_INS_LDM: ldm${p}.w $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRBT, ARM_INS_LDRBT: ldrbt${p} $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRB_POST, ARM_INS_LDRB: ldrb${p} $rt, $rn$offset */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRB_PRE, ARM_INS_LDRB: ldrb${p} $rt, $addr! */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRBi12, ARM_INS_LDRB: ldrb${p}.w $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRBi8, ARM_INS_LDRB: ldrb${p} $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRBpci, ARM_INS_LDRB: ldrb${p}.w $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRBs, ARM_INS_LDRB: ldrb${p}.w $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRD_POST, ARM_INS_LDRD: ldrd${p} $rt, $rt2, $addr$imm */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRD_PRE, ARM_INS_LDRD: ldrd${p} $rt, $rt2, $addr! */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRDi8, ARM_INS_LDRD: ldrd${p} $rt, $rt2, $addr */
+ { CS_AC_WRITE, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDREX, ARM_INS_LDREX: ldrex${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDREXB, ARM_INS_LDREXB: ldrexb${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDREXD, ARM_INS_LDREXD: ldrexd${p} $rt, $rt2, $addr */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDREXH, ARM_INS_LDREXH: ldrexh${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRHT, ARM_INS_LDRHT: ldrht${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRH_POST, ARM_INS_LDRH: ldrh${p} $rt, $rn$offset */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRH_PRE, ARM_INS_LDRH: ldrh${p} $rt, $addr! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRHi12, ARM_INS_LDRH: ldrh${p}.w $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRHi8, ARM_INS_LDRH: ldrh${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRHpci, ARM_INS_LDRH: ldrh${p}.w $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRHs, ARM_INS_LDRH: ldrh${p}.w $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRSBT, ARM_INS_LDRSBT: ldrsbt${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRSB_POST, ARM_INS_LDRSB: ldrsb${p} $rt, $rn$offset */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRSB_PRE, ARM_INS_LDRSB: ldrsb${p} $rt, $addr! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRSBi12, ARM_INS_LDRSB: ldrsb${p}.w $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRSBi8, ARM_INS_LDRSB: ldrsb${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRSBpci, ARM_INS_LDRSB: ldrsb${p}.w $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRSBs, ARM_INS_LDRSB: ldrsb${p}.w $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRSHT, ARM_INS_LDRSHT: ldrsht${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRSH_POST, ARM_INS_LDRSH: ldrsh${p} $rt, $rn$offset */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRSH_PRE, ARM_INS_LDRSH: ldrsh${p} $rt, $addr! */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRSHi12, ARM_INS_LDRSH: ldrsh${p}.w $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRSHi8, ARM_INS_LDRSH: ldrsh${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRSHpci, ARM_INS_LDRSH: ldrsh${p}.w $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRSHs, ARM_INS_LDRSH: ldrsh${p}.w $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LDRT, ARM_INS_LDRT: ldrt${p} $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDR_POST, ARM_INS_LDR: ldr${p} $rt, $rn$offset */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDR_PRE, ARM_INS_LDR: ldr${p} $rt, $addr! */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRi12, ARM_INS_LDR: ldr${p}.w $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRi8, ARM_INS_LDR: ldr${p} $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRpci, ARM_INS_LDR: ldr${p}.w $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2LDRs, ARM_INS_LDR: ldr${p}.w $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LSLri, ARM_INS_LSL: lsl${s}${p}.w $rd, $rm, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LSLrr, ARM_INS_LSL: lsl${s}${p}.w $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LSRri, ARM_INS_LSR: lsr${s}${p}.w $rd, $rm, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2LSRrr, ARM_INS_LSR: lsr${s}${p}.w $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2MCR, ARM_INS_MCR: mcr${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 }
+},
+{ /* ARM_t2MCR2, ARM_INS_MCR2: mcr2${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 }
+},
+{ /* ARM_t2MCRR, ARM_INS_MCRR: mcrr${p} $cop, $opc1, $rt, $rt2, $crm */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2MCRR2, ARM_INS_MCRR2: mcrr2${p} $cop, $opc1, $rt, $rt2, $crm */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2MLA, ARM_INS_MLA: mla${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2MLS, ARM_INS_MLS: mls${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2MOVTi16, ARM_INS_MOVT: movt${p} $rd, $imm */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2MOVi, ARM_INS_MOV: mov${s}${p}.w $rd, $imm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2MOVi16, ARM_INS_MOVW: movw${p} $rd, $imm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2MOVr, ARM_INS_MOV: mov${s}${p}.w $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2MOVsra_flag, ARM_INS_ASR: asrs${p}.w $rd, $rm, #1 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2MOVsrl_flag, ARM_INS_LSR: lsrs${p}.w $rd, $rm, #1 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2MRC, ARM_INS_MRC: mrc${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 }
+},
+{ /* ARM_t2MRC2, ARM_INS_MRC2: mrc2${p} $cop, $opc1, $rt, $crn, $crm, $opc2 */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_IGNORE, 0 }
+},
+{ /* ARM_t2MRRC, ARM_INS_MRRC: mrrc${p} $cop, $opc1, $rt, $rt2, $crm */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2MRRC2, ARM_INS_MRRC2: mrrc2${p} $cop, $opc1, $rt, $rt2, $crm */
+ { CS_AC_READ, CS_AC_IGNORE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2MRS_AR, ARM_INS_MRS: mrs${p} $rd, apsr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2MRS_M, ARM_INS_MRS: mrs${p} $rd, $sysm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2MRSbanked, ARM_INS_MRS: mrs${p} $rd, $banked */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2MRSsys_AR, ARM_INS_MRS: mrs${p} $rd, spsr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2MSR_AR, ARM_INS_MSR: msr${p} $mask, $rn */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2MSR_M, ARM_INS_MSR: msr${p} $sysm, $rn */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2MSRbanked, ARM_INS_MSR: msr${p} $banked, $rn */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2MUL, ARM_INS_MUL: mul${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2MVNi, ARM_INS_MVN: mvn${s}${p} $rd, $imm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2MVNr, ARM_INS_MVN: mvn${s}${p}.w $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2MVNs, ARM_INS_MVN: mvn${s}${p}.w $rd, $shiftedrm */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2ORNri, ARM_INS_ORN: orn${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ORNrr, ARM_INS_ORN: orn${s}${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ORNrs, ARM_INS_ORN: orn${s}${p} $rd, $rn, $shiftedrm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ORRri, ARM_INS_ORR: orr${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ORRrr, ARM_INS_ORR: orr${s}${p}.w $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2ORRrs, ARM_INS_ORR: orr${s}${p}.w $rd, $rn, $shiftedrm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2PKHBT, ARM_INS_PKHBT: pkhbt${p} $rd, $rn, $rm$sh */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2PKHTB, ARM_INS_PKHTB: pkhtb${p} $rd, $rn, $rm$sh */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2PLDWi12, ARM_INS_PLDW: pldw${p} $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2PLDWi8, ARM_INS_PLDW: pldw${p} $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2PLDWs, ARM_INS_PLDW: pldw${p} $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2PLDi12, ARM_INS_PLD: pld${p} $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2PLDi8, ARM_INS_PLD: pld${p} $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2PLDpci, ARM_INS_PLD: pld${p} $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2PLDs, ARM_INS_PLD: pld${p} $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2PLIi12, ARM_INS_PLI: pli${p} $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2PLIi8, ARM_INS_PLI: pli${p} $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2PLIpci, ARM_INS_PLI: pli${p} $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2PLIs, ARM_INS_PLI: pli${p} $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2QADD, ARM_INS_QADD: qadd${p} $rd, $rm, $rn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2QADD16, ARM_INS_QADD16: qadd16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2QADD8, ARM_INS_QADD8: qadd8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2QASX, ARM_INS_QASX: qasx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2QDADD, ARM_INS_QDADD: qdadd${p} $rd, $rm, $rn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2QDSUB, ARM_INS_QDSUB: qdsub${p} $rd, $rm, $rn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2QSAX, ARM_INS_QSAX: qsax${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2QSUB, ARM_INS_QSUB: qsub${p} $rd, $rm, $rn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2QSUB16, ARM_INS_QSUB16: qsub16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2QSUB8, ARM_INS_QSUB8: qsub8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2RBIT, ARM_INS_RBIT: rbit${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2REV, ARM_INS_REV: rev${p}.w $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2REV16, ARM_INS_REV16: rev16${p}.w $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2REVSH, ARM_INS_REVSH: revsh${p}.w $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2RFEDB, ARM_INS_RFEDB: rfedb${p} $rn */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2RFEDBW, ARM_INS_RFEDB: rfedb${p} $rn! */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2RFEIA, ARM_INS_RFEIA: rfeia${p} $rn */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2RFEIAW, ARM_INS_RFEIA: rfeia${p} $rn! */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2RORri, ARM_INS_ROR: ror${s}${p}.w $rd, $rm, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2RORrr, ARM_INS_ROR: ror${s}${p}.w $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2RRX, ARM_INS_RRX: rrx${s}${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2RSBri, ARM_INS_RSB: rsb${s}${p}.w $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2RSBrr, ARM_INS_RSB: rsb${s}${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2RSBrs, ARM_INS_RSB: rsb${s}${p} $rd, $rn, $shiftedrm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SADD16, ARM_INS_SADD16: sadd16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SADD8, ARM_INS_SADD8: sadd8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SASX, ARM_INS_SASX: sasx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SBCri, ARM_INS_SBC: sbc${s}${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SBCrr, ARM_INS_SBC: sbc${s}${p}.w $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SBCrs, ARM_INS_SBC: sbc${s}${p}.w $rd, $rn, $shiftedrm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SBFX, ARM_INS_SBFX: sbfx${p} $rd, $rn, $lsb, $msb */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SDIV, ARM_INS_SDIV: sdiv${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SEL, ARM_INS_SEL: sel${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SHADD16, ARM_INS_SHADD16: shadd16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SHADD8, ARM_INS_SHADD8: shadd8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SHASX, ARM_INS_SHASX: shasx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SHSAX, ARM_INS_SHSAX: shsax${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SHSUB16, ARM_INS_SHSUB16: shsub16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SHSUB8, ARM_INS_SHSUB8: shsub8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMC, ARM_INS_SMC: smc${p} $opt */
+ { 0 }
+},
+{ /* ARM_t2SMLABB, ARM_INS_SMLABB: smlabb${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLABT, ARM_INS_SMLABT: smlabt${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLAD, ARM_INS_SMLAD: smlad${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLADX, ARM_INS_SMLADX: smladx${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLAL, ARM_INS_SMLAL: smlal${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLALBB, ARM_INS_SMLALBB: smlalbb${p} $ra, $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLALBT, ARM_INS_SMLALBT: smlalbt${p} $ra, $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLALD, ARM_INS_SMLALD: smlald${p} $ra, $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLALDX, ARM_INS_SMLALDX: smlaldx${p} $ra, $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLALTB, ARM_INS_SMLALTB: smlaltb${p} $ra, $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLALTT, ARM_INS_SMLALTT: smlaltt${p} $ra, $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLATB, ARM_INS_SMLATB: smlatb${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLATT, ARM_INS_SMLATT: smlatt${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLAWB, ARM_INS_SMLAWB: smlawb${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLAWT, ARM_INS_SMLAWT: smlawt${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLSD, ARM_INS_SMLSD: smlsd${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLSDX, ARM_INS_SMLSDX: smlsdx${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLSLD, ARM_INS_SMLSLD: smlsld${p} $ra, $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMLSLDX, ARM_INS_SMLSLDX: smlsldx${p} $ra, $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMMLA, ARM_INS_SMMLA: smmla${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMMLAR, ARM_INS_SMMLAR: smmlar${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMMLS, ARM_INS_SMMLS: smmls${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMMLSR, ARM_INS_SMMLSR: smmlsr${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMMUL, ARM_INS_SMMUL: smmul${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMMULR, ARM_INS_SMMULR: smmulr${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMUAD, ARM_INS_SMUAD: smuad${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMUADX, ARM_INS_SMUADX: smuadx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMULBB, ARM_INS_SMULBB: smulbb${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMULBT, ARM_INS_SMULBT: smulbt${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMULL, ARM_INS_SMULL: smull${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMULTB, ARM_INS_SMULTB: smultb${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMULTT, ARM_INS_SMULTT: smultt${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMULWB, ARM_INS_SMULWB: smulwb${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMULWT, ARM_INS_SMULWT: smulwt${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMUSD, ARM_INS_SMUSD: smusd${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SMUSDX, ARM_INS_SMUSDX: smusdx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SRSDB, ARM_INS_SRSDB: srsdb${p} sp, $mode */
+ { 0 }
+},
+{ /* ARM_t2SRSDB_UPD, ARM_INS_SRSDB: srsdb${p} sp!, $mode */
+ { 0 }
+},
+{ /* ARM_t2SRSIA, ARM_INS_SRSIA: srsia${p} sp, $mode */
+ { 0 }
+},
+{ /* ARM_t2SRSIA_UPD, ARM_INS_SRSIA: srsia${p} sp!, $mode */
+ { 0 }
+},
+{ /* ARM_t2SSAT, ARM_INS_SSAT: ssat${p} $rd, $sat_imm, $rn$sh */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2SSAT16, ARM_INS_SSAT16: ssat16${p} $rd, $sat_imm, $rn */
+ { CS_AC_WRITE, CS_AC_IGNORE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SSAX, ARM_INS_SSAX: ssax${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SSUB16, ARM_INS_SSUB16: ssub16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SSUB8, ARM_INS_SSUB8: ssub8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STC2L_OFFSET, ARM_INS_STC2L: stc2l${p} $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STC2L_OPTION, ARM_INS_STC2L: stc2l${p} $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STC2L_POST, ARM_INS_STC2L: stc2l${p} $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STC2L_PRE, ARM_INS_STC2L: stc2l${p} $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STC2_OFFSET, ARM_INS_STC2: stc2${p} $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STC2_OPTION, ARM_INS_STC2: stc2${p} $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STC2_POST, ARM_INS_STC2: stc2${p} $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STC2_PRE, ARM_INS_STC2: stc2${p} $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STCL_OFFSET, ARM_INS_STCL: stcl${p} $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STCL_OPTION, ARM_INS_STCL: stcl${p} $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STCL_POST, ARM_INS_STCL: stcl${p} $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STCL_PRE, ARM_INS_STCL: stcl${p} $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STC_OFFSET, ARM_INS_STC: stc${p} $cop, $crd, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STC_OPTION, ARM_INS_STC: stc${p} $cop, $crd, $addr, $option */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STC_POST, ARM_INS_STC: stc${p} $cop, $crd, $addr, $offset */
+ { CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STC_PRE, ARM_INS_STC: stc${p} $cop, $crd, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STL, ARM_INS_STL: stl${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STLB, ARM_INS_STLB: stlb${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STLEX, ARM_INS_STLEX: stlex${p} $rd, $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STLEXB, ARM_INS_STLEXB: stlexb${p} $rd, $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STLEXD, ARM_INS_STLEXD: stlexd${p} $rd, $rt, $rt2, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STLEXH, ARM_INS_STLEXH: stlexh${p} $rd, $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STLH, ARM_INS_STLH: stlh${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STMDB, ARM_INS_STMDB: stmdb${p} $rn, $regs */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STMDB_UPD, ARM_INS_STMDB: stmdb${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STMIA, ARM_INS_STM: stm${p}.w $rn, $regs */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STMIA_UPD, ARM_INS_STM: stm${p}.w $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STRBT, ARM_INS_STRBT: strbt${p} $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2STRB_POST, ARM_INS_STRB: strb${p} $rt, $rn$offset */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2STRB_PRE, ARM_INS_STRB: strb${p} $rt, $addr! */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2STRBi12, ARM_INS_STRB: strb${p}.w $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2STRBi8, ARM_INS_STRB: strb${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2STRBs, ARM_INS_STRB: strb${p}.w $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2STRD_POST, ARM_INS_STRD: strd${p} $rt, $rt2, $addr$imm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STRD_PRE, ARM_INS_STRD: strd${p} $rt, $rt2, $addr! */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STRDi8, ARM_INS_STRD: strd${p} $rt, $rt2, $addr */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STREX, ARM_INS_STREX: strex${p} $rd, $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STREXB, ARM_INS_STREXB: strexb${p} $rd, $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STREXD, ARM_INS_STREXD: strexd${p} $rd, $rt, $rt2, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STREXH, ARM_INS_STREXH: strexh${p} $rd, $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2STRHT, ARM_INS_STRHT: strht${p} $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2STRH_POST, ARM_INS_STRH: strh${p} $rt, $rn$offset */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2STRH_PRE, ARM_INS_STRH: strh${p} $rt, $addr! */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2STRHi12, ARM_INS_STRH: strh${p}.w $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2STRHi8, ARM_INS_STRH: strh${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2STRHs, ARM_INS_STRH: strh${p}.w $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2STRT, ARM_INS_STRT: strt${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2STR_POST, ARM_INS_STR: str${p} $rt, $rn$offset */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2STR_PRE, ARM_INS_STR: str${p} $rt, $addr! */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2STRi12, ARM_INS_STR: str${p}.w $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2STRi8, ARM_INS_STR: str${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2STRs, ARM_INS_STR: str${p}.w $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2SUBS_PC_LR, ARM_INS_SUB: subs${p} pc, lr, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SUBri, ARM_INS_SUB: sub${s}${p}.w $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SUBri12, ARM_INS_SUBW: subw${p} $rd, $rn, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SUBrr, ARM_INS_SUB: sub${s}${p}.w $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SUBrs, ARM_INS_SUB: sub${s}${p}.w $rd, $rn, $shiftedrm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SXTAB, ARM_INS_SXTAB: sxtab${p} $rd, $rn, $rm$rot */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SXTAB16, ARM_INS_SXTAB16: sxtab16${p} $rd, $rn, $rm$rot */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SXTAH, ARM_INS_SXTAH: sxtah${p} $rd, $rn, $rm$rot */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SXTB, ARM_INS_SXTB: sxtb${p}.w $rd, $rm$rot */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SXTB16, ARM_INS_SXTB16: sxtb16${p} $rd, $rm$rot */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2SXTH, ARM_INS_SXTH: sxth${p}.w $rd, $rm$rot */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2TBB, ARM_INS_TBB: tbb${p} $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2TBH, ARM_INS_TBH: tbh${p} $addr */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2TEQri, ARM_INS_TEQ: teq${p}.w $rn, $imm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2TEQrr, ARM_INS_TEQ: teq${p}.w $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2TEQrs, ARM_INS_TEQ: teq${p}.w $rn, $shiftedrm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2TSTri, ARM_INS_TST: tst${p}.w $rn, $imm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2TSTrr, ARM_INS_TST: tst${p}.w $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2TSTrs, ARM_INS_TST: tst${p}.w $rn, $shiftedrm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_t2UADD16, ARM_INS_UADD16: uadd16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UADD8, ARM_INS_UADD8: uadd8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UASX, ARM_INS_UASX: uasx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UBFX, ARM_INS_UBFX: ubfx${p} $rd, $rn, $lsb, $msb */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UDF, ARM_INS_UDF: udf.w $imm16 */
+ { 0 }
+},
+{ /* ARM_t2UDIV, ARM_INS_UDIV: udiv${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UHADD16, ARM_INS_UHADD16: uhadd16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UHADD8, ARM_INS_UHADD8: uhadd8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UHASX, ARM_INS_UHASX: uhasx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UHSAX, ARM_INS_UHSAX: uhsax${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UHSUB16, ARM_INS_UHSUB16: uhsub16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UHSUB8, ARM_INS_UHSUB8: uhsub8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UMAAL, ARM_INS_UMAAL: umaal${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UMLAL, ARM_INS_UMLAL: umlal${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UMULL, ARM_INS_UMULL: umull${p} $rdlo, $rdhi, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UQADD16, ARM_INS_UQADD16: uqadd16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UQADD8, ARM_INS_UQADD8: uqadd8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UQASX, ARM_INS_UQASX: uqasx${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UQSAX, ARM_INS_UQSAX: uqsax${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UQSUB16, ARM_INS_UQSUB16: uqsub16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UQSUB8, ARM_INS_UQSUB8: uqsub8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2USAD8, ARM_INS_USAD8: usad8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2USADA8, ARM_INS_USADA8: usada8${p} $rd, $rn, $rm, $ra */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2USAT, ARM_INS_USAT: usat${p} $rd, $sat_imm, $rn$sh */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2USAT16, ARM_INS_USAT16: usat16${p} $rd, $sat_imm, $rn */
+ { CS_AC_WRITE, CS_AC_IGNORE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2USAX, ARM_INS_USAX: usax${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2USUB16, ARM_INS_USUB16: usub16${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2USUB8, ARM_INS_USUB8: usub8${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UXTAB, ARM_INS_UXTAB: uxtab${p} $rd, $rn, $rm$rot */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UXTAB16, ARM_INS_UXTAB16: uxtab16${p} $rd, $rn, $rm$rot */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UXTAH, ARM_INS_UXTAH: uxtah${p} $rd, $rn, $rm$rot */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_t2UXTB, ARM_INS_UXTB: uxtb${p}.w $rd, $rm$rot */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2UXTB16, ARM_INS_UXTB16: uxtb16${p} $rd, $rm$rot */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_t2UXTH, ARM_INS_UXTH: uxth${p}.w $rd, $rm$rot */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_tADC, ARM_INS_ADC: adc${s}${p} $rdn, $rm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tADDhirr, ARM_INS_ADD: add${p} $rdn, $rm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tADDi3, ARM_INS_ADD: add${s}${p} $rd, $rm, $imm3 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tADDi8, ARM_INS_ADD: add${s}${p} $rdn, $imm8 */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_tADDrSP, ARM_INS_ADD: add${p} $rdn, $sp, $rn */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_tADDrSPi, ARM_INS_ADD: add${p} $dst, $sp, $imm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tADDrr, ARM_INS_ADD: add${s}${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_tADDspi, ARM_INS_ADD: add${p} $rdn, $imm */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_tADDspr, ARM_INS_ADD: add${p} $rdn, $rm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tADR, ARM_INS_ADR: adr{$p} $rd, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_tAND, ARM_INS_AND: and${s}${p} $rdn, $rm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tASRri, ARM_INS_ASR: asr${s}${p} $rd, $rm, $imm5 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tASRrr, ARM_INS_ASR: asr${s}${p} $rdn, $rm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tB, ARM_INS_B: b${p} $target */
+ { 0 }
+},
+{ /* ARM_tBIC, ARM_INS_BIC: bic${s}${p} $rdn, $rm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tBKPT, ARM_INS_BKPT: bkpt $val */
+ { 0 }
+},
+{ /* ARM_tBL, ARM_INS_BL: bl${p} $func */
+ { 0 }
+},
+{ /* ARM_tBLXi, ARM_INS_BLX: blx${p} $func */
+ { 0 }
+},
+{ /* ARM_tBLXr, ARM_INS_BLX: blx${p} $func */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_tBX, ARM_INS_BX: bx${p} $rm */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_tBcc, ARM_INS_B: b${p} $target */
+ { 0 }
+},
+{ /* ARM_tCBNZ, ARM_INS_CBNZ: cbnz $rn, $target */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_tCBZ, ARM_INS_CBZ: cbz $rn, $target */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_tCMNz, ARM_INS_CMN: cmn${p} $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_tCMPhir, ARM_INS_CMP: cmp${p} $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_tCMPi8, ARM_INS_CMP: cmp${p} $rn, $imm8 */
+ { CS_AC_READ, 0 }
+},
+{ /* ARM_tCMPr, ARM_INS_CMP: cmp${p} $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_tCPS, ARM_INS_CPS: cps$imod $iflags */
+ { 0 }
+},
+{ /* ARM_tEOR, ARM_INS_EOR: eor${s}${p} $rdn, $rm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tHINT, ARM_INS_HINT: hint${p} $imm */
+ { 0 }
+},
+{ /* ARM_tHLT, ARM_INS_HLT: hlt $val */
+ { 0 }
+},
+{ /* ARM_tLDMIA, ARM_INS_LDM: ldm${p} $rn, $regs */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_tLDRBi, ARM_INS_LDRB: ldrb${p} $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_tLDRBr, ARM_INS_LDRB: ldrb${p} $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_tLDRHi, ARM_INS_LDRH: ldrh${p} $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_tLDRHr, ARM_INS_LDRH: ldrh${p} $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_tLDRSB, ARM_INS_LDRSB: ldrsb${p} $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_tLDRSH, ARM_INS_LDRSH: ldrsh${p} $rt, $addr */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_tLDRi, ARM_INS_LDR: ldr${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tLDRpci, ARM_INS_LDR: ldr${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tLDRr, ARM_INS_LDR: ldr${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tLDRspi, ARM_INS_LDR: ldr${p} $rt, $addr */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tLSLri, ARM_INS_LSL: lsl${s}${p} $rd, $rm, $imm5 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tLSLrr, ARM_INS_LSL: lsl${s}${p} $rdn, $rm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tLSRri, ARM_INS_LSR: lsr${s}${p} $rd, $rm, $imm5 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tLSRrr, ARM_INS_LSR: lsr${s}${p} $rdn, $rm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tMOVSr, ARM_INS_MOV: movs $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tMOVi8, ARM_INS_MOV: mov${s}${p} $rd, $imm8 */
+ { CS_AC_WRITE, 0 }
+},
+{ /* ARM_tMOVr, ARM_INS_MOV: mov${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tMUL, ARM_INS_MUL: mul${s}${p} $rd, $rn, $rm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_tMVN, ARM_INS_MVN: mvn${s}${p} $rd, $rn */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tORR, ARM_INS_ORR: orr${s}${p} $rdn, $rm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tPOP, ARM_INS_POP: pop${p} $regs */
+ { 0 }
+},
+{ /* ARM_tPUSH, ARM_INS_PUSH: push${p} $regs */
+ { 0 }
+},
+{ /* ARM_tREV, ARM_INS_REV: rev${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tREV16, ARM_INS_REV16: rev16${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tREVSH, ARM_INS_REVSH: revsh${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tROR, ARM_INS_ROR: ror${s}${p} $rdn, $rm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tRSB, ARM_INS_RSB: rsb${s}${p} $rd, $rn, #0 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tSBC, ARM_INS_SBC: sbc${s}${p} $rdn, $rm */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tSETEND, ARM_INS_SETEND: setend $end */
+ { 0 }
+},
+{ /* ARM_tSTMIA_UPD, ARM_INS_STM: stm${p} $rn!, $regs */
+ { CS_AC_READ | CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tSTRBi, ARM_INS_STRB: strb${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_tSTRBr, ARM_INS_STRB: strb${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_tSTRHi, ARM_INS_STRH: strh${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_tSTRHr, ARM_INS_STRH: strh${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_tSTRi, ARM_INS_STR: str${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_tSTRr, ARM_INS_STR: str${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_tSTRspi, ARM_INS_STR: str${p} $rt, $addr */
+ { CS_AC_READ, CS_AC_WRITE, 0 }
+},
+{ /* ARM_tSUBi3, ARM_INS_SUB: sub${s}${p} $rd, $rm, $imm3 */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tSUBi8, ARM_INS_SUB: sub${s}${p} $rdn, $imm8 */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_tSUBrr, ARM_INS_SUB: sub${s}${p} $rd, $rn, $rm */
+ { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_tSUBspi, ARM_INS_SUB: sub${p} $rdn, $imm */
+ { CS_AC_READ | CS_AC_WRITE, 0 }
+},
+{ /* ARM_tSVC, ARM_INS_SVC: svc${p} $imm */
+ { 0 }
+},
+{ /* ARM_tSXTB, ARM_INS_SXTB: sxtb${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tSXTH, ARM_INS_SXTH: sxth${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tTRAP, ARM_INS_TRAP: trap */
+ { 0 }
+},
+{ /* ARM_tTST, ARM_INS_TST: tst${p} $rn, $rm */
+ { CS_AC_READ, CS_AC_READ, 0 }
+},
+{ /* ARM_tUDF, ARM_INS_UDF: udf $imm8 */
+ { 0 }
+},
+{ /* ARM_tUXTB, ARM_INS_UXTB: uxtb${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},
+{ /* ARM_tUXTH, ARM_INS_UXTH: uxth${p} $rd, $rm */
+ { CS_AC_WRITE, CS_AC_READ, 0 }
+},