blob: cae11ceafc1eae68de89615bf5d97b11a2cfe7da [file] [log] [blame]
Nguyen Anh Quynh4d227792013-12-31 21:01:01 +08001#ifndef CS_PPC_H
2#define CS_PPC_H
3
4/* Capstone Disassembler Engine */
5/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013> */
6
7#ifdef __cplusplus
8extern "C" {
9#endif
10
11#include <stdint.h>
12#include <stdbool.h>
13
14
Nguyen Anh Quynh0b4c1232014-01-02 12:02:59 +080015//> PPC branch codes for some branch instructions
Nguyen Anh Quynh4d227792013-12-31 21:01:01 +080016typedef enum ppc_bc {
17 PPC_BC_LT = (0 << 5) | 12,
18 PPC_BC_LE = (1 << 5) | 4,
19 PPC_BC_EQ = (2 << 5) | 12,
20 PPC_BC_GE = (0 << 5) | 4,
21 PPC_BC_GT = (1 << 5) | 12,
22 PPC_BC_NE = (2 << 5) | 4,
23 PPC_BC_UN = (3 << 5) | 12,
24 PPC_BC_NU = (3 << 5) | 4,
25 PPC_BC_LT_MINUS = (0 << 5) | 14,
26 PPC_BC_LE_MINUS = (1 << 5) | 6,
27 PPC_BC_EQ_MINUS = (2 << 5) | 14,
28 PPC_BC_GE_MINUS = (0 << 5) | 6,
29 PPC_BC_GT_MINUS = (1 << 5) | 14,
30 PPC_BC_NE_MINUS = (2 << 5) | 6,
31 PPC_BC_UN_MINUS = (3 << 5) | 14,
32 PPC_BC_NU_MINUS = (3 << 5) | 6,
33 PPC_BC_LT_PLUS = (0 << 5) | 15,
34 PPC_BC_LE_PLUS = (1 << 5) | 7,
35 PPC_BC_EQ_PLUS = (2 << 5) | 15,
36 PPC_BC_GE_PLUS = (0 << 5) | 7,
37 PPC_BC_GT_PLUS = (1 << 5) | 15,
38 PPC_BC_NE_PLUS = (2 << 5) | 7,
39 PPC_BC_UN_PLUS = (3 << 5) | 15,
40 PPC_BC_NU_PLUS = (3 << 5) | 7
41} ppc_bc;
42
43//> Operand type for instruction's operands
44typedef enum ppc_op_type {
45 PPC_OP_INVALID = 0, // Uninitialized.
46 PPC_OP_REG, // Register operand.
47 PPC_OP_IMM, // Immediate operand.
48 PPC_OP_MEM, // Memory operand
49} ppc_op_type;
50
51// Instruction's operand referring to memory
52// This is associated with PPC_OP_MEM operand type above
53typedef struct ppc_op_mem {
54 unsigned int base; // base register
Nguyen Anh Quynh0b4c1232014-01-02 12:02:59 +080055 int32_t disp; // displacement/offset value
Nguyen Anh Quynh4d227792013-12-31 21:01:01 +080056} ppc_op_mem;
57
58// Instruction operand
59typedef struct cs_ppc_op {
60 ppc_op_type type; // operand type
61 union {
62 unsigned int reg; // register value for REG operand
Nguyen Anh Quynh0b4c1232014-01-02 12:02:59 +080063 int32_t imm; // immediate value for C-IMM or IMM operand
64 ppc_op_mem mem; // base/disp value for MEM operand
Nguyen Anh Quynh4d227792013-12-31 21:01:01 +080065 };
66} cs_ppc_op;
67
68// Instruction structure
69typedef struct cs_ppc {
70 // branch code for branch instructions
71 ppc_bc cc;
72
Nguyen Anh Quynh0b4c1232014-01-02 12:02:59 +080073 // if this is True, then this 'dot' insn updates CR0
74 bool update_cr0;
75
Nguyen Anh Quynh4d227792013-12-31 21:01:01 +080076 // Number of operands of this instruction,
77 // or 0 when instruction has no operand.
78 uint8_t op_count;
79 cs_ppc_op operands[8]; // operands for this instruction.
80} cs_ppc;
81
82//> PPC registers
83typedef enum ppc_reg {
84 PPC_REG_INVALID = 0,
Nguyen Anh Quynh0b4c1232014-01-02 12:02:59 +080085
Nguyen Anh Quynh4d227792013-12-31 21:01:01 +080086 // General purpose registers
87
Nguyen Anh Quynh0b4c1232014-01-02 12:02:59 +080088 PPC_REG_MAX, // <-- mark the end of the list of registers
Nguyen Anh Quynh4d227792013-12-31 21:01:01 +080089} ppc_reg;
90
91//> PPC instruction
92typedef enum ppc_insn {
93 PPC_INS_INVALID = 0,
Nguyen Anh Quynh0b4c1232014-01-02 12:02:59 +080094
95 PPC_INS_MAX, // <-- mark the end of the list of instructions
Nguyen Anh Quynh4d227792013-12-31 21:01:01 +080096} ppc_insn;
97
98//> Group of PPC instructions
99typedef enum ppc_insn_group {
100 PPC_GRP_INVALID = 0,
101
102 PPC_GRP_JUMP, // all jump instructions (conditional+direct+indirect jumps)
103
Nguyen Anh Quynh0b4c1232014-01-02 12:02:59 +0800104 PPC_GRP_MAX, // <-- mark the end of the list of groups
Nguyen Anh Quynh4d227792013-12-31 21:01:01 +0800105} ppc_insn_group;
106
107#ifdef __cplusplus
108}
109#endif
110
111#endif