Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 1 | //===-- X86ATTInstPrinter.cpp - AT&T assembly instruction printing --------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file includes code for rendering MCInst instances as AT&T-style |
| 11 | // assembly. |
| 12 | // |
| 13 | //===----------------------------------------------------------------------===// |
| 14 | |
Nguyen Anh Quynh | 8598a21 | 2014-05-14 11:26:41 +0800 | [diff] [blame] | 15 | /* Capstone Disassembly Engine */ |
| 16 | /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 */ |
| 17 | |
Nguyen Anh Quynh | f785026 | 2014-05-14 22:03:06 +0800 | [diff] [blame] | 18 | // this code is only relevant when DIET mode is disable |
| 19 | #if defined(CAPSTONE_HAS_X86) && !defined(CAPSTONE_DIET) |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 20 | |
| 21 | #include <ctype.h> |
| 22 | #include <inttypes.h> |
| 23 | #include <stdio.h> |
| 24 | #include <stdlib.h> |
| 25 | #include <string.h> |
| 26 | |
| 27 | #include "../../utils.h" |
| 28 | #include "../../MCInst.h" |
| 29 | #include "../../SStream.h" |
| 30 | #include "../../MCRegisterInfo.h" |
Nguyen Anh Quynh | f328f30 | 2014-01-20 09:47:21 +0800 | [diff] [blame] | 31 | #include "X86Mapping.h" |
Nguyen Anh Quynh | 0b69038 | 2014-08-13 13:01:50 +0800 | [diff] [blame^] | 32 | #include "X86BaseInfo.h" |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 33 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 34 | |
Nguyen Anh Quynh | e93179b | 2014-04-25 11:18:40 +0800 | [diff] [blame] | 35 | #define GET_INSTRINFO_ENUM |
| 36 | #ifdef CAPSTONE_X86_REDUCE |
| 37 | #include "X86GenInstrInfo_reduce.inc" |
| 38 | #else |
| 39 | #include "X86GenInstrInfo.inc" |
| 40 | #endif |
| 41 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 42 | static void printMemReference(MCInst *MI, unsigned Op, SStream *O); |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 43 | static void printOperand(MCInst *MI, unsigned OpNo, SStream *O); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 44 | |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 45 | |
| 46 | static void set_mem_access(MCInst *MI, bool status) |
| 47 | { |
| 48 | if (MI->csh->detail != CS_OPT_ON) |
| 49 | return; |
| 50 | |
| 51 | MI->csh->doing_mem = status; |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 52 | if (!status) |
| 53 | // done, create the next operand slot |
| 54 | MI->flat_insn->detail->x86.op_count++; |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 55 | } |
| 56 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 57 | static void printopaquemem(MCInst *MI, unsigned OpNo, SStream *O) |
| 58 | { |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 59 | printMemReference(MI, OpNo, O); |
| 60 | } |
| 61 | |
| 62 | static void printi8mem(MCInst *MI, unsigned OpNo, SStream *O) |
| 63 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 64 | MI->x86opsize = 1; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 65 | printMemReference(MI, OpNo, O); |
| 66 | } |
| 67 | |
| 68 | static void printi16mem(MCInst *MI, unsigned OpNo, SStream *O) |
| 69 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 70 | if (MI->Opcode == X86_BOUNDS16rm) |
| 71 | MI->x86opsize = 4; |
| 72 | else |
| 73 | MI->x86opsize = 2; |
| 74 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 75 | printMemReference(MI, OpNo, O); |
| 76 | } |
| 77 | |
| 78 | static void printi32mem(MCInst *MI, unsigned OpNo, SStream *O) |
| 79 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 80 | if (MI->Opcode == X86_BOUNDS32rm) |
| 81 | MI->x86opsize = 8; |
| 82 | else |
| 83 | MI->x86opsize = 4; |
| 84 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 85 | printMemReference(MI, OpNo, O); |
| 86 | } |
| 87 | |
| 88 | static void printi64mem(MCInst *MI, unsigned OpNo, SStream *O) |
| 89 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 90 | MI->x86opsize = 8; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 91 | printMemReference(MI, OpNo, O); |
| 92 | } |
| 93 | |
| 94 | static void printi128mem(MCInst *MI, unsigned OpNo, SStream *O) |
| 95 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 96 | MI->x86opsize = 16; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 97 | printMemReference(MI, OpNo, O); |
| 98 | } |
| 99 | |
Nguyen Anh Quynh | 59b5489 | 2014-03-27 10:54:44 +0800 | [diff] [blame] | 100 | #ifndef CAPSTONE_X86_REDUCE |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 101 | static void printi256mem(MCInst *MI, unsigned OpNo, SStream *O) |
| 102 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 103 | MI->x86opsize = 32; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 104 | printMemReference(MI, OpNo, O); |
| 105 | } |
| 106 | |
| 107 | static void printi512mem(MCInst *MI, unsigned OpNo, SStream *O) |
| 108 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 109 | MI->x86opsize = 64; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 110 | printMemReference(MI, OpNo, O); |
| 111 | } |
| 112 | |
| 113 | static void printf32mem(MCInst *MI, unsigned OpNo, SStream *O) |
| 114 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 115 | MI->x86opsize = 4; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 116 | printMemReference(MI, OpNo, O); |
| 117 | } |
| 118 | |
| 119 | static void printf64mem(MCInst *MI, unsigned OpNo, SStream *O) |
| 120 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 121 | MI->x86opsize = 8; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 122 | printMemReference(MI, OpNo, O); |
| 123 | } |
| 124 | |
| 125 | static void printf80mem(MCInst *MI, unsigned OpNo, SStream *O) |
| 126 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 127 | MI->x86opsize = 10; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 128 | printMemReference(MI, OpNo, O); |
| 129 | } |
| 130 | |
| 131 | static void printf128mem(MCInst *MI, unsigned OpNo, SStream *O) |
| 132 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 133 | MI->x86opsize = 16; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 134 | printMemReference(MI, OpNo, O); |
| 135 | } |
| 136 | |
| 137 | static void printf256mem(MCInst *MI, unsigned OpNo, SStream *O) |
| 138 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 139 | MI->x86opsize = 32; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 140 | printMemReference(MI, OpNo, O); |
| 141 | } |
| 142 | |
| 143 | static void printf512mem(MCInst *MI, unsigned OpNo, SStream *O) |
| 144 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 145 | MI->x86opsize = 64; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 146 | printMemReference(MI, OpNo, O); |
| 147 | } |
| 148 | |
Nguyen Anh Quynh | 9518148 | 2014-03-25 23:20:41 +0800 | [diff] [blame] | 149 | static void printSSECC(MCInst *MI, unsigned Op, SStream *OS) |
| 150 | { |
| 151 | int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0xf; |
| 152 | switch (Imm) { |
| 153 | default: break; // never reach |
Nguyen Anh Quynh | a62b9a0 | 2014-06-04 22:25:48 +0700 | [diff] [blame] | 154 | case 0: SStream_concat0(OS, "eq"); break; |
| 155 | case 1: SStream_concat0(OS, "lt"); break; |
| 156 | case 2: SStream_concat0(OS, "le"); break; |
| 157 | case 3: SStream_concat0(OS, "unord"); break; |
| 158 | case 4: SStream_concat0(OS, "neq"); break; |
| 159 | case 5: SStream_concat0(OS, "nlt"); break; |
| 160 | case 6: SStream_concat0(OS, "nle"); break; |
| 161 | case 7: SStream_concat0(OS, "ord"); break; |
| 162 | case 8: SStream_concat0(OS, "eq_uq"); break; |
| 163 | case 9: SStream_concat0(OS, "nge"); break; |
| 164 | case 0xa: SStream_concat0(OS, "ngt"); break; |
| 165 | case 0xb: SStream_concat0(OS, "false"); break; |
| 166 | case 0xc: SStream_concat0(OS, "neq_oq"); break; |
| 167 | case 0xd: SStream_concat0(OS, "ge"); break; |
| 168 | case 0xe: SStream_concat0(OS, "gt"); break; |
| 169 | case 0xf: SStream_concat0(OS, "true"); break; |
Nguyen Anh Quynh | 9518148 | 2014-03-25 23:20:41 +0800 | [diff] [blame] | 170 | } |
| 171 | } |
| 172 | |
| 173 | static void printAVXCC(MCInst *MI, unsigned Op, SStream *O) |
| 174 | { |
| 175 | int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x1f; |
| 176 | switch (Imm) { |
| 177 | default: break;//printf("Invalid avxcc argument!\n"); break; |
Nguyen Anh Quynh | a62b9a0 | 2014-06-04 22:25:48 +0700 | [diff] [blame] | 178 | case 0: SStream_concat0(O, "eq"); break; |
| 179 | case 1: SStream_concat0(O, "lt"); break; |
| 180 | case 2: SStream_concat0(O, "le"); break; |
| 181 | case 3: SStream_concat0(O, "unord"); break; |
| 182 | case 4: SStream_concat0(O, "neq"); break; |
| 183 | case 5: SStream_concat0(O, "nlt"); break; |
| 184 | case 6: SStream_concat0(O, "nle"); break; |
| 185 | case 7: SStream_concat0(O, "ord"); break; |
| 186 | case 8: SStream_concat0(O, "eq_uq"); break; |
| 187 | case 9: SStream_concat0(O, "nge"); break; |
| 188 | case 0xa: SStream_concat0(O, "ngt"); break; |
| 189 | case 0xb: SStream_concat0(O, "false"); break; |
| 190 | case 0xc: SStream_concat0(O, "neq_oq"); break; |
| 191 | case 0xd: SStream_concat0(O, "ge"); break; |
| 192 | case 0xe: SStream_concat0(O, "gt"); break; |
| 193 | case 0xf: SStream_concat0(O, "true"); break; |
| 194 | case 0x10: SStream_concat0(O, "eq_os"); break; |
| 195 | case 0x11: SStream_concat0(O, "lt_oq"); break; |
| 196 | case 0x12: SStream_concat0(O, "le_oq"); break; |
| 197 | case 0x13: SStream_concat0(O, "unord_s"); break; |
| 198 | case 0x14: SStream_concat0(O, "neq_us"); break; |
| 199 | case 0x15: SStream_concat0(O, "nlt_uq"); break; |
| 200 | case 0x16: SStream_concat0(O, "nle_uq"); break; |
| 201 | case 0x17: SStream_concat0(O, "ord_s"); break; |
| 202 | case 0x18: SStream_concat0(O, "eq_us"); break; |
| 203 | case 0x19: SStream_concat0(O, "nge_uq"); break; |
| 204 | case 0x1a: SStream_concat0(O, "ngt_uq"); break; |
| 205 | case 0x1b: SStream_concat0(O, "false_os"); break; |
| 206 | case 0x1c: SStream_concat0(O, "neq_os"); break; |
| 207 | case 0x1d: SStream_concat0(O, "ge_oq"); break; |
| 208 | case 0x1e: SStream_concat0(O, "gt_oq"); break; |
| 209 | case 0x1f: SStream_concat0(O, "true_us"); break; |
Nguyen Anh Quynh | 9518148 | 2014-03-25 23:20:41 +0800 | [diff] [blame] | 210 | } |
| 211 | } |
| 212 | |
| 213 | static void printRoundingControl(MCInst *MI, unsigned Op, SStream *O) |
| 214 | { |
| 215 | int64_t Imm = MCOperand_getImm(MCInst_getOperand(MI, Op)) & 0x3; |
| 216 | switch (Imm) { |
Nguyen Anh Quynh | 1a66fec | 2014-06-26 12:09:15 +0800 | [diff] [blame] | 217 | case 0: SStream_concat0(O, "{rn-sae}"); op_addAvxSae(MI); op_addAvxRoundingMode(MI, X86_AVX_RM_RN); break; |
| 218 | case 1: SStream_concat0(O, "{rd-sae}"); op_addAvxSae(MI); op_addAvxRoundingMode(MI, X86_AVX_RM_RD); break; |
| 219 | case 2: SStream_concat0(O, "{ru-sae}"); op_addAvxSae(MI); op_addAvxRoundingMode(MI, X86_AVX_RM_RU); break; |
| 220 | case 3: SStream_concat0(O, "{rz-sae}"); op_addAvxSae(MI); op_addAvxRoundingMode(MI, X86_AVX_RM_RZ); break; |
Nguyen Anh Quynh | a62b9a0 | 2014-06-04 22:25:48 +0700 | [diff] [blame] | 221 | default: break; // nev0er reach |
Nguyen Anh Quynh | 9518148 | 2014-03-25 23:20:41 +0800 | [diff] [blame] | 222 | } |
| 223 | } |
| 224 | |
| 225 | #endif |
| 226 | |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 227 | static void printRegName(SStream *OS, unsigned RegNo); |
| 228 | |
| 229 | // local printOperand, without updating public operands |
| 230 | static void _printOperand(MCInst *MI, unsigned OpNo, SStream *O) |
| 231 | { |
| 232 | MCOperand *Op = MCInst_getOperand(MI, OpNo); |
| 233 | if (MCOperand_isReg(Op)) { |
| 234 | printRegName(O, MCOperand_getReg(Op)); |
| 235 | } else if (MCOperand_isImm(Op)) { |
| 236 | // Print X86 immediates as signed values. |
| 237 | int64_t imm = MCOperand_getImm(Op); |
| 238 | if (imm < 0) { |
| 239 | if (imm < -HEX_THRESHOLD) |
| 240 | SStream_concat(O, "$-0x%"PRIx64, -imm); |
| 241 | else |
| 242 | SStream_concat(O, "$-%"PRIu64, -imm); |
| 243 | } else { |
| 244 | if (imm > HEX_THRESHOLD) |
| 245 | SStream_concat(O, "$0x%"PRIx64, imm); |
| 246 | else |
| 247 | SStream_concat(O, "$%"PRIu64, imm); |
| 248 | } |
| 249 | } |
| 250 | } |
| 251 | |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 252 | static void printSrcIdx(MCInst *MI, unsigned Op, SStream *O) |
| 253 | { |
| 254 | MCOperand *SegReg; |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 255 | int reg; |
| 256 | |
| 257 | if (MI->csh->detail) { |
| 258 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; |
| 259 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; |
| 260 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID; |
| 261 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_REG_INVALID; |
| 262 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_REG_INVALID; |
| 263 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; |
| 264 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; |
| 265 | } |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 266 | |
| 267 | SegReg = MCInst_getOperand(MI, Op+1); |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 268 | reg = MCOperand_getReg(SegReg); |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 269 | |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 270 | // If this has a segment register, print it. |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 271 | if (reg) { |
| 272 | _printOperand(MI, Op+1, O); |
| 273 | if (MI->csh->detail) { |
| 274 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = reg; |
| 275 | } |
| 276 | |
Nguyen Anh Quynh | a62b9a0 | 2014-06-04 22:25:48 +0700 | [diff] [blame] | 277 | SStream_concat0(O, ":"); |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 278 | } |
| 279 | |
Nguyen Anh Quynh | a62b9a0 | 2014-06-04 22:25:48 +0700 | [diff] [blame] | 280 | SStream_concat0(O, "("); |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 281 | set_mem_access(MI, true); |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 282 | |
| 283 | printOperand(MI, Op, O); |
| 284 | |
Nguyen Anh Quynh | 1e688d4 | 2014-06-18 14:28:55 +0800 | [diff] [blame] | 285 | SStream_concat0(O, ")"); |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 286 | set_mem_access(MI, false); |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 287 | } |
| 288 | |
| 289 | static void printDstIdx(MCInst *MI, unsigned Op, SStream *O) |
| 290 | { |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 291 | if (MI->csh->detail) { |
| 292 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; |
| 293 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; |
| 294 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID; |
| 295 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_REG_INVALID; |
| 296 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_REG_INVALID; |
| 297 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; |
| 298 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; |
| 299 | } |
| 300 | |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 301 | // DI accesses are always ES-based on non-64bit mode |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 302 | if (MI->csh->mode != CS_MODE_64) { |
Nguyen Anh Quynh | 1e688d4 | 2014-06-18 14:28:55 +0800 | [diff] [blame] | 303 | SStream_concat0(O, "%es:("); |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 304 | if (MI->csh->detail) { |
| 305 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_ES; |
| 306 | } |
| 307 | } else |
Nguyen Anh Quynh | 1e688d4 | 2014-06-18 14:28:55 +0800 | [diff] [blame] | 308 | SStream_concat0(O, "("); |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 309 | |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 310 | set_mem_access(MI, true); |
| 311 | |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 312 | printOperand(MI, Op, O); |
| 313 | |
Nguyen Anh Quynh | 1e688d4 | 2014-06-18 14:28:55 +0800 | [diff] [blame] | 314 | SStream_concat0(O, ")"); |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 315 | set_mem_access(MI, false); |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 316 | } |
| 317 | |
| 318 | static void printSrcIdx8(MCInst *MI, unsigned OpNo, SStream *O) |
| 319 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 320 | MI->x86opsize = 1; |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 321 | printSrcIdx(MI, OpNo, O); |
| 322 | } |
| 323 | |
| 324 | static void printSrcIdx16(MCInst *MI, unsigned OpNo, SStream *O) |
| 325 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 326 | MI->x86opsize = 2; |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 327 | printSrcIdx(MI, OpNo, O); |
| 328 | } |
| 329 | |
| 330 | static void printSrcIdx32(MCInst *MI, unsigned OpNo, SStream *O) |
| 331 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 332 | MI->x86opsize = 4; |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 333 | printSrcIdx(MI, OpNo, O); |
| 334 | } |
| 335 | |
| 336 | static void printSrcIdx64(MCInst *MI, unsigned OpNo, SStream *O) |
| 337 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 338 | MI->x86opsize = 8; |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 339 | printSrcIdx(MI, OpNo, O); |
| 340 | } |
| 341 | |
| 342 | static void printDstIdx8(MCInst *MI, unsigned OpNo, SStream *O) |
| 343 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 344 | MI->x86opsize = 1; |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 345 | printDstIdx(MI, OpNo, O); |
| 346 | } |
| 347 | |
| 348 | static void printDstIdx16(MCInst *MI, unsigned OpNo, SStream *O) |
| 349 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 350 | MI->x86opsize = 2; |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 351 | printDstIdx(MI, OpNo, O); |
| 352 | } |
| 353 | |
| 354 | static void printDstIdx32(MCInst *MI, unsigned OpNo, SStream *O) |
| 355 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 356 | MI->x86opsize = 4; |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 357 | printDstIdx(MI, OpNo, O); |
| 358 | } |
| 359 | |
| 360 | static void printDstIdx64(MCInst *MI, unsigned OpNo, SStream *O) |
| 361 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 362 | MI->x86opsize = 8; |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 363 | printDstIdx(MI, OpNo, O); |
| 364 | } |
| 365 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 366 | static void printMemOffset(MCInst *MI, unsigned Op, SStream *O) |
| 367 | { |
| 368 | MCOperand *DispSpec = MCInst_getOperand(MI, Op); |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 369 | MCOperand *SegReg = MCInst_getOperand(MI, Op+1); |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 370 | int reg; |
Nguyen Anh Quynh | 13f40d2 | 2014-02-07 22:06:33 +0800 | [diff] [blame] | 371 | |
Nguyen Anh Quynh | 42c6b1a | 2013-12-30 00:15:25 +0800 | [diff] [blame] | 372 | if (MI->csh->detail) { |
Nguyen Anh Quynh | 5329a6f | 2014-06-08 23:35:52 +0700 | [diff] [blame] | 373 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 374 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 375 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID; |
Nguyen Anh Quynh | 5329a6f | 2014-06-08 23:35:52 +0700 | [diff] [blame] | 376 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_REG_INVALID; |
| 377 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_REG_INVALID; |
| 378 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; |
| 379 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; |
Nguyen Anh Quynh | a209e67 | 2013-12-14 00:23:41 +0800 | [diff] [blame] | 380 | } |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 381 | |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 382 | // If this has a segment register, print it. |
| 383 | reg = MCOperand_getReg(SegReg); |
| 384 | if (reg) { |
| 385 | _printOperand(MI, Op + 1, O); |
| 386 | SStream_concat0(O, ":"); |
| 387 | if (MI->csh->detail) { |
| 388 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = reg; |
| 389 | } |
| 390 | } |
| 391 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 392 | if (MCOperand_isImm(DispSpec)) { |
| 393 | int64_t imm = MCOperand_getImm(DispSpec); |
Nguyen Anh Quynh | 42c6b1a | 2013-12-30 00:15:25 +0800 | [diff] [blame] | 394 | if (MI->csh->detail) |
Nguyen Anh Quynh | 5329a6f | 2014-06-08 23:35:52 +0700 | [diff] [blame] | 395 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = imm; |
Nguyen Anh Quynh | 4fe4281 | 2013-12-13 12:26:26 +0800 | [diff] [blame] | 396 | if (imm < 0) { |
Nguyen Anh Quynh | 6d3d800 | 2014-03-29 17:26:51 +0800 | [diff] [blame] | 397 | SStream_concat(O, "0x%"PRIx64, arch_masks[MI->csh->mode] & imm); |
Nguyen Anh Quynh | 4fe4281 | 2013-12-13 12:26:26 +0800 | [diff] [blame] | 398 | } else { |
Nguyen Anh Quynh | f22557b | 2013-12-13 09:37:52 +0800 | [diff] [blame] | 399 | if (imm > HEX_THRESHOLD) |
| 400 | SStream_concat(O, "0x%"PRIx64, imm); |
| 401 | else |
| 402 | SStream_concat(O, "%"PRIu64, imm); |
| 403 | } |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 404 | } |
| 405 | |
Nguyen Anh Quynh | 42c6b1a | 2013-12-30 00:15:25 +0800 | [diff] [blame] | 406 | if (MI->csh->detail) |
Nguyen Anh Quynh | 5329a6f | 2014-06-08 23:35:52 +0700 | [diff] [blame] | 407 | MI->flat_insn->detail->x86.op_count++; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 408 | } |
| 409 | |
| 410 | static void printMemOffs8(MCInst *MI, unsigned OpNo, SStream *O) |
| 411 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 412 | MI->x86opsize = 1; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 413 | printMemOffset(MI, OpNo, O); |
| 414 | } |
| 415 | |
| 416 | static void printMemOffs16(MCInst *MI, unsigned OpNo, SStream *O) |
| 417 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 418 | MI->x86opsize = 2; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 419 | printMemOffset(MI, OpNo, O); |
| 420 | } |
| 421 | |
| 422 | static void printMemOffs32(MCInst *MI, unsigned OpNo, SStream *O) |
| 423 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 424 | MI->x86opsize = 4; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 425 | printMemOffset(MI, OpNo, O); |
| 426 | } |
| 427 | |
| 428 | static void printMemOffs64(MCInst *MI, unsigned OpNo, SStream *O) |
| 429 | { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 430 | MI->x86opsize = 8; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 431 | printMemOffset(MI, OpNo, O); |
| 432 | } |
| 433 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 434 | /// printPCRelImm - This is used to print an immediate value that ends up |
| 435 | /// being encoded as a pc-relative value (e.g. for jumps and calls). These |
| 436 | /// print slightly differently than normal immediates. For example, a $ is not |
| 437 | /// emitted. |
| 438 | static void printPCRelImm(MCInst *MI, unsigned OpNo, SStream *O) |
| 439 | { |
| 440 | MCOperand *Op = MCInst_getOperand(MI, OpNo); |
| 441 | if (MCOperand_isImm(Op)) { |
Nguyen Anh Quynh | 5329a6f | 2014-06-08 23:35:52 +0700 | [diff] [blame] | 442 | int64_t imm = MCOperand_getImm(Op) + MI->flat_insn->size + MI->address; |
Nguyen Anh Quynh | 4fe4281 | 2013-12-13 12:26:26 +0800 | [diff] [blame] | 443 | if (imm < 0) { |
Nguyen Anh Quynh | 017df60 | 2014-03-20 15:38:51 +0800 | [diff] [blame] | 444 | if (imm < -HEX_THRESHOLD) |
Nguyen Anh Quynh | 4fe4281 | 2013-12-13 12:26:26 +0800 | [diff] [blame] | 445 | SStream_concat(O, "-0x%"PRIx64, -imm); |
| 446 | else |
| 447 | SStream_concat(O, "-%"PRIu64, -imm); |
| 448 | } else { |
Nguyen Anh Quynh | 2d34251 | 2014-05-11 15:33:11 +0800 | [diff] [blame] | 449 | // handle 16bit segment bound |
| 450 | if (MI->csh->mode == CS_MODE_16 && imm > 0x100000) |
| 451 | imm -= 0x10000; |
| 452 | |
Nguyen Anh Quynh | f22557b | 2013-12-13 09:37:52 +0800 | [diff] [blame] | 453 | if (imm > HEX_THRESHOLD) |
| 454 | SStream_concat(O, "0x%"PRIx64, imm); |
| 455 | else |
| 456 | SStream_concat(O, "%"PRIu64, imm); |
| 457 | } |
Nguyen Anh Quynh | 42c6b1a | 2013-12-30 00:15:25 +0800 | [diff] [blame] | 458 | if (MI->csh->detail) { |
Nguyen Anh Quynh | 5329a6f | 2014-06-08 23:35:52 +0700 | [diff] [blame] | 459 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_IMM; |
Nguyen Anh Quynh | f1ec526 | 2014-06-25 22:03:18 +0800 | [diff] [blame] | 460 | MI->has_imm = 1; |
Nguyen Anh Quynh | 5329a6f | 2014-06-08 23:35:52 +0700 | [diff] [blame] | 461 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].imm = imm; |
| 462 | MI->flat_insn->detail->x86.op_count++; |
Nguyen Anh Quynh | a209e67 | 2013-12-14 00:23:41 +0800 | [diff] [blame] | 463 | } |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 464 | } |
| 465 | } |
| 466 | |
| 467 | static void printOperand(MCInst *MI, unsigned OpNo, SStream *O) |
| 468 | { |
| 469 | MCOperand *Op = MCInst_getOperand(MI, OpNo); |
| 470 | if (MCOperand_isReg(Op)) { |
| 471 | printRegName(O, MCOperand_getReg(Op)); |
Nguyen Anh Quynh | 42c6b1a | 2013-12-30 00:15:25 +0800 | [diff] [blame] | 472 | if (MI->csh->detail) { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 473 | unsigned int reg = MCOperand_getReg(Op); |
| 474 | if (MI->csh->doing_mem) { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 475 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = reg; |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 476 | } else { |
| 477 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_REG; |
| 478 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].reg = reg; |
| 479 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->csh->regsize_map[reg]; |
| 480 | MI->flat_insn->detail->x86.op_count++; |
| 481 | } |
Nguyen Anh Quynh | a209e67 | 2013-12-14 00:23:41 +0800 | [diff] [blame] | 482 | } |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 483 | } else if (MCOperand_isImm(Op)) { |
| 484 | // Print X86 immediates as signed values. |
| 485 | int64_t imm = MCOperand_getImm(Op); |
Nguyen Anh Quynh | 94990c9 | 2013-12-13 15:56:08 +0800 | [diff] [blame] | 486 | if (imm >= 0) { |
Nguyen Anh Quynh | be90639 | 2013-12-13 15:37:57 +0800 | [diff] [blame] | 487 | if (imm > HEX_THRESHOLD) |
Nguyen Anh Quynh | 1e688d4 | 2014-06-18 14:28:55 +0800 | [diff] [blame] | 488 | SStream_concat(O, "$0x%"PRIx64, imm); |
Nguyen Anh Quynh | be90639 | 2013-12-13 15:37:57 +0800 | [diff] [blame] | 489 | else |
Nguyen Anh Quynh | 1e688d4 | 2014-06-18 14:28:55 +0800 | [diff] [blame] | 490 | SStream_concat(O, "$%"PRIu64, imm); |
Nguyen Anh Quynh | be90639 | 2013-12-13 15:37:57 +0800 | [diff] [blame] | 491 | } else { |
Nguyen Anh Quynh | 81a6df4 | 2014-04-01 07:23:39 +0800 | [diff] [blame] | 492 | if (imm < -HEX_THRESHOLD) |
Nguyen Anh Quynh | 1e688d4 | 2014-06-18 14:28:55 +0800 | [diff] [blame] | 493 | SStream_concat(O, "$-0x%"PRIx64, -imm); |
Nguyen Anh Quynh | 81a6df4 | 2014-04-01 07:23:39 +0800 | [diff] [blame] | 494 | else |
Nguyen Anh Quynh | 1e688d4 | 2014-06-18 14:28:55 +0800 | [diff] [blame] | 495 | SStream_concat(O, "$-%"PRIu64, -imm); |
Nguyen Anh Quynh | be90639 | 2013-12-13 15:37:57 +0800 | [diff] [blame] | 496 | } |
Nguyen Anh Quynh | 42c6b1a | 2013-12-30 00:15:25 +0800 | [diff] [blame] | 497 | if (MI->csh->detail) { |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 498 | if (MI->csh->doing_mem) { |
| 499 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 500 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = imm; |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 501 | } else { |
| 502 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_IMM; |
Nguyen Anh Quynh | f1ec526 | 2014-06-25 22:03:18 +0800 | [diff] [blame] | 503 | MI->has_imm = 1; |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 504 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].imm = imm; |
| 505 | MI->flat_insn->detail->x86.op_count++; |
| 506 | } |
Nguyen Anh Quynh | a209e67 | 2013-12-14 00:23:41 +0800 | [diff] [blame] | 507 | } |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 508 | } |
| 509 | } |
| 510 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 511 | static void printMemReference(MCInst *MI, unsigned Op, SStream *O) |
| 512 | { |
Nguyen Anh Quynh | 0b69038 | 2014-08-13 13:01:50 +0800 | [diff] [blame^] | 513 | MCOperand *BaseReg = MCInst_getOperand(MI, Op + X86_AddrBaseReg); |
| 514 | MCOperand *IndexReg = MCInst_getOperand(MI, Op + X86_AddrIndexReg); |
| 515 | MCOperand *DispSpec = MCInst_getOperand(MI, Op + X86_AddrDisp); |
| 516 | MCOperand *SegReg = MCInst_getOperand(MI, Op + X86_AddrSegmentReg); |
Nguyen Anh Quynh | bb0744d | 2014-05-12 13:41:49 +0800 | [diff] [blame] | 517 | uint64_t ScaleVal; |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 518 | int reg; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 519 | |
Nguyen Anh Quynh | 42c6b1a | 2013-12-30 00:15:25 +0800 | [diff] [blame] | 520 | if (MI->csh->detail) { |
Nguyen Anh Quynh | 5329a6f | 2014-06-08 23:35:52 +0700 | [diff] [blame] | 521 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; |
Nguyen Anh Quynh | 1085073 | 2014-06-18 12:16:24 +0800 | [diff] [blame] | 522 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 523 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INVALID; |
Nguyen Anh Quynh | 5329a6f | 2014-06-08 23:35:52 +0700 | [diff] [blame] | 524 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = MCOperand_getReg(BaseReg); |
| 525 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = MCOperand_getReg(IndexReg); |
| 526 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; |
| 527 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; |
Nguyen Anh Quynh | a209e67 | 2013-12-14 00:23:41 +0800 | [diff] [blame] | 528 | } |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 529 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 530 | // If this has a segment register, print it. |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 531 | reg = MCOperand_getReg(SegReg); |
| 532 | if (reg) { |
Nguyen Anh Quynh | 0b69038 | 2014-08-13 13:01:50 +0800 | [diff] [blame^] | 533 | _printOperand(MI, Op + X86_AddrSegmentReg, O); |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 534 | if (MI->csh->detail) { |
| 535 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = reg; |
| 536 | } |
| 537 | |
Nguyen Anh Quynh | a62b9a0 | 2014-06-04 22:25:48 +0700 | [diff] [blame] | 538 | SStream_concat0(O, ":"); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 539 | } |
| 540 | |
| 541 | if (MCOperand_isImm(DispSpec)) { |
| 542 | int64_t DispVal = MCOperand_getImm(DispSpec); |
Nguyen Anh Quynh | 42c6b1a | 2013-12-30 00:15:25 +0800 | [diff] [blame] | 543 | if (MI->csh->detail) |
Nguyen Anh Quynh | 5329a6f | 2014-06-08 23:35:52 +0700 | [diff] [blame] | 544 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = DispVal; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 545 | if (DispVal || (!MCOperand_getReg(IndexReg) && !MCOperand_getReg(BaseReg))) { |
Nguyen Anh Quynh | 4fe4281 | 2013-12-13 12:26:26 +0800 | [diff] [blame] | 546 | if (DispVal < 0) { |
Nguyen Anh Quynh | 6d3d800 | 2014-03-29 17:26:51 +0800 | [diff] [blame] | 547 | SStream_concat(O, "0x%"PRIx64, arch_masks[MI->csh->mode] & DispVal); |
Nguyen Anh Quynh | 4fe4281 | 2013-12-13 12:26:26 +0800 | [diff] [blame] | 548 | } else { |
Nguyen Anh Quynh | f22557b | 2013-12-13 09:37:52 +0800 | [diff] [blame] | 549 | if (DispVal > HEX_THRESHOLD) |
| 550 | SStream_concat(O, "0x%"PRIx64, DispVal); |
| 551 | else |
| 552 | SStream_concat(O, "%"PRIu64, DispVal); |
| 553 | } |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 554 | } |
| 555 | } |
| 556 | |
| 557 | if (MCOperand_getReg(IndexReg) || MCOperand_getReg(BaseReg)) { |
Nguyen Anh Quynh | a62b9a0 | 2014-06-04 22:25:48 +0700 | [diff] [blame] | 558 | SStream_concat0(O, "("); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 559 | |
| 560 | if (MCOperand_getReg(BaseReg)) |
Nguyen Anh Quynh | 0b69038 | 2014-08-13 13:01:50 +0800 | [diff] [blame^] | 561 | _printOperand(MI, Op + X86_AddrBaseReg, O); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 562 | |
| 563 | if (MCOperand_getReg(IndexReg)) { |
Nguyen Anh Quynh | a62b9a0 | 2014-06-04 22:25:48 +0700 | [diff] [blame] | 564 | SStream_concat0(O, ", "); |
Nguyen Anh Quynh | 0b69038 | 2014-08-13 13:01:50 +0800 | [diff] [blame^] | 565 | _printOperand(MI, Op + X86_AddrIndexReg, O); |
| 566 | ScaleVal = MCOperand_getImm(MCInst_getOperand(MI, Op + X86_AddrScaleAmt)); |
Nguyen Anh Quynh | 42c6b1a | 2013-12-30 00:15:25 +0800 | [diff] [blame] | 567 | if (MI->csh->detail) |
Nguyen Anh Quynh | 5329a6f | 2014-06-08 23:35:52 +0700 | [diff] [blame] | 568 | MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = (int)ScaleVal; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 569 | if (ScaleVal != 1) { |
Nguyen Anh Quynh | 1e688d4 | 2014-06-18 14:28:55 +0800 | [diff] [blame] | 570 | SStream_concat(O, ", %u", ScaleVal); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 571 | } |
| 572 | } |
Nguyen Anh Quynh | a62b9a0 | 2014-06-04 22:25:48 +0700 | [diff] [blame] | 573 | SStream_concat0(O, ")"); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 574 | } |
| 575 | |
Nguyen Anh Quynh | 42c6b1a | 2013-12-30 00:15:25 +0800 | [diff] [blame] | 576 | if (MI->csh->detail) |
Nguyen Anh Quynh | 5329a6f | 2014-06-08 23:35:52 +0700 | [diff] [blame] | 577 | MI->flat_insn->detail->x86.op_count++; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 578 | } |
| 579 | |
| 580 | #include "X86InstPrinter.h" |
| 581 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 582 | #define GET_REGINFO_ENUM |
| 583 | #include "X86GenRegisterInfo.inc" |
| 584 | |
| 585 | // Include the auto-generated portion of the assembly writer. |
| 586 | #define PRINT_ALIAS_INSTR |
Nguyen Anh Quynh | 59b5489 | 2014-03-27 10:54:44 +0800 | [diff] [blame] | 587 | #ifdef CAPSTONE_X86_REDUCE |
| 588 | #include "X86GenAsmWriter_reduce.inc" |
Nguyen Anh Quynh | 9518148 | 2014-03-25 23:20:41 +0800 | [diff] [blame] | 589 | #else |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 590 | #include "X86GenAsmWriter.inc" |
Nguyen Anh Quynh | 9518148 | 2014-03-25 23:20:41 +0800 | [diff] [blame] | 591 | #endif |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 592 | |
| 593 | static void printRegName(SStream *OS, unsigned RegNo) |
| 594 | { |
Nguyen Anh Quynh | 1e688d4 | 2014-06-18 14:28:55 +0800 | [diff] [blame] | 595 | SStream_concat(OS, "%%%s", getRegisterName(RegNo)); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 596 | } |
| 597 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 598 | void X86_ATT_printInst(MCInst *MI, SStream *OS, void *info) |
| 599 | { |
Nguyen Anh Quynh | 27b9a96 | 2014-02-19 10:13:47 +0800 | [diff] [blame] | 600 | char *mnem; |
Nguyen Anh Quynh | 85cddef | 2014-02-18 11:59:36 +0800 | [diff] [blame] | 601 | x86_reg reg; |
Nguyen Anh Quynh | f1ec526 | 2014-06-25 22:03:18 +0800 | [diff] [blame] | 602 | int i; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 603 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 604 | // Try to print any aliases first. |
Nguyen Anh Quynh | 0b69038 | 2014-08-13 13:01:50 +0800 | [diff] [blame^] | 605 | mnem = printAliasInstr(MI, OS, info); |
Nguyen Anh Quynh | 27b9a96 | 2014-02-19 10:13:47 +0800 | [diff] [blame] | 606 | if (mnem) |
| 607 | cs_mem_free(mnem); |
| 608 | else |
Nguyen Anh Quynh | 0b69038 | 2014-08-13 13:01:50 +0800 | [diff] [blame^] | 609 | printInstruction(MI, OS, info); |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 610 | |
Nguyen Anh Quynh | f1ec526 | 2014-06-25 22:03:18 +0800 | [diff] [blame] | 611 | if (MI->has_imm) { |
| 612 | // if op_count > 1, then this operand's size is taken from the destination op |
| 613 | if (MI->flat_insn->detail->x86.op_count > 1) { |
| 614 | for (i = 0; i < MI->flat_insn->detail->x86.op_count; i++) { |
| 615 | if (MI->flat_insn->detail->x86.operands[i].type == X86_OP_IMM) |
| 616 | MI->flat_insn->detail->x86.operands[i].size = MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count - 1].size; |
| 617 | } |
| 618 | } else |
| 619 | MI->flat_insn->detail->x86.operands[0].size = MI->imm_size; |
| 620 | } |
| 621 | |
Nguyen Anh Quynh | 42c6b1a | 2013-12-30 00:15:25 +0800 | [diff] [blame] | 622 | if (MI->csh->detail) { |
Nguyen Anh Quynh | 85cddef | 2014-02-18 11:59:36 +0800 | [diff] [blame] | 623 | // special instruction needs to supply register op |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 624 | // first op can be embedded in the asm by llvm. |
| 625 | // so we have to add the missing register as the first operand |
| 626 | reg = X86_insn_reg_att(MCInst_getOpcode(MI)); |
Nguyen Anh Quynh | 85cddef | 2014-02-18 11:59:36 +0800 | [diff] [blame] | 627 | if (reg) { |
Nguyen Anh Quynh | 14ba46b | 2014-06-24 14:32:01 +0800 | [diff] [blame] | 628 | // shift all the ops right to leave 1st slot for this new register op |
| 629 | memmove(&(MI->flat_insn->detail->x86.operands[1]), &(MI->flat_insn->detail->x86.operands[0]), |
| 630 | sizeof(MI->flat_insn->detail->x86.operands[0]) * (ARR_SIZE(MI->flat_insn->detail->x86.operands) - 1)); |
| 631 | MI->flat_insn->detail->x86.operands[0].type = X86_OP_REG; |
| 632 | MI->flat_insn->detail->x86.operands[0].reg = reg; |
| 633 | MI->flat_insn->detail->x86.operands[0].size = MI->csh->regsize_map[reg]; |
| 634 | MI->flat_insn->detail->x86.op_count++; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 635 | } |
| 636 | } |
| 637 | } |
| 638 | |
Nguyen Anh Quynh | 8598a21 | 2014-05-14 11:26:41 +0800 | [diff] [blame] | 639 | #endif |