Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 1 | //===-- llvm/MC/MCInst.h - MCInst class -------------------------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file contains the declaration of the MCInst and MCOperand classes, which |
| 11 | // is the basic representation used to represent low-level machine code |
| 12 | // instructions. |
| 13 | // |
| 14 | //===----------------------------------------------------------------------===// |
| 15 | |
Nguyen Anh Quynh | 6023ef7 | 2014-04-29 11:21:04 +0800 | [diff] [blame] | 16 | /* Capstone Disassembly Engine */ |
| 17 | /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 */ |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 18 | |
Nguyen Anh Quynh | ae3649f | 2014-01-02 13:15:07 +0800 | [diff] [blame] | 19 | #ifndef CS_MCINST_H |
| 20 | #define CS_MCINST_H |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 21 | |
| 22 | #include <stdint.h> |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 23 | |
| 24 | #include "include/capstone.h" |
| 25 | |
| 26 | typedef struct MCInst MCInst; |
Nguyen Anh Quynh | 42c6b1a | 2013-12-30 00:15:25 +0800 | [diff] [blame] | 27 | typedef struct cs_struct cs_struct; |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 28 | typedef struct MCOperand MCOperand; |
| 29 | |
| 30 | /// MCOperand - Instances of this class represent operands of the MCInst class. |
| 31 | /// This is a simple discriminated union. |
| 32 | struct MCOperand { |
| 33 | enum { |
| 34 | kInvalid = 0, ///< Uninitialized. |
| 35 | kRegister, ///< Register operand. |
| 36 | kImmediate, ///< Immediate operand. |
| 37 | kFPImmediate, ///< Floating-point immediate operand. |
| 38 | } MachineOperandType; |
| 39 | unsigned char Kind; |
| 40 | |
| 41 | union { |
| 42 | unsigned RegVal; |
| 43 | int64_t ImmVal; |
| 44 | double FPImmVal; |
| 45 | }; |
| 46 | }; |
| 47 | |
| 48 | bool MCOperand_isValid(const MCOperand *op); |
| 49 | |
| 50 | bool MCOperand_isReg(const MCOperand *op); |
| 51 | |
| 52 | bool MCOperand_isImm(const MCOperand *op); |
| 53 | |
| 54 | bool MCOperand_isFPImm(const MCOperand *op); |
| 55 | |
| 56 | bool MCOperand_isInst(const MCOperand *op); |
| 57 | |
| 58 | void MCInst_clear(MCInst *m); |
| 59 | |
| 60 | /// getReg - Returns the register number. |
| 61 | unsigned MCOperand_getReg(const MCOperand *op); |
| 62 | |
| 63 | /// setReg - Set the register number. |
| 64 | void MCOperand_setReg(MCOperand *op, unsigned Reg); |
| 65 | |
| 66 | int64_t MCOperand_getImm(MCOperand *op); |
| 67 | |
| 68 | void MCOperand_setImm(MCOperand *op, int64_t Val); |
| 69 | |
| 70 | double MCOperand_getFPImm(const MCOperand *op); |
| 71 | |
| 72 | void MCOperand_setFPImm(MCOperand *op, double Val); |
| 73 | |
| 74 | const MCInst *MCOperand_getInst(const MCOperand *op); |
| 75 | |
| 76 | void MCOperand_setInst(MCOperand *op, const MCInst *Val); |
| 77 | |
| 78 | MCOperand *MCOperand_CreateReg(unsigned Reg); |
| 79 | |
| 80 | MCOperand *MCOperand_CreateImm(int64_t Val); |
| 81 | |
| 82 | MCOperand *MCOperand_CreateFPImm(double Val); |
| 83 | |
Nguyen Anh Quynh | 4fe224b | 2013-12-24 16:49:36 +0800 | [diff] [blame] | 84 | // NOTE: this structure is a flatten version of cs_insn struct |
| 85 | // Detail information of disassembled instruction |
| 86 | typedef struct cs_insn_flat { |
| 87 | // Instruction ID |
| 88 | // Find the instruction id from header file of corresponding architecture, |
| 89 | // such as arm.h for ARM, x86.h for X86, etc... |
| 90 | // This information is available even when CS_OPT_DETAIL = CS_OPT_OFF |
| 91 | unsigned int id; |
| 92 | |
| 93 | // Address (EIP) of this instruction |
| 94 | // This information is available even when CS_OPT_DETAIL = CS_OPT_OFF |
| 95 | uint64_t address; |
| 96 | |
| 97 | // Size of this instruction |
| 98 | // This information is available even when CS_OPT_DETAIL = CS_OPT_OFF |
| 99 | uint16_t size; |
| 100 | // Machine bytes of this instruction, with number of bytes indicated by @size above |
| 101 | // This information is available even when CS_OPT_DETAIL = CS_OPT_OFF |
| 102 | uint8_t bytes[16]; |
| 103 | |
| 104 | // Ascii text of instruction mnemonic |
| 105 | // This information is available even when CS_OPT_DETAIL = CS_OPT_OFF |
| 106 | char mnemonic[32]; |
| 107 | |
| 108 | // Ascii text of instruction operands |
| 109 | // This information is available even when CS_OPT_DETAIL = CS_OPT_OFF |
Nguyen Anh Quynh | 0636f68 | 2014-01-15 17:51:08 +0800 | [diff] [blame] | 110 | char op_str[160]; |
Nguyen Anh Quynh | 4fe224b | 2013-12-24 16:49:36 +0800 | [diff] [blame] | 111 | |
| 112 | // NOTE: All information below is not available when CS_OPT_DETAIL = CS_OPT_OFF |
| 113 | |
| 114 | uint8_t regs_read[12]; // list of implicit registers read by this insn |
| 115 | uint8_t regs_read_count; // number of implicit registers read by this insn |
| 116 | |
| 117 | uint8_t regs_write[20]; // list of implicit registers modified by this insn |
| 118 | uint8_t regs_write_count; // number of implicit registers modified by this insn |
| 119 | |
| 120 | uint8_t groups[8]; // list of group this instruction belong to |
| 121 | uint8_t groups_count; // number of groups this insn belongs to |
| 122 | |
| 123 | // Architecture-specific instruction info |
| 124 | union { |
| 125 | cs_x86 x86; // X86 architecture, including 16-bit, 32-bit & 64-bit mode |
| 126 | cs_arm64 arm64; // ARM64 architecture (aka AArch64) |
| 127 | cs_arm arm; // ARM architecture (including Thumb/Thumb2) |
| 128 | cs_mips mips; // MIPS architecture |
Nguyen Anh Quynh | 42c6b1a | 2013-12-30 00:15:25 +0800 | [diff] [blame] | 129 | cs_ppc ppc; // PowerPC architecture |
Nguyen Anh Quynh | 48a14ca | 2014-03-23 08:35:45 +0800 | [diff] [blame] | 130 | cs_sparc sparc; // Sparc architecture |
| 131 | cs_sysz sysz; // SystemZ architecture |
Nguyen Anh Quynh | c80d840 | 2014-05-26 23:02:48 +0800 | [diff] [blame] | 132 | cs_xcore xcore; // XCore architecture |
Nguyen Anh Quynh | 4fe224b | 2013-12-24 16:49:36 +0800 | [diff] [blame] | 133 | }; |
| 134 | } cs_insn_flat; |
| 135 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 136 | /// MCInst - Instances of this class represent a single low-level machine |
| 137 | /// instruction. |
| 138 | struct MCInst { |
| 139 | unsigned Opcode; |
| 140 | MCOperand Operands[32]; |
| 141 | unsigned size; // number of operands |
Nguyen Anh Quynh | 4fe224b | 2013-12-24 16:49:36 +0800 | [diff] [blame] | 142 | cs_insn_flat flat_insn; // insn to be exposed to public |
Nguyen Anh Quynh | 6b7abe3 | 2013-11-30 00:54:24 +0800 | [diff] [blame] | 143 | unsigned OpcodePub; |
Nguyen Anh Quynh | a209e67 | 2013-12-14 00:23:41 +0800 | [diff] [blame] | 144 | int insn_size; // instruction size |
Nguyen Anh Quynh | a209e67 | 2013-12-14 00:23:41 +0800 | [diff] [blame] | 145 | uint64_t address; // address of this insn |
Nguyen Anh Quynh | 42c6b1a | 2013-12-30 00:15:25 +0800 | [diff] [blame] | 146 | cs_struct *csh; // save the main csh |
Nguyen Anh Quynh | e51cf36 | 2014-03-27 12:36:46 +0800 | [diff] [blame] | 147 | uint8_t x86_imm_size; // save immediate size to print immediate properly |
Nguyen Anh Quynh | a5ffdc3 | 2014-05-07 08:25:24 +0800 | [diff] [blame] | 148 | |
| 149 | // (Optional) instruction prefix, which can be up to 5 bytes. |
| 150 | // A prefix byte gets value 0 when irrelevant. |
| 151 | // This is copied from cs_x86 struct |
| 152 | uint8_t x86_prefix[5]; |
Nguyen Anh Quynh | 45c77ae | 2014-05-07 11:39:41 +0800 | [diff] [blame] | 153 | bool x86_lock_rep; // does this X86 insn contain LOCK/REP prefix? |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 154 | }; |
| 155 | |
| 156 | void MCInst_Init(MCInst *inst); |
| 157 | |
| 158 | void MCInst_clear(MCInst *inst); |
| 159 | |
| 160 | void MCInst_insert(MCInst *inst, int index, MCOperand *Op); |
| 161 | |
| 162 | void MCInst_setOpcode(MCInst *inst, unsigned Op); |
| 163 | |
| 164 | unsigned MCInst_getOpcode(const MCInst*); |
| 165 | |
Nguyen Anh Quynh | 6b7abe3 | 2013-11-30 00:54:24 +0800 | [diff] [blame] | 166 | void MCInst_setOpcodePub(MCInst *inst, unsigned Op); |
| 167 | |
| 168 | unsigned MCInst_getOpcodePub(const MCInst*); |
| 169 | |
Nguyen Anh Quynh | 26ee41a | 2013-11-27 12:11:31 +0800 | [diff] [blame] | 170 | MCOperand *MCInst_getOperand(MCInst *inst, unsigned i); |
| 171 | |
| 172 | unsigned MCInst_getNumOperands(const MCInst *inst); |
| 173 | |
| 174 | int MCInst_addOperand(MCInst *inst, MCOperand *Op); |
| 175 | |
| 176 | // This addOperand2 function doesnt free Op |
| 177 | int MCInst_addOperand2(MCInst *inst, MCOperand *Op); |
| 178 | |
| 179 | #endif |