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gerrit-public.fairphone.software / platform / external / capstone / 05bd29492024698d04db2d556eaaf2a8e5393b03 / arch
  1. 4f412c4 Selectively disable AT&T syntax in non-diet mode to reduce library size by baguette · 10 years ago
  2. a726402 sparc: update core. this added/removed some instructions & groups. updated Python & Java bindings accordingly by Nguyen Anh Quynh · 10 years ago
  3. 2124b8a mips: indentations by Nguyen Anh Quynh · 10 years ago
  4. 159ddbd ppc: add new groups to group_name_maps[] by Nguyen Anh Quynh · 10 years ago
  5. 64f36d9 change '2013>' to 2013-2014 by Nguyen Anh Quynh · 10 years ago
  6. 91a6477 ppc: fix a mistake on interpreting CR registers by deleting CR8 -> CR31 by Nguyen Anh Quynh · 10 years ago
  7. dd3deec ppc: update core. this added new instructions, groups & registers. updated Python & Java bindings accordingly by Nguyen Anh Quynh · 10 years ago
  8. 0f0eb98 mips: update core. this added bunch of new instructions & groups. updated Python & Java bindings accordingly by Nguyen Anh Quynh · 10 years ago
  9. 7c089fd arm: add new mode CS_MODE_MCLASS for Cortex-M series. updated Python & Java bindings accordingly by Nguyen Anh Quynh · 10 years ago
  10. b52f11f arm: update core. this added a new instruction UDF. also updated Python+Java bindings accordingly by Nguyen Anh Quynh · 10 years ago
  11. 0b69038 x86: update core with upstream. this added bunch of new instructions & groups. also updated Python & Java bindings after the core change by Nguyen Anh Quynh · 10 years ago
  12. 4db4d9b xcore: fix an warning of unused array when DIET mode is enable by Nguyen Anh Quynh · 10 years ago
  13. 590f23a arm: do not need to initialize local variable opcode in DecodeRegListOperand() by Nguyen Anh Quynh · 10 years ago
  14. 0c235e1 arm: some simple improvements & cleanups by Nguyen Anh Quynh · 10 years ago
  15. 26dfbc6 fix indentation introduced by the latest merge. also move test_arm_regression.c into suite/arm/ and add Makefile for it by Nguyen Anh Quynh · 10 years ago
  16. 5d80678 Merge branch 'next' of https://github.com/flyingsymbols/capstone into arm by Nguyen Anh Quynh · 10 years ago
  17. 48eb7a6 x86: INTO is invalid in 64bit mode. bug reported by Pancake & Ange Albertini by Nguyen Anh Quynh · 10 years ago
  18. 298d413 * added a test file to suite for testing invalid and valid instruction sequences by flyingsymbols · 10 years ago
  19. 55cd996 sparc: initialize detail->sparc in Sparc_getInstruction. bug reported by Ben Nagy by Nguyen Anh Quynh · 10 years ago
  20. e1fc8a8 sparc: initialize detail->sparc in Sparc_getInstruction. bug reported by Ben Nagy by Nguyen Anh Quynh · 10 years ago
  21. 4d2eba7 systemz: initialize detail->sysz in SystemZ_getInstruction. bug reported by Ben Nagy by Nguyen Anh Quynh · 10 years ago
  22. 39d6b2f systemz: initialize detail->sysz in SystemZ_getInstruction. bug reported by Ben Nagy by Nguyen Anh Quynh · 10 years ago
  23. 650f96c add new API cs_group_name() to return group name in string, given the group id by Nguyen Anh Quynh · 10 years ago
  24. bb8bbaa x86: test reg, [mem] -> test [mem], reg. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 10 years ago
  25. dbdb61a x86: regs_write[] of RDTSC & RDTSCP depend on @mode by Nguyen Anh Quynh · 10 years ago
  26. 9f6ed71 x86: add @rex to cs_x86 struct. updated python & java binding for this change by Nguyen Anh Quynh · 10 years ago
  27. 32e2c6c x86: address-size prefix should override RIP relative address in x64 mode. bug reported by @hlide by Nguyen Anh Quynh · 10 years ago
  28. ed6b8c5 x86: address-size prefix should override RIP relative address in x64 mode. bug reported by @hlide by Nguyen Anh Quynh · 10 years ago
  29. 656ebc9 x86: handle RIP relative addressing in 64bit mode properly. bug reported by @hlide by Nguyen Anh Quynh · 10 years ago
  30. af6db2a x86: handle RIP relative addressing in 64bit mode properly. bug reported by @hlide by Nguyen Anh Quynh · 10 years ago
  31. 7ef3700 x86: SHL reg, 1 has one too many operands. bug reported by Sean Heelan by Nguyen Anh Quynh · 10 years ago
  32. 1a66fec x86: support avx_sae & avx_rm in cs_x86 struct. this also updates Python & Java bindings following the core's change by Nguyen Anh Quynh · 10 years ago
  33. 12e6e31 x86: rename zero_opmask of cs_x86_op to avx_zero_opmask by Nguyen Anh Quynh · 10 years ago
  34. 92a3d4c x86: add AVX's zero_opmask to cs_x86_op struct. updated Python & Java bindings for this change by Nguyen Anh Quynh · 10 years ago
  35. f1ec526 x86: provide size for X86_OP_IMM operand. thank Gabriel Quadros for some suggestions by Nguyen Anh Quynh · 10 years ago
  36. e1aba17 x86: fix all {cc} instructions to have correct instruction ID by Nguyen Anh Quynh · 10 years ago
  37. 4c5eabc x86: support SSE_CC & AVX_CC in cs_x86 struct. this also updates Python & Java bindings by Nguyen Anh Quynh · 10 years ago
  38. 0d71645 x86: add avx_bcast to cs_x86_op to support AVX512 instructions. this also updates Python & Java binding by Nguyen Anh Quynh · 10 years ago
  39. bb6440c x86: extend cs_x86.opcode to 4 bytes to contain EVEX opcode. this also updates Python binding following this interface change by Nguyen Anh Quynh · 10 years ago
  40. 15b746f x86: op_addReg() & op_addImm() only work when detail mode is ON by Nguyen Anh Quynh · 10 years ago
  41. c74ec28 x86: LEA for 16bit register should have pointer size of word, not dword. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 10 years ago
  42. 14ba46b x86: add segment to x86_op_mem struct. this fixes a bug in generating detail for instructions with segment override. bug reported by Sean Heelan. by Nguyen Anh Quynh · 10 years ago
  43. eb2f3fb x86: properly reset prefixPresent for prefix0/1 group by Nguyen Anh Quynh · 10 years ago
  44. 1e688d4 x86: do not use markup in AT&T syntax by Nguyen Anh Quynh · 10 years ago
  45. 46291c1 Merge branch 'next' into opsize by Nguyen Anh Quynh · 10 years ago
  46. 44db3c3 x86: support CS_OPT_MODE for dynamically changing mode at run-time by Nguyen Anh Quynh · 10 years ago
  47. cff0362 arm64: assign NULL to char pointer, not zero. bug reported by Coverity by Nguyen Anh Quynh · 10 years ago
  48. 1085073 x86: remove disp_size, imm_size, op_size. add size to each operand. thanks Gabriel Quadros for some nice ideas by Nguyen Anh Quynh · 10 years ago
  49. 73eb5d5 arm: op_addImm() is called only when detail mode is ON by Nguyen Anh Quynh · 10 years ago
  50. cae09bf replace offset_of with offsetof from stddef.h by Nguyen Anh Quynh · 10 years ago
  51. ebe2443 arm: some special instructions need to have numerical operand added manually in printInstruction() by Nguyen Anh Quynh · 10 years ago
  52. eccb9da arm64: zeroout a whole cs_arm64 struct of MCI in *getInstruction(). by Nguyen Anh Quynh · 10 years ago
  53. 73bbbb3 arm: add ASRS, LSRS, VCLE, VCLT instructions. update Python & Java bindings at the same time by Nguyen Anh Quynh · 10 years ago
  54. 8693fcd arm: correct operand setup for REG type in printAddrMode3OffsetOperand() by Nguyen Anh Quynh · 10 years ago
  55. 2a461ed arm: zeroout a whole cs_arm struct in *getInstruction(). this makes sure operand of REG type has shift type = 0 by default by Nguyen Anh Quynh · 10 years ago
  56. 9cf8811 x86: InternalInstruction@xAcquireRelease should be initialized to 0 (FALSE) by Nguyen Anh Quynh · 10 years ago
  57. 495295e MCInst_Init() is arch-independent by Nguyen Anh Quynh · 10 years ago
  58. 215e76b ppc: use MCInst_insert0() instead of MCInst_insert() to avoid malloc/free by Nguyen Anh Quynh · 10 years ago
  59. d06f3d6 xcore: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free by Nguyen Anh Quynh · 10 years ago
  60. 88fca42 xcore: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible by Nguyen Anh Quynh · 10 years ago
  61. 7062988 systemz: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free by Nguyen Anh Quynh · 10 years ago
  62. bddd215 systemz: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible by Nguyen Anh Quynh · 10 years ago
  63. 3d3b6ce sparc: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free by Nguyen Anh Quynh · 10 years ago
  64. 9b91de0 sparc: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible by Nguyen Anh Quynh · 10 years ago
  65. 7f945d3 ppc: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free by Nguyen Anh Quynh · 10 years ago
  66. 7f15f67 ppc: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible by Nguyen Anh Quynh · 10 years ago
  67. f08b83d mips: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free by Nguyen Anh Quynh · 10 years ago
  68. 0c764d4 mips: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible by Nguyen Anh Quynh · 10 years ago
  69. d489a67 arm64: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free by Nguyen Anh Quynh · 10 years ago
  70. cbb3358 arm64: use SStream_concat0() instead of SStream_concat() for simple string processing whenever possible by Nguyen Anh Quynh · 10 years ago
  71. 9678705 arm: convert MCOperand_CreateReg() to MCOperand_CreateReg0() to avoid malloc/free by Nguyen Anh Quynh · 10 years ago
  72. 748687d arm: convert the left-over MCOperand_CreateImm to MCOperand_CreateImm0 by Nguyen Anh Quynh · 10 years ago
  73. 0f648ea arm: use CreateImm0() & CreateReg0() to create MCOperand* to avoid using malloc/free to improve performance by Nguyen Anh Quynh · 10 years ago
  74. 8c1104b arm: do not use markup by Nguyen Anh Quynh · 10 years ago
  75. dd9225b arm: use SStream_concat0() for SStream_concat() whereever possible for better performance by Nguyen Anh Quynh · 10 years ago
  76. b95647d systemz & xcore: create details only when detail mode is ON. this fixes some crashes in tests/test by Nguyen Anh Quynh · 10 years ago
  77. 69582d7 initialize cs_insn.detail by properly zero-out right members for each arch by Nguyen Anh Quynh · 10 years ago
  78. 29fd0f6 fix all the code in other non-X86 archs after the change made by commit 5329a6ffd485ce4b06305c1b104df5a0adab57e6 by Nguyen Anh Quynh · 10 years ago
  79. 5329a6f directly update cs_insn from MCInst interface to avoid multiple memcpy() by Nguyen Anh Quynh · 10 years ago
  80. 8cae86c x86: copy prefix back after updating it in X86_lockrep() by Nguyen Anh Quynh · 10 years ago
  81. 22a5a76 x86: simplify byteReader_t by Nguyen Anh Quynh · 10 years ago
  82. 30c0659 optimize memset() of MCInst_Init() by Nguyen Anh Quynh · 10 years ago
  83. 5474d87 x86: optimize struct InternalInstruction for memset(). this improve performance by around 4% by Nguyen Anh Quynh · 10 years ago
  84. 0ad226e x86: fix a conflict when merging -next to -optimize branch by Nguyen Anh Quynh · 10 years ago
  85. cf08138 x86: more simplification on managing MCOperand. this also fixes a bug in handling memory reference instructions by Nguyen Anh Quynh · 10 years ago
  86. 0e534bf x86: correct the related comment of the last commit by Nguyen Anh Quynh · 10 years ago
  87. 9417ad6 x86: printDstIdx() should only print segment in non-64bit mode. bug reported by Filipe Cabecinhas (@filcab) by Nguyen Anh Quynh · 10 years ago
  88. e70a043 x86: more simplification for better performance by Nguyen Anh Quynh · 10 years ago
  89. 937e483 x86: avoid malloc/free MCOperand with new API of MCInst: MCInst_addOperand0, MCInst_CreateReg0, MCInst_CreateImm0 by Nguyen Anh Quynh · 10 years ago
  90. a62b9a0 x86: use SStream_concat0() where possible to improve performance - for AT&T and X86_REDUCE by Nguyen Anh Quynh · 10 years ago
  91. 46b6693 x86: save prefixes to avoid expensive copying loop. based on idea of Dang Hoang Vu by Nguyen Anh Quynh · 10 years ago
  92. b76233c avoid using vsnprintf when possible for SStream_concat() to improve performance. based on the idea of Dang Hoang Vu. by Nguyen Anh Quynh · 10 years ago
  93. 368c45b x86 instruction groups: Add SYSEXIT and SYSRET to the X86_GRP_IRET group by Jay Oster · 10 years ago
  94. a19d3f0 Merge branch 'feature/x86-groups' of https://github.com/parasyte/capstone into test by Nguyen Anh Quynh · 10 years ago
  95. 6b00344 x86 instruction groups: Fix RET/IRET mapping. by Jay Oster · 10 years ago
  96. 0577bb7 x86: ATT syntax does not print word size pointer like Intel syntax by Nguyen Anh Quynh · 10 years ago
  97. 6f74ccc Add new x86 instruction groups by Jay Oster · 10 years ago
  98. c70442e arm: shift info associates with the right op in LDR instruction. bug reported by Daniel Colascione by Nguyen Anh Quynh · 10 years ago
  99. a04ee4f arm: add missing the check for detail mode in the last commit by Nguyen Anh Quynh · 10 years ago
  100. b79d915 arm: add missing operand info for Thumb instruction vldr. bug reported by Daniel Colascione by Nguyen Anh Quynh · 10 years ago