- 2c24d88 fixed bug that prevented using md.detail = true and md.skipdata = true together by Maciej Szawlowski · 10 years ago
- 07526e9 arm: Thumb BL & BLX read ARM_REG_PC instead of ARM_REG_SP. by derrek · 10 years ago
- c51e04f x86: support CR9-CR15 registers by Nguyen Anh Quynh · 10 years ago
- db684b2 arm: BL & BLX do not read SP, but PC register. issue reported by Der Rek by Nguyen Anh Quynh · 10 years ago
- 7ca66a4 bump package version to 3.0.1 by Nguyen Anh Quynh · 10 years ago
- 9f694cc x86: handle undocumented immediates for (v)cmpps/pd/ss/sd instructions by Nguyen Anh Quynh · 10 years ago
- d319c11 x86: more encodings for FXCH & FCOMP. also print LJUMP without * as prefix for Intel syntax. handle BOUND & FARCALL better by Nguyen Anh Quynh · 10 years ago
- 5f8c423 x86: add missing CR8-CR15 registers to arch/X86/X86DisassemblerDecoder.h by Nguyen Anh Quynh · 10 years ago
- 2ac7941 x86: handle REX properly for segment related instructions by ignoring REX.r entirely by Nguyen Anh Quynh · 10 years ago
- 80959c9 code style by Nguyen Anh Quynh · 10 years ago
- 0948114 x86: handle REX properly for x64 MMX related instructions by ignoring REX.b & REX.w entirely by Nguyen Anh Quynh · 10 years ago
- c9c3fdc arm64: print ADR with absolute address. bug reported by blackboxer123 by Nguyen Anh Quynh · 10 years ago
- 5175423 x86: check instruction size <=15 as soon as possible by Nguyen Anh Quynh · 10 years ago
- 3539595 x86: instruction length must be <= 15 by Nguyen Anh Quynh · 10 years ago
- a3d689d x86: allow to mix REX & legacy prefix repeatedly in any order by Nguyen Anh Quynh · 10 years ago
- 674db4c ppc: fix some compilation bugs when DIET mode is enable by Nguyen Anh Quynh · 10 years ago
- 10ecdae x86: support some new instructions or new encodings of some new instructions: MOVSXD, FXCH, FCOM, FCOMP, FSTP, FSTPNCE, NOP by Nguyen Anh Quynh · 10 years ago
- 145efa5 Merge branch 'next' into rex by Nguyen Anh Quynh · 10 years ago
- 2537cfd python: fix a memory leak issue when we stop enumeration over the disassembled instructions prematurely. patch by Jan Newger by Nguyen Anh Quynh · 10 years ago
- 58831e8 Merge branch 'next' into rex by Nguyen Anh Quynh · 10 years ago
- 611b0c5 code style by Nguyen Anh Quynh · 10 years ago
- dfde75c Merge branch 'out_of_mem_fix' of https://github.com/nedwill/capstone into next by Nguyen Anh Quynh · 10 years ago
- f1e4975 check malloc return value by Edward Williamson · 10 years ago
- 1016d32 x86: only eliminate REX prefixes if next byte is not a legacy prefix by Nguyen Anh Quynh · 10 years ago
- 1cbc222 x86: eliminate redundant REX prefixes in front of x86_64 instruction. bug reported by Aurélien Wailly by Nguyen Anh Quynh · 10 years ago
- 03a1836 arm64: set absolute (rather than relative) address B/BL. issue reported by Pancake by Nguyen Anh Quynh · 10 years ago
- c2925e9 x86: accept more than one REX prefix for x86_64. bug reported by Aurélien Wailly. thanks Ange Albertini for help by Nguyen Anh Quynh · 10 years ago
- 073a3dd package: update Brew formula (copied from Homebrew repo) by Nguyen Anh Quynh · 10 years ago
- 03fb6f3 x86: MOV32sm should reference word rather than dword. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
- 1befd75 x86: reverse the order of operands for alias instruction IMUL in Intel syntax. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
- 9578185 x86: add missing operands in detail mode for 'IN/OUT reg, reg' instructions. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
- 2ce4da3 x86: fix the last bug on PUSH/POP <segment> for ATT syntax by Nguyen Anh Quynh · 10 years ago
- b32515d x86: add missing operands in detail mode for PUSH/POP <segment> instructions. bug reported by Andrew Wesie by Nguyen Anh Quynh · 10 years ago
- 5b981a4 x86: also fix AT&T syntax for the last MOV32ms bug by Nguyen Anh Quynh · 10 years ago
- 344d5e2 Merge branch 'next' of https://github.com/aquynh/capstone into next by Nguyen Anh Quynh · 10 years ago
- ba31f26 x86: MOV32ms should reference word rather than dword. bug reported by Gabriel Quadros by Nguyen Anh Quynh · 10 years ago
- 3caf837 arm: alias LDR instruction with operands '[sp], 4' to POP. suggested by Pancake by Nguyen Anh Quynh · 10 years ago
- a2934a7 arm: print immediate op of MVN instruction in positive hexadecimal form. issue reported by Pancake by Nguyen Anh Quynh · 10 years ago
- 4e732c7 Populate PowerPC slwi/srwi instruction details with SH operand. by Peter Mackay · 10 years ago
- c00bc2e fix the left-over C89 issues introduced by Pedro by Nguyen Anh Quynh · 10 years ago
- 07532bd Merge branch 'master' of https://github.com/gdbinit/capstone into fix by Nguyen Anh Quynh · 10 years ago
- 68197d9 Make it C89 compatible. by reverser · 10 years ago
- 202da41 Fix compiler warnings about different sizes and sign. by reverser · 10 years ago
- 8ab0136 python: export generic operand types & groups by Nguyen Anh Quynh · 10 years ago
- b53a59a update ChangeLog for 3.0 by Nguyen Anh Quynh · 10 years ago
- 8122218 merge next branch by Nguyen Anh Quynh · 10 years ago
- 8946029 python: python2.6 does not understand sys.versionn_info.major by Nguyen Anh Quynh · 10 years ago
- 0ea529a java: add close() method to avoid some unknown crash caused by finallize() on Ubuntu 14.04. FIXME by Nguyen Anh Quynh · 10 years ago
- fadbddc update ChangeLog for 3.0 by Nguyen Anh Quynh · 10 years ago
- 22278ec mips & xcore: some safety guards to make sure printOperand() do not overflow Operands[] for some unknown reasons by Nguyen Anh Quynh · 10 years ago
- d83c8c7 suite: change CS_MODE_32 -> CS_MODE_MIPS32, CS_MODE_64 -> CS_MODE_MIPS64 for fuzz.py & benchmark.py by Nguyen Anh Quynh · 10 years ago
- faa925a fix bindings (python/java) and tests after the last change on the type of imm of cs_arm64_op by Nguyen Anh Quynh · 10 years ago
- 56128da arm64: for operand type IMM, value should have the type int64_t, not int32_t. all bindings should be fixed by Nguyen Anh Quynh · 10 years ago
- aa50c64 arm64: fix ADRP (relative offset). bug reported by @shadymallow by Nguyen Anh Quynh · 10 years ago
- 57a902d suite: add crc32 instruction to x86odd.py by Nguyen Anh Quynh · 10 years ago
- b008229 suite: add some tricky x86 code to x86odd.py by Nguyen Anh Quynh · 10 years ago
- bb77154 Merge branch 'next' of https://github.com/aquynh/capstone into next by Nguyen Anh Quynh · 10 years ago
- 2328095 arm64: cleanup by Nguyen Anh Quynh · 10 years ago
- 736762d update COMPILE.TXT to add more bindings by Nguyen Anh Quynh · 10 years ago
- b0ee0c9 Merge branch 'next' of https://github.com/aquynh/capstone into next by Nguyen Anh Quynh · 10 years ago
- f85f981 update COMPILE.TXT by Nguyen Anh Quynh · 10 years ago
- 02cafeb suite: update Mips modes of MC input to CS_MODE_MIPS32 & CS_MODE_MIPS64 by Nguyen Anh Quynh · 10 years ago
- ff9a574 ocaml: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 by Nguyen Anh Quynh · 10 years ago
- a7b06fd capstone.h: add comments on some hardware modes by Nguyen Anh Quynh · 10 years ago
- e01fdfb java: add comments on hardware modes by Nguyen Anh Quynh · 10 years ago
- 75c9b6a python: fix comments on hardware modes by Nguyen Anh Quynh · 10 years ago
- 26fd6b1 ocaml: typo (CS_MODE_32) in test_ppc.ml by Nguyen Anh Quynh · 10 years ago
- bf4723f java: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 by Nguyen Anh Quynh · 10 years ago
- 143a494 python: add CS_MODE_MIPS32/64 by Nguyen Anh Quynh · 10 years ago
- ec58a02 python: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 by Nguyen Anh Quynh · 10 years ago
- 952da90 suite: add missing tests to test_c.sh by Nguyen Anh Quynh · 10 years ago
- 84df600 tests: update Mips modes to CS_MODE_MIPS32 & CS_MODE_MIPS64 by Nguyen Anh Quynh · 10 years ago
- d3f0373 add CS_MODE_MIPS32 & CS_MODE_MIPS64. these modes are aliases of CS_MODE_32 & CS_MODE_64, so no old code is broken by Nguyen Anh Quynh · 10 years ago
- 7e75ca6 python: CS_MODE_MIPS32R6 is independent from CS_MODE_32 by Nguyen Anh Quynh · 10 years ago
- 0d97a3b mips: CS_MODE_MIPS32R6 is an independent mode, and should not combine with CS_MODE_32 by Nguyen Anh Quynh · 10 years ago
- cc60d10 mips: add comments on mips32 & mips64 to capstone.h by Nguyen Anh Quynh · 10 years ago
- 7dada4f Merge branch 'next' of https://github.com/wodz/capstone into mips by Nguyen Anh Quynh · 10 years ago
- 921a46c mips: Fix j/jal target address calculation by Marcin Bukat · 10 years ago
- c36e675 mips: refine getFeatureBits() to make it more clear what Mips features are supported by Nguyen Anh Quynh · 10 years ago
- 1ffc1b2 arm: fix printMemBOption() that was wrongly fixed in 51888c3e0824dfcc7571d84fda303a8504763e2d by Nguyen Anh Quynh · 10 years ago
- 6782cbf cython: support the newly added field mem_barrier in cs_arm by Nguyen Anh Quynh · 10 years ago
- 128124c python: typo on README by Nguyen Anh Quynh · 10 years ago
- 6f00a98 Merge branch 'next' of https://github.com/aquynh/capstone into next by Nguyen Anh Quynh · 10 years ago
- 753f44a capstone.h: add comment for CS_ARCH_ALL by Nguyen Anh Quynh · 10 years ago
- 39785fb java: add CS_SUPPORT_X86_REDUCE by Nguyen Anh Quynh · 10 years ago
- bd85431 cython: add XCore to debug string by Nguyen Anh Quynh · 10 years ago
- 5db983d java: fix a wrong type for memBarrier in Arm.java by Nguyen Anh Quynh · 10 years ago
- 7b7d745 ocaml: properly handle newly added mode CS_MODE_V8 & PPC_OP_CRX in test_ppc.ml by Nguyen Anh Quynh · 10 years ago
- 9ba1906 python: test_ppc.py prints crx.scale & crx.cond as integers by Nguyen Anh Quynh · 10 years ago
- 51888c3 arm: fix some bugs reported by VS2010. thanks Axel for testing by Nguyen Anh Quynh · 10 years ago
- 0b3d95e java/ocaml/python: support the newly added mem_barrier field of cs_arm struct by Nguyen Anh Quynh · 10 years ago
- 8cdafda arm: add new field mem_barrier to cs_arm struct. this requires changes in bindings by Nguyen Anh Quynh · 10 years ago
- 2e40e69 arm: add sample code for ARM's CS_MODE_MCLASS & CS_MODE_V8 by Nguyen Anh Quynh · 10 years ago
- 83466d4 test: add sample code for ARM's CS_MODE_MCLASS & CS_MODE_V8 by Nguyen Anh Quynh · 10 years ago
- 435b913 suite: delete duplicate MC input in ppc64-encoding-bookIII.s.cs by Nguyen Anh Quynh · 10 years ago
- e07bc91 ppc: fix a stupid mistake on printing operands of MR instruction by Nguyen Anh Quynh · 10 years ago
- 4c36374 suite: normalize PPC's branch instructions having immediate operand by Nguyen Anh Quynh · 10 years ago
- 278e727 arm: print immediate in positive form for AND/ORR/EOR/BIC instructions by Nguyen Anh Quynh · 10 years ago
- d82b28a ppc: do not print a dot in front of absolute address. issue reported by @pancake by Nguyen Anh Quynh · 10 years ago
- b6f4c1d sparc: add missing ICC/XCC registers in operands[] for some alias instructions. bug reported by @pancake by Nguyen Anh Quynh · 10 years ago