1. f9e3216 x86: on mem reference, put scale after index register to be consistent with Intel style by Nguyen Anh Quynh · 11 years ago
  2. 9c950c1 x86: fix all the shift rotate insns with 1 as immediate: shl, shr, sar, ror, rol. thus, removed the hack on this insns. by Nguyen Anh Quynh · 11 years ago
  3. 8fcec67 x86: do not sign-extend immediate. this fixes the issues reported by LongLD by Nguyen Anh Quynh · 11 years ago
  4. b9b3d29 x86: print segment register in some insns with memory references. This fixes the bug reported by Edgar & Attila by Nguyen Anh Quynh · 11 years ago
  5. 0b6f1bd x86: fix SHR, SHL, SAR insn when second op is 1 (Intel syntax). reported by Edgar Barbosa by Nguyen Anh Quynh · 11 years ago
  6. f10be9b x86: fix an overflow bug reported by Pancake by Nguyen Anh Quynh · 11 years ago
  7. 26ee41a initial import by Nguyen Anh Quynh · 11 years ago