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Stephen Hines6bcf27b2014-05-29 04:14:42 -07001// RUN: %clang_cc1 -O1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -S -o - -emit-llvm %s | FileCheck %s
2// RUN: %clang_cc1 -O1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -S -o - %s | \
Stephen Hines651f13c2014-04-23 16:59:28 -07003// RUN: FileCheck -check-prefix=CHECK_CODEGEN %s
4// REQUIRES: arm64-registered-target
5
6// Test ARM64 SIMD vector shift right and insert: vsri[q]_n_*
7
8#include <arm_neon.h>
9
10int8x8_t test_vsri_n_s8(int8x8_t a1, int8x8_t a2) {
11 // CHECK: test_vsri_n_s8
12 return vsri_n_s8(a1, a2, 3);
Stephen Hines6bcf27b2014-05-29 04:14:42 -070013 // CHECK: llvm.aarch64.neon.vsri.v8i8
Stephen Hines651f13c2014-04-23 16:59:28 -070014 // CHECK_CODEGEN: sri.8b v0, v1, #3
15}
16
17int16x4_t test_vsri_n_s16(int16x4_t a1, int16x4_t a2) {
18 // CHECK: test_vsri_n_s16
19 return vsri_n_s16(a1, a2, 3);
Stephen Hines6bcf27b2014-05-29 04:14:42 -070020 // CHECK: llvm.aarch64.neon.vsri.v4i16
Stephen Hines651f13c2014-04-23 16:59:28 -070021 // CHECK_CODEGEN: sri.4h v0, v1, #3
22}
23
24int32x2_t test_vsri_n_s32(int32x2_t a1, int32x2_t a2) {
25 // CHECK: test_vsri_n_s32
26 return vsri_n_s32(a1, a2, 1);
Stephen Hines6bcf27b2014-05-29 04:14:42 -070027 // CHECK: llvm.aarch64.neon.vsri.v2i32
Stephen Hines651f13c2014-04-23 16:59:28 -070028 // CHECK_CODEGEN: sri.2s v0, v1, #1
29}
30
31int64x1_t test_vsri_n_s64(int64x1_t a1, int64x1_t a2) {
32 // CHECK: test_vsri_n_s64
33 return vsri_n_s64(a1, a2, 1);
Stephen Hines6bcf27b2014-05-29 04:14:42 -070034 // CHECK: llvm.aarch64.neon.vsri.v1i64
Stephen Hines651f13c2014-04-23 16:59:28 -070035 // CHECK_CODEGEN: sri d0, d1, #1
36}
37
38uint8x8_t test_vsri_n_u8(uint8x8_t a1, uint8x8_t a2) {
39 // CHECK: test_vsri_n_u8
40 return vsri_n_u8(a1, a2, 3);
Stephen Hines6bcf27b2014-05-29 04:14:42 -070041 // CHECK: llvm.aarch64.neon.vsri.v8i8
Stephen Hines651f13c2014-04-23 16:59:28 -070042 // CHECK_CODEGEN: sri.8b v0, v1, #3
43}
44
45uint16x4_t test_vsri_n_u16(uint16x4_t a1, uint16x4_t a2) {
46 // CHECK: test_vsri_n_u16
47 return vsri_n_u16(a1, a2, 3);
Stephen Hines6bcf27b2014-05-29 04:14:42 -070048 // CHECK: llvm.aarch64.neon.vsri.v4i16
Stephen Hines651f13c2014-04-23 16:59:28 -070049 // CHECK_CODEGEN: sri.4h v0, v1, #3
50}
51
52uint32x2_t test_vsri_n_u32(uint32x2_t a1, uint32x2_t a2) {
53 // CHECK: test_vsri_n_u32
54 return vsri_n_u32(a1, a2, 1);
Stephen Hines6bcf27b2014-05-29 04:14:42 -070055 // CHECK: llvm.aarch64.neon.vsri.v2i32
Stephen Hines651f13c2014-04-23 16:59:28 -070056 // CHECK_CODEGEN: sri.2s v0, v1, #1
57}
58
59uint64x1_t test_vsri_n_u64(uint64x1_t a1, uint64x1_t a2) {
60 // CHECK: test_vsri_n_u64
61 return vsri_n_u64(a1, a2, 1);
Stephen Hines6bcf27b2014-05-29 04:14:42 -070062 // CHECK: llvm.aarch64.neon.vsri.v1i64
Stephen Hines651f13c2014-04-23 16:59:28 -070063 // CHECK_CODEGEN: sri d0, d1, #1
64}
65
66poly8x8_t test_vsri_n_p8(poly8x8_t a1, poly8x8_t a2) {
67 // CHECK: test_vsri_n_p8
68 return vsri_n_p8(a1, a2, 1);
Stephen Hines6bcf27b2014-05-29 04:14:42 -070069 // CHECK: llvm.aarch64.neon.vsri.v8i8
Stephen Hines651f13c2014-04-23 16:59:28 -070070 // CHECK_CODEGEN: sri.8b v0, v1, #1
71}
72
73poly16x4_t test_vsri_n_p16(poly16x4_t a1, poly16x4_t a2) {
74 // CHECK: test_vsri_n_p16
75 return vsri_n_p16(a1, a2, 1);
Stephen Hines6bcf27b2014-05-29 04:14:42 -070076 // CHECK: llvm.aarch64.neon.vsri.v4i16
Stephen Hines651f13c2014-04-23 16:59:28 -070077 // CHECK_CODEGEN: sri.4h v0, v1, #1
78}
79
80int8x16_t test_vsriq_n_s8(int8x16_t a1, int8x16_t a2) {
81 // CHECK: test_vsriq_n_s8
82 return vsriq_n_s8(a1, a2, 3);
Stephen Hines6bcf27b2014-05-29 04:14:42 -070083 // CHECK: llvm.aarch64.neon.vsri.v16i8
Stephen Hines651f13c2014-04-23 16:59:28 -070084 // CHECK_CODEGEN: sri.16b v0, v1, #3
85}
86
87int16x8_t test_vsriq_n_s16(int16x8_t a1, int16x8_t a2) {
88 // CHECK: test_vsriq_n_s16
89 return vsriq_n_s16(a1, a2, 3);
Stephen Hines6bcf27b2014-05-29 04:14:42 -070090 // CHECK: llvm.aarch64.neon.vsri.v8i16
Stephen Hines651f13c2014-04-23 16:59:28 -070091 // CHECK_CODEGEN: sri.8h v0, v1, #3
92}
93
94int32x4_t test_vsriq_n_s32(int32x4_t a1, int32x4_t a2) {
95 // CHECK: test_vsriq_n_s32
96 return vsriq_n_s32(a1, a2, 1);
Stephen Hines6bcf27b2014-05-29 04:14:42 -070097 // CHECK: llvm.aarch64.neon.vsri.v4i32
Stephen Hines651f13c2014-04-23 16:59:28 -070098 // CHECK_CODEGEN: sri.4s v0, v1, #1
99}
100
101int64x2_t test_vsriq_n_s64(int64x2_t a1, int64x2_t a2) {
102 // CHECK: test_vsriq_n_s64
103 return vsriq_n_s64(a1, a2, 1);
Stephen Hines6bcf27b2014-05-29 04:14:42 -0700104 // CHECK: llvm.aarch64.neon.vsri.v2i64
Stephen Hines651f13c2014-04-23 16:59:28 -0700105 // CHECK_CODEGEN: sri.2d v0, v1, #1
106}
107
108uint8x16_t test_vsriq_n_u8(uint8x16_t a1, uint8x16_t a2) {
109 // CHECK: test_vsriq_n_u8
110 return vsriq_n_u8(a1, a2, 3);
Stephen Hines6bcf27b2014-05-29 04:14:42 -0700111 // CHECK: llvm.aarch64.neon.vsri.v16i8
Stephen Hines651f13c2014-04-23 16:59:28 -0700112 // CHECK_CODEGEN: sri.16b v0, v1, #3
113}
114
115uint16x8_t test_vsriq_n_u16(uint16x8_t a1, uint16x8_t a2) {
116 // CHECK: test_vsriq_n_u16
117 return vsriq_n_u16(a1, a2, 3);
Stephen Hines6bcf27b2014-05-29 04:14:42 -0700118 // CHECK: llvm.aarch64.neon.vsri.v8i16
Stephen Hines651f13c2014-04-23 16:59:28 -0700119 // CHECK_CODEGEN: sri.8h v0, v1, #3
120}
121
122uint32x4_t test_vsriq_n_u32(uint32x4_t a1, uint32x4_t a2) {
123 // CHECK: test_vsriq_n_u32
124 return vsriq_n_u32(a1, a2, 1);
Stephen Hines6bcf27b2014-05-29 04:14:42 -0700125 // CHECK: llvm.aarch64.neon.vsri.v4i32
Stephen Hines651f13c2014-04-23 16:59:28 -0700126 // CHECK_CODEGEN: sri.4s v0, v1, #1
127}
128
129uint64x2_t test_vsriq_n_u64(uint64x2_t a1, uint64x2_t a2) {
130 // CHECK: test_vsriq_n_u64
131 return vsriq_n_u64(a1, a2, 1);
Stephen Hines6bcf27b2014-05-29 04:14:42 -0700132 // CHECK: llvm.aarch64.neon.vsri.v2i64
Stephen Hines651f13c2014-04-23 16:59:28 -0700133 // CHECK_CODEGEN: sri.2d v0, v1, #1
134}
135
136poly8x16_t test_vsriq_n_p8(poly8x16_t a1, poly8x16_t a2) {
137 // CHECK: test_vsriq_n_p8
138 return vsriq_n_p8(a1, a2, 1);
Stephen Hines6bcf27b2014-05-29 04:14:42 -0700139 // CHECK: llvm.aarch64.neon.vsri.v16i8
Stephen Hines651f13c2014-04-23 16:59:28 -0700140 // CHECK_CODEGEN: sri.16b v0, v1, #1
141}
142
143poly16x8_t test_vsriq_n_p16(poly16x8_t a1, poly16x8_t a2) {
144 // CHECK: test_vsriq_n_p16
145 return vsriq_n_p16(a1, a2, 1);
Stephen Hines6bcf27b2014-05-29 04:14:42 -0700146 // CHECK: llvm.aarch64.neon.vsri.v8i16
Stephen Hines651f13c2014-04-23 16:59:28 -0700147 // CHECK_CODEGEN: sri.8h v0, v1, #1
148}
149