blob: 5d43163116e1d76ece06430b78dad23124f582a9 [file] [log] [blame]
NAKAMURA Takumicc59e912012-09-27 14:55:08 +00001// REQUIRES: x86-64-registered-target
Chad Rosier48a05b92012-08-08 21:15:52 +00002// RUN: %clang_cc1 %s -triple x86_64-apple-darwin10 -O0 -fms-extensions -fenable-experimental-ms-inline-asm -w -emit-llvm -o - | FileCheck %s
Chad Rosierb64f3102012-08-08 20:37:31 +00003
4void t1() {
5// CHECK: @t1
Chad Rosierfcf75a32012-09-05 19:01:07 +00006// CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
Chad Rosierb64f3102012-08-08 20:37:31 +00007// CHECK: ret void
8 __asm {}
9}
Chad Rosier265f5382012-08-13 20:32:07 +000010
11void t2() {
12// CHECK: @t2
Chad Rosierfcf75a32012-09-05 19:01:07 +000013// CHECK: call void asm sideeffect inteldialect "nop", "~{dirflag},~{fpsr},~{flags}"() nounwind
14// CHECK: call void asm sideeffect inteldialect "nop", "~{dirflag},~{fpsr},~{flags}"() nounwind
15// CHECK: call void asm sideeffect inteldialect "nop", "~{dirflag},~{fpsr},~{flags}"() nounwind
Chad Rosier265f5382012-08-13 20:32:07 +000016// CHECK: ret void
17 __asm nop
18 __asm nop
19 __asm nop
20}
21
22void t3() {
23// CHECK: @t3
Chad Rosier4de97162012-09-11 00:51:28 +000024// CHECK: call void asm sideeffect inteldialect "nop\0A\09nop\0A\09nop", "~{dirflag},~{fpsr},~{flags}"() nounwind
Chad Rosier265f5382012-08-13 20:32:07 +000025// CHECK: ret void
26 __asm nop __asm nop __asm nop
27}
28
29void t4(void) {
30// CHECK: @t4
Chad Rosierfcf75a32012-09-05 19:01:07 +000031// CHECK: call void asm sideeffect inteldialect "mov ebx, eax", "~{ebx},~{dirflag},~{fpsr},~{flags}"() nounwind
32// CHECK: call void asm sideeffect inteldialect "mov ecx, ebx", "~{ecx},~{dirflag},~{fpsr},~{flags}"() nounwind
Chad Rosier265f5382012-08-13 20:32:07 +000033// CHECK: ret void
34 __asm mov ebx, eax
35 __asm mov ecx, ebx
36}
37
38void t5(void) {
39// CHECK: @t5
Chad Rosier4de97162012-09-11 00:51:28 +000040// CHECK: call void asm sideeffect inteldialect "mov ebx, eax\0A\09mov ecx, ebx", "~{ebx},~{ecx},~{dirflag},~{fpsr},~{flags}"() nounwind
Chad Rosier265f5382012-08-13 20:32:07 +000041// CHECK: ret void
42 __asm mov ebx, eax __asm mov ecx, ebx
43}
Chad Rosier27ef16b2012-08-14 23:48:41 +000044
45void t6(void) {
46 __asm int 0x2c
47// CHECK: t6
Chad Rosier4de97162012-09-11 00:51:28 +000048// CHECK: call void asm sideeffect inteldialect "int $$0x2c", "~{dirflag},~{fpsr},~{flags}"() nounwind
Chad Rosier27ef16b2012-08-14 23:48:41 +000049}
50
Chad Rosier7fcde172012-08-21 17:01:26 +000051void t7() {
Chad Rosier27ef16b2012-08-14 23:48:41 +000052 __asm {
53 int 0x2c ; } asm comments are fun! }{
54 }
55 __asm {}
Chad Rosier7fcde172012-08-21 17:01:26 +000056// CHECK: t7
Chad Rosier4de97162012-09-11 00:51:28 +000057// CHECK: call void asm sideeffect inteldialect "int $$0x2c", "~{dirflag},~{fpsr},~{flags}"() nounwind
Chad Rosierfcf75a32012-09-05 19:01:07 +000058// CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
Chad Rosier27ef16b2012-08-14 23:48:41 +000059}
Chad Rosier7fcde172012-08-21 17:01:26 +000060int t8() {
Chad Rosier27ef16b2012-08-14 23:48:41 +000061 __asm int 3 ; } comments for single-line asm
62 __asm {}
63 __asm int 4
64 return 10;
Chad Rosier7fcde172012-08-21 17:01:26 +000065// CHECK: t8
Chad Rosier4de97162012-09-11 00:51:28 +000066// CHECK: call void asm sideeffect inteldialect "int $$3", "~{dirflag},~{fpsr},~{flags}"() nounwind
Chad Rosierfcf75a32012-09-05 19:01:07 +000067// CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
Chad Rosier4de97162012-09-11 00:51:28 +000068// CHECK: call void asm sideeffect inteldialect "int $$4", "~{dirflag},~{fpsr},~{flags}"() nounwind
Chad Rosier27ef16b2012-08-14 23:48:41 +000069// CHECK: ret i32 10
70}
Chad Rosier7fcde172012-08-21 17:01:26 +000071void t9() {
Chad Rosier27ef16b2012-08-14 23:48:41 +000072 __asm {
73 push ebx
74 mov ebx, 0x07
75 pop ebx
76 }
Chad Rosier7fcde172012-08-21 17:01:26 +000077// CHECK: t9
Chad Rosier4de97162012-09-11 00:51:28 +000078// CHECK: call void asm sideeffect inteldialect "push ebx\0A\09mov ebx, $$0x07\0A\09pop ebx", "~{ebx},~{dirflag},~{fpsr},~{flags}"() nounwind
Chad Rosier27ef16b2012-08-14 23:48:41 +000079}
Chad Rosierf64c1182012-08-16 17:10:59 +000080
Chad Rosier7fcde172012-08-21 17:01:26 +000081unsigned t10(void) {
Chad Rosierf64c1182012-08-16 17:10:59 +000082 unsigned i = 1, j;
83 __asm {
84 mov eax, i
85 mov j, eax
86 }
87 return j;
Chad Rosier7fcde172012-08-21 17:01:26 +000088// CHECK: t10
Chad Rosierf64c1182012-08-16 17:10:59 +000089// CHECK: [[I:%[a-zA-Z0-9]+]] = alloca i32, align 4
90// CHECK: [[J:%[a-zA-Z0-9]+]] = alloca i32, align 4
91// CHECK: store i32 1, i32* [[I]], align 4
Chad Rosier4de97162012-09-11 00:51:28 +000092// CHECK: call i32 asm sideeffect inteldialect "mov eax, $1\0A\09mov $0, eax", "=r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}) nounwind
Chad Rosierf64c1182012-08-16 17:10:59 +000093// CHECK: [[RET:%[a-zA-Z0-9]+]] = load i32* [[J]], align 4
94// CHECK: ret i32 [[RET]]
95}
Chad Rosier700ce642012-08-16 22:25:38 +000096
Chad Rosier7fcde172012-08-21 17:01:26 +000097void t11(void) {
Chad Rosier700ce642012-08-16 22:25:38 +000098 __asm EVEN
99 __asm ALIGN
Chad Rosierc6916492012-09-06 19:56:25 +0000100// CHECK: t11
101// CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
102// CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
Chad Rosier700ce642012-08-16 22:25:38 +0000103}
104
Chad Rosier7fcde172012-08-21 17:01:26 +0000105void t12(void) {
Chad Rosier700ce642012-08-16 22:25:38 +0000106 __asm {
107 _emit 0x4A
108 _emit 0x43
109 _emit 0x4B
110 }
Chad Rosierc6916492012-09-06 19:56:25 +0000111// CHECK: t12
112// CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
Chad Rosier700ce642012-08-16 22:25:38 +0000113}
114
Chad Rosier7fcde172012-08-21 17:01:26 +0000115void t13(void) {
Chad Rosier700ce642012-08-16 22:25:38 +0000116 unsigned arr[10];
117 __asm LENGTH arr ; sizeof(arr)/sizeof(arr[0])
118 __asm SIZE arr ; sizeof(arr)
119 __asm TYPE arr ; sizeof(arr[0])
Chad Rosierc6916492012-09-06 19:56:25 +0000120// CHECK: t13
121// CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
122// CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
123// CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
Chad Rosier700ce642012-08-16 22:25:38 +0000124}
Chad Rosier4de97162012-09-11 00:51:28 +0000125
126void t14(void) {
127 __asm mov eax, 1
128// CHECK: t14
129// CHECK: call void asm sideeffect inteldialect "mov eax, $$1", "~{eax},~{dirflag},~{fpsr},~{flags}"() nounwind
130}
Chad Rosier7f9678b2012-09-12 18:14:25 +0000131
132void t15(void) {
133 __asm mov eax, DWORD PTR [eax]
134// CHECK: t15
135// CHECK: call void asm sideeffect inteldialect "mov eax, DWORD PTR [eax]", "~{eax},~{dirflag},~{fpsr},~{flags}"() nounwind
136}
137
138void t16(unsigned long long V) {
139 __asm mov eax, DWORD PTR [V]
140// CHECK: t16
Chad Rosier1fa1e0c2012-09-12 23:03:48 +0000141// CHECK: call void asm sideeffect inteldialect "mov eax, DWORD PTR [$0]", "r,~{eax},~{dirflag},~{fpsr},~{flags}"(i64 %{{.*}}) nounwind
Chad Rosier7f9678b2012-09-12 18:14:25 +0000142}
Chad Rosier808a1d02012-09-12 18:25:06 +0000143
144void t17(void) {
145 __asm mov eax, dword ptr [eax]
146// CHECK: t17
147// CHECK: call void asm sideeffect inteldialect "mov eax, dword ptr [eax]", "~{eax},~{dirflag},~{fpsr},~{flags}"() nounwind
148}
Chad Rosier47fa9992012-09-12 18:34:34 +0000149
150void t18(void) {
151 __asm mov dword ptr [eax], eax
152// CHECK: t18
153// CHECK: call void asm sideeffect inteldialect "mov dword ptr [eax], eax", "~{dirflag},~{fpsr},~{flags}"() nounwind
154}
Chad Rosierb55e6022012-09-13 00:06:55 +0000155
156unsigned t19(void) {
157 unsigned i = 1, j, l = 1, m;
158 __asm {
159 mov eax, i
160 mov j, eax
161 mov eax, l
162 mov m, eax
163 }
164 return j + m;
165// CHECK: t19
166// CHECK: call { i32, i32 } asm sideeffect inteldialect "mov eax, $2\0A\09mov $0, eax\0A\09mov eax, $3\0A\09mov $1, eax", "=r,=r,r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}, i32 %{{.*}}) nounwind
167}