Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 1 | // Copyright 2017 Google Inc. |
| 2 | // |
| 3 | // Licensed under the Apache License, Version 2.0 (the "License"); |
| 4 | // you may not use this file except in compliance with the License. |
| 5 | // You may obtain a copy of the License at |
| 6 | // |
| 7 | // http://www.apache.org/licenses/LICENSE-2.0 |
| 8 | // |
| 9 | // Unless required by applicable law or agreed to in writing, software |
| 10 | // distributed under the License is distributed on an "AS IS" BASIS, |
| 11 | // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 12 | // See the License for the specific language governing permissions and |
| 13 | // limitations under the License. |
| 14 | |
| 15 | #include "cpuinfo_arm.h" |
| 16 | |
| 17 | #include "internal/bit_utils.h" |
| 18 | #include "internal/filesystem.h" |
| 19 | #include "internal/hwcaps.h" |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 20 | #include "internal/stack_line_reader.h" |
| 21 | #include "internal/string_view.h" |
Guillaume Chatelet | dfdac6a | 2019-01-17 18:00:21 +0100 | [diff] [blame] | 22 | #include "internal/unix_features_aggregator.h" |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 23 | |
Dr.-Ing. Patrick Siegl | 22c05ed | 2019-06-29 22:02:23 +0200 | [diff] [blame] | 24 | #include <assert.h> |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 25 | #include <ctype.h> |
| 26 | |
Dr.-Ing. Patrick Siegl | bfd109b | 2019-06-26 12:56:52 +0200 | [diff] [blame] | 27 | DECLARE_SETTER(ArmFeatures, swp) |
Dr.-Ing. Patrick Siegl | 6482bad | 2019-06-18 12:53:08 +0200 | [diff] [blame] | 28 | DECLARE_SETTER(ArmFeatures, half) |
| 29 | DECLARE_SETTER(ArmFeatures, thumb) |
Dr.-Ing. Patrick Siegl | bfd109b | 2019-06-26 12:56:52 +0200 | [diff] [blame] | 30 | DECLARE_SETTER(ArmFeatures, _26bit) |
Dr.-Ing. Patrick Siegl | 6482bad | 2019-06-18 12:53:08 +0200 | [diff] [blame] | 31 | DECLARE_SETTER(ArmFeatures, fastmult) |
Dr.-Ing. Patrick Siegl | bfd109b | 2019-06-26 12:56:52 +0200 | [diff] [blame] | 32 | DECLARE_SETTER(ArmFeatures, fpa) |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 33 | DECLARE_SETTER(ArmFeatures, vfp) |
Dr.-Ing. Patrick Siegl | 6482bad | 2019-06-18 12:53:08 +0200 | [diff] [blame] | 34 | DECLARE_SETTER(ArmFeatures, edsp) |
| 35 | DECLARE_SETTER(ArmFeatures, java) |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 36 | DECLARE_SETTER(ArmFeatures, iwmmxt) |
Dr.-Ing. Patrick Siegl | bfd109b | 2019-06-26 12:56:52 +0200 | [diff] [blame] | 37 | DECLARE_SETTER(ArmFeatures, crunch) |
| 38 | DECLARE_SETTER(ArmFeatures, thumbee) |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 39 | DECLARE_SETTER(ArmFeatures, neon) |
| 40 | DECLARE_SETTER(ArmFeatures, vfpv3) |
| 41 | DECLARE_SETTER(ArmFeatures, vfpv3d16) |
Dr.-Ing. Patrick Siegl | 6482bad | 2019-06-18 12:53:08 +0200 | [diff] [blame] | 42 | DECLARE_SETTER(ArmFeatures, tls) |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 43 | DECLARE_SETTER(ArmFeatures, vfpv4) |
| 44 | DECLARE_SETTER(ArmFeatures, idiva) |
| 45 | DECLARE_SETTER(ArmFeatures, idivt) |
Dr.-Ing. Patrick Siegl | bfd109b | 2019-06-26 12:56:52 +0200 | [diff] [blame] | 46 | DECLARE_SETTER(ArmFeatures, vfpd32) |
| 47 | DECLARE_SETTER(ArmFeatures, lpae) |
| 48 | DECLARE_SETTER(ArmFeatures, evtstrm) |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 49 | DECLARE_SETTER(ArmFeatures, aes) |
| 50 | DECLARE_SETTER(ArmFeatures, pmull) |
| 51 | DECLARE_SETTER(ArmFeatures, sha1) |
| 52 | DECLARE_SETTER(ArmFeatures, sha2) |
| 53 | DECLARE_SETTER(ArmFeatures, crc32) |
| 54 | |
| 55 | static const CapabilityConfig kConfigs[] = { |
Dr.-Ing. Patrick Siegl | 22c05ed | 2019-06-29 22:02:23 +0200 | [diff] [blame] | 56 | [ARM_SWP] = {{ARM_HWCAP_SWP, 0}, "swp", &set_swp}, // |
| 57 | [ARM_HALF] = {{ARM_HWCAP_HALF, 0}, "half", &set_half}, // |
| 58 | [ARM_THUMB] = {{ARM_HWCAP_THUMB, 0}, "thumb", &set_thumb}, // |
| 59 | [ARM_26BIT] = {{ARM_HWCAP_26BIT, 0}, "26bit", &set__26bit}, // |
| 60 | [ARM_FASTMULT] = {{ARM_HWCAP_FAST_MULT, 0}, "fastmult", &set_fastmult}, // |
| 61 | [ARM_FPA] = {{ARM_HWCAP_FPA, 0}, "fpa", &set_fpa}, // |
| 62 | [ARM_VFP] = {{ARM_HWCAP_VFP, 0}, "vfp", &set_vfp}, // |
| 63 | [ARM_EDSP] = {{ARM_HWCAP_EDSP, 0}, "edsp", &set_edsp}, // |
| 64 | [ARM_JAVA] = {{ARM_HWCAP_JAVA, 0}, "java", &set_java}, // |
| 65 | [ARM_IWMMXT] = {{ARM_HWCAP_IWMMXT, 0}, "iwmmxt", &set_iwmmxt}, // |
| 66 | [ARM_CRUNCH] = {{ARM_HWCAP_CRUNCH, 0}, "crunch", &set_crunch}, // |
| 67 | [ARM_THUMBEE] = {{ARM_HWCAP_THUMBEE, 0}, "thumbee", &set_thumbee}, // |
| 68 | [ARM_NEON] = {{ARM_HWCAP_NEON, 0}, "neon", &set_neon}, // |
| 69 | [ARM_VFPV3] = {{ARM_HWCAP_VFPV3, 0}, "vfpv3", &set_vfpv3}, // |
| 70 | [ARM_VFPV3D16] = {{ARM_HWCAP_VFPV3D16, 0}, "vfpv3d16", &set_vfpv3d16}, // |
| 71 | [ARM_TLS] = {{ARM_HWCAP_TLS, 0}, "tls", &set_tls}, // |
| 72 | [ARM_VFPV4] = {{ARM_HWCAP_VFPV4, 0}, "vfpv4", &set_vfpv4}, // |
| 73 | [ARM_IDIVA] = {{ARM_HWCAP_IDIVA, 0}, "idiva", &set_idiva}, // |
| 74 | [ARM_IDIVT] = {{ARM_HWCAP_IDIVT, 0}, "idivt", &set_idivt}, // |
| 75 | [ARM_VFPD32] = {{ARM_HWCAP_VFPD32, 0}, "vfpd32", &set_vfpd32}, // |
| 76 | [ARM_LPAE] = {{ARM_HWCAP_LPAE, 0}, "lpae", &set_lpae}, // |
| 77 | [ARM_EVTSTRM] = {{ARM_HWCAP_EVTSTRM, 0}, "evtstrm", &set_evtstrm}, // |
| 78 | [ARM_AES] = {{0, ARM_HWCAP2_AES}, "aes", &set_aes}, // |
| 79 | [ARM_PMULL] = {{0, ARM_HWCAP2_PMULL}, "pmull", &set_pmull}, // |
| 80 | [ARM_SHA1] = {{0, ARM_HWCAP2_SHA1}, "sha1", &set_sha1}, // |
| 81 | [ARM_SHA2] = {{0, ARM_HWCAP2_SHA2}, "sha2", &set_sha2}, // |
| 82 | [ARM_CRC32] = {{0, ARM_HWCAP2_CRC32}, "crc32", &set_crc32}, // |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 83 | }; |
| 84 | |
| 85 | static const size_t kConfigsSize = sizeof(kConfigs) / sizeof(CapabilityConfig); |
| 86 | |
| 87 | typedef struct { |
| 88 | bool processor_reports_armv6; |
| 89 | bool hardware_reports_goldfish; |
| 90 | } ProcCpuInfoData; |
| 91 | |
| 92 | static int IndexOfNonDigit(StringView str) { |
| 93 | size_t index = 0; |
Arvid Gerstmann | a1ffdcb | 2018-04-26 10:31:03 +0200 | [diff] [blame] | 94 | while (str.size && isdigit(CpuFeatures_StringView_Front(str))) { |
| 95 | str = CpuFeatures_StringView_PopFront(str, 1); |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 96 | ++index; |
| 97 | } |
| 98 | return index; |
| 99 | } |
| 100 | |
| 101 | static bool HandleArmLine(const LineResult result, ArmInfo* const info, |
| 102 | ProcCpuInfoData* const proc_info) { |
| 103 | StringView line = result.line; |
| 104 | StringView key, value; |
Arvid Gerstmann | a1ffdcb | 2018-04-26 10:31:03 +0200 | [diff] [blame] | 105 | if (CpuFeatures_StringView_GetAttributeKeyValue(line, &key, &value)) { |
| 106 | if (CpuFeatures_StringView_IsEquals(key, str("Features"))) { |
| 107 | CpuFeatures_SetFromFlags(kConfigsSize, kConfigs, value, &info->features); |
| 108 | } else if (CpuFeatures_StringView_IsEquals(key, str("CPU implementer"))) { |
| 109 | info->implementer = CpuFeatures_StringView_ParsePositiveNumber(value); |
| 110 | } else if (CpuFeatures_StringView_IsEquals(key, str("CPU variant"))) { |
| 111 | info->variant = CpuFeatures_StringView_ParsePositiveNumber(value); |
| 112 | } else if (CpuFeatures_StringView_IsEquals(key, str("CPU part"))) { |
| 113 | info->part = CpuFeatures_StringView_ParsePositiveNumber(value); |
| 114 | } else if (CpuFeatures_StringView_IsEquals(key, str("CPU revision"))) { |
| 115 | info->revision = CpuFeatures_StringView_ParsePositiveNumber(value); |
| 116 | } else if (CpuFeatures_StringView_IsEquals(key, str("CPU architecture"))) { |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 117 | // CPU architecture is a number that may be followed by letters. e.g. |
| 118 | // "6TEJ", "7". |
Arvid Gerstmann | d968991 | 2018-05-04 09:32:17 +0200 | [diff] [blame] | 119 | const StringView digits = |
| 120 | CpuFeatures_StringView_KeepFront(value, IndexOfNonDigit(value)); |
Arvid Gerstmann | a1ffdcb | 2018-04-26 10:31:03 +0200 | [diff] [blame] | 121 | info->architecture = CpuFeatures_StringView_ParsePositiveNumber(digits); |
Dr.-Ing. Patrick Siegl | 1834278 | 2019-06-25 17:58:31 +0200 | [diff] [blame] | 122 | } else if (CpuFeatures_StringView_IsEquals(key, str("Processor")) |
| 123 | || CpuFeatures_StringView_IsEquals(key, str("model name")) ) { |
| 124 | // Android reports this in a non-Linux standard "Processor" but sometimes |
| 125 | // also in "model name", Linux reports it only in "model name" |
| 126 | // see RaspberryPiZero (Linux) vs InvalidArmv7 (Android) test-cases |
Arvid Gerstmann | d968991 | 2018-05-04 09:32:17 +0200 | [diff] [blame] | 127 | proc_info->processor_reports_armv6 = |
| 128 | CpuFeatures_StringView_IndexOf(value, str("(v6l)")) >= 0; |
Arvid Gerstmann | a1ffdcb | 2018-04-26 10:31:03 +0200 | [diff] [blame] | 129 | } else if (CpuFeatures_StringView_IsEquals(key, str("Hardware"))) { |
Arvid Gerstmann | d968991 | 2018-05-04 09:32:17 +0200 | [diff] [blame] | 130 | proc_info->hardware_reports_goldfish = |
| 131 | CpuFeatures_StringView_IsEquals(value, str("Goldfish")); |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 132 | } |
| 133 | } |
| 134 | return !result.eof; |
| 135 | } |
| 136 | |
Guillaume Chatelet | 918553a | 2019-01-17 15:28:04 +0100 | [diff] [blame] | 137 | uint32_t GetArmCpuId(const ArmInfo* const info) { |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 138 | return (ExtractBitRange(info->implementer, 7, 0) << 24) | |
| 139 | (ExtractBitRange(info->variant, 3, 0) << 20) | |
| 140 | (ExtractBitRange(info->part, 11, 0) << 4) | |
| 141 | (ExtractBitRange(info->revision, 3, 0) << 0); |
| 142 | } |
| 143 | |
| 144 | static void FixErrors(ArmInfo* const info, |
| 145 | ProcCpuInfoData* const proc_cpu_info_data) { |
| 146 | // Fixing Samsung kernel reporting invalid cpu architecture. |
| 147 | // http://code.google.com/p/android/issues/detail?id=10812 |
| 148 | if (proc_cpu_info_data->processor_reports_armv6 && info->architecture >= 7) { |
| 149 | info->architecture = 6; |
| 150 | } |
| 151 | |
| 152 | // Handle kernel configuration bugs that prevent the correct reporting of CPU |
| 153 | // features. |
Guillaume Chatelet | 918553a | 2019-01-17 15:28:04 +0100 | [diff] [blame] | 154 | switch (GetArmCpuId(info)) { |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 155 | case 0x4100C080: |
| 156 | // Special case: The emulator-specific Android 4.2 kernel fails to report |
| 157 | // support for the 32-bit ARM IDIV instruction. Technically, this is a |
| 158 | // feature of the virtual CPU implemented by the emulator. Note that it |
| 159 | // could also support Thumb IDIV in the future, and this will have to be |
| 160 | // slightly updated. |
| 161 | if (info->architecture >= 7 && |
| 162 | proc_cpu_info_data->hardware_reports_goldfish) { |
| 163 | info->features.idiva = true; |
| 164 | } |
| 165 | break; |
| 166 | case 0x511004D0: |
| 167 | // https://crbug.com/341598. |
| 168 | info->features.neon = false; |
| 169 | break; |
| 170 | case 0x510006F2: |
| 171 | case 0x510006F3: |
| 172 | // The Nexus 4 (Qualcomm Krait) kernel configuration forgets to report |
| 173 | // IDIV support. |
| 174 | info->features.idiva = true; |
| 175 | info->features.idivt = true; |
| 176 | break; |
| 177 | } |
| 178 | |
| 179 | // Propagate cpu features. |
| 180 | if (info->features.vfpv4) info->features.vfpv3 = true; |
| 181 | if (info->features.neon) info->features.vfpv3 = true; |
| 182 | if (info->features.vfpv3) info->features.vfp = true; |
| 183 | } |
| 184 | |
| 185 | static void FillProcCpuInfoData(ArmInfo* const info, |
| 186 | ProcCpuInfoData* proc_cpu_info_data) { |
Arvid Gerstmann | a1ffdcb | 2018-04-26 10:31:03 +0200 | [diff] [blame] | 187 | const int fd = CpuFeatures_OpenFile("/proc/cpuinfo"); |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 188 | if (fd >= 0) { |
| 189 | StackLineReader reader; |
| 190 | StackLineReader_Initialize(&reader, fd); |
| 191 | for (;;) { |
| 192 | if (!HandleArmLine(StackLineReader_NextLine(&reader), info, |
| 193 | proc_cpu_info_data)) { |
| 194 | break; |
| 195 | } |
| 196 | } |
Arvid Gerstmann | a1ffdcb | 2018-04-26 10:31:03 +0200 | [diff] [blame] | 197 | CpuFeatures_CloseFile(fd); |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 198 | } |
| 199 | } |
| 200 | |
| 201 | static const ArmInfo kEmptyArmInfo; |
| 202 | |
| 203 | static const ProcCpuInfoData kEmptyProcCpuInfoData; |
| 204 | |
| 205 | ArmInfo GetArmInfo(void) { |
| 206 | // capabilities are fetched from both getauxval and /proc/cpuinfo so we can |
| 207 | // have some information if the executable is sandboxed (aka no access to |
| 208 | // /proc/cpuinfo). |
| 209 | ArmInfo info = kEmptyArmInfo; |
| 210 | ProcCpuInfoData proc_cpu_info_data = kEmptyProcCpuInfoData; |
| 211 | |
| 212 | FillProcCpuInfoData(&info, &proc_cpu_info_data); |
Arvid Gerstmann | d968991 | 2018-05-04 09:32:17 +0200 | [diff] [blame] | 213 | CpuFeatures_OverrideFromHwCaps(kConfigsSize, kConfigs, |
| 214 | CpuFeatures_GetHardwareCapabilities(), |
| 215 | &info.features); |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 216 | |
| 217 | FixErrors(&info, &proc_cpu_info_data); |
| 218 | |
| 219 | return info; |
| 220 | } |
| 221 | |
| 222 | //////////////////////////////////////////////////////////////////////////////// |
| 223 | // Introspection functions |
| 224 | |
| 225 | int GetArmFeaturesEnumValue(const ArmFeatures* features, |
| 226 | ArmFeaturesEnum value) { |
| 227 | switch (value) { |
Dr.-Ing. Patrick Siegl | bfd109b | 2019-06-26 12:56:52 +0200 | [diff] [blame] | 228 | case ARM_SWP: |
| 229 | return features->swp; |
Dr.-Ing. Patrick Siegl | 6482bad | 2019-06-18 12:53:08 +0200 | [diff] [blame] | 230 | case ARM_HALF: |
| 231 | return features->half; |
| 232 | case ARM_THUMB: |
| 233 | return features->thumb; |
Dr.-Ing. Patrick Siegl | bfd109b | 2019-06-26 12:56:52 +0200 | [diff] [blame] | 234 | case ARM_26BIT: |
| 235 | return features->_26bit; |
Dr.-Ing. Patrick Siegl | 6482bad | 2019-06-18 12:53:08 +0200 | [diff] [blame] | 236 | case ARM_FASTMULT: |
| 237 | return features->fastmult; |
Dr.-Ing. Patrick Siegl | bfd109b | 2019-06-26 12:56:52 +0200 | [diff] [blame] | 238 | case ARM_FPA: |
| 239 | return features->fpa; |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 240 | case ARM_VFP: |
| 241 | return features->vfp; |
Dr.-Ing. Patrick Siegl | 6482bad | 2019-06-18 12:53:08 +0200 | [diff] [blame] | 242 | case ARM_EDSP: |
| 243 | return features->edsp; |
| 244 | case ARM_JAVA: |
| 245 | return features->java; |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 246 | case ARM_IWMMXT: |
| 247 | return features->iwmmxt; |
Dr.-Ing. Patrick Siegl | bfd109b | 2019-06-26 12:56:52 +0200 | [diff] [blame] | 248 | case ARM_CRUNCH: |
| 249 | return features->crunch; |
| 250 | case ARM_THUMBEE: |
| 251 | return features->thumbee; |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 252 | case ARM_NEON: |
| 253 | return features->neon; |
| 254 | case ARM_VFPV3: |
| 255 | return features->vfpv3; |
| 256 | case ARM_VFPV3D16: |
| 257 | return features->vfpv3d16; |
Dr.-Ing. Patrick Siegl | 6482bad | 2019-06-18 12:53:08 +0200 | [diff] [blame] | 258 | case ARM_TLS: |
| 259 | return features->tls; |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 260 | case ARM_VFPV4: |
| 261 | return features->vfpv4; |
| 262 | case ARM_IDIVA: |
| 263 | return features->idiva; |
| 264 | case ARM_IDIVT: |
| 265 | return features->idivt; |
Dr.-Ing. Patrick Siegl | bfd109b | 2019-06-26 12:56:52 +0200 | [diff] [blame] | 266 | case ARM_VFPD32: |
| 267 | return features->vfpd32; |
| 268 | case ARM_LPAE: |
| 269 | return features->lpae; |
| 270 | case ARM_EVTSTRM: |
| 271 | return features->evtstrm; |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 272 | case ARM_AES: |
| 273 | return features->aes; |
| 274 | case ARM_PMULL: |
| 275 | return features->pmull; |
| 276 | case ARM_SHA1: |
| 277 | return features->sha1; |
| 278 | case ARM_SHA2: |
| 279 | return features->sha2; |
| 280 | case ARM_CRC32: |
| 281 | return features->crc32; |
| 282 | case ARM_LAST_: |
| 283 | break; |
| 284 | } |
| 285 | return false; |
| 286 | } |
| 287 | |
| 288 | const char* GetArmFeaturesEnumName(ArmFeaturesEnum value) { |
Dr.-Ing. Patrick Siegl | 22c05ed | 2019-06-29 22:02:23 +0200 | [diff] [blame] | 289 | if(value >= kConfigsSize) |
| 290 | return "unknown feature"; |
| 291 | return kConfigs[value].proc_cpuinfo_flag; |
Guillaume Chatelet | 439d371 | 2018-02-01 10:03:09 +0100 | [diff] [blame] | 292 | } |