blob: 8c92188823804a879b48d1d023a8acded2828917 [file] [log] [blame]
Marat Dukhan5496f852017-09-08 18:22:18 -07001#include <gtest/gtest.h>
2
3#include <cpuinfo.h>
4#include <cpuinfo-mock.h>
5
6
7TEST(PROCESSORS, count) {
Marat Dukhan30401972017-09-26 18:35:52 -07008 ASSERT_EQ(8, cpuinfo_get_processors_count());
Marat Dukhan5496f852017-09-08 18:22:18 -07009}
10
11TEST(PROCESSORS, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -070012 ASSERT_TRUE(cpuinfo_get_processors());
Marat Dukhan5496f852017-09-08 18:22:18 -070013}
14
Marat Dukhan2d37dc42017-09-25 01:32:37 -070015TEST(PROCESSORS, smt_id) {
Marat Dukhan30401972017-09-26 18:35:52 -070016 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
17 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
Marat Dukhan5496f852017-09-08 18:22:18 -070018 }
19}
20
Marat Dukhan2d37dc42017-09-25 01:32:37 -070021TEST(PROCESSORS, core) {
Marat Dukhan30401972017-09-26 18:35:52 -070022 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
23 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070024 }
25}
26
27TEST(PROCESSORS, package) {
Marat Dukhan30401972017-09-26 18:35:52 -070028 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
29 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
Marat Dukhan5496f852017-09-08 18:22:18 -070030 }
31}
32
Marat Dukhan846c1782017-09-13 09:47:26 -070033TEST(PROCESSORS, linux_id) {
Marat Dukhan30401972017-09-26 18:35:52 -070034 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
Marat Dukhan846c1782017-09-13 09:47:26 -070035 switch (i) {
36 case 0:
37 case 1:
38 case 2:
39 case 3:
Marat Dukhan30401972017-09-26 18:35:52 -070040 ASSERT_EQ(i + 4, cpuinfo_get_processor(i)->linux_id);
Marat Dukhan846c1782017-09-13 09:47:26 -070041 break;
42 case 4:
43 case 5:
44 case 6:
45 case 7:
Marat Dukhan30401972017-09-26 18:35:52 -070046 ASSERT_EQ(i - 4, cpuinfo_get_processor(i)->linux_id);
Marat Dukhan846c1782017-09-13 09:47:26 -070047 break;
48 }
49 }
50}
51
Marat Dukhan2d37dc42017-09-25 01:32:37 -070052TEST(PROCESSORS, l1i) {
Marat Dukhan30401972017-09-26 18:35:52 -070053 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
54 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070055 }
56}
57
58TEST(PROCESSORS, l1d) {
Marat Dukhan30401972017-09-26 18:35:52 -070059 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
60 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070061 }
62}
63
64TEST(PROCESSORS, l2) {
Marat Dukhan30401972017-09-26 18:35:52 -070065 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
Marat Dukhan2d37dc42017-09-25 01:32:37 -070066 switch (i) {
67 case 0:
68 case 1:
69 case 2:
70 case 3:
Marat Dukhan30401972017-09-26 18:35:52 -070071 ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070072 break;
73 case 4:
74 case 5:
75 case 6:
76 case 7:
Marat Dukhan30401972017-09-26 18:35:52 -070077 ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070078 break;
79 }
80 }
81}
82
83TEST(PROCESSORS, l3) {
Marat Dukhan30401972017-09-26 18:35:52 -070084 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
85 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070086 }
87}
88
89TEST(PROCESSORS, l4) {
Marat Dukhan30401972017-09-26 18:35:52 -070090 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
91 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070092 }
93}
94
Marat Dukhan7073e832017-09-24 22:23:55 -070095TEST(CORES, count) {
Marat Dukhan30401972017-09-26 18:35:52 -070096 ASSERT_EQ(8, cpuinfo_get_cores_count());
Marat Dukhan7073e832017-09-24 22:23:55 -070097}
98
Marat Dukhan2d37dc42017-09-25 01:32:37 -070099TEST(CORES, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -0700100 ASSERT_TRUE(cpuinfo_get_cores());
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700101}
102
Marat Dukhan7073e832017-09-24 22:23:55 -0700103TEST(CORES, processor_start) {
Marat Dukhan30401972017-09-26 18:35:52 -0700104 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
105 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
Marat Dukhan7073e832017-09-24 22:23:55 -0700106 }
107}
108
109TEST(CORES, processor_count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700110 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
111 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
Marat Dukhan7073e832017-09-24 22:23:55 -0700112 }
113}
114
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700115TEST(CORES, core_id) {
Marat Dukhan30401972017-09-26 18:35:52 -0700116 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
117 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700118 }
119}
120
121TEST(CORES, package) {
Marat Dukhan30401972017-09-26 18:35:52 -0700122 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
123 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700124 }
125}
126
127TEST(CORES, vendor) {
Marat Dukhan30401972017-09-26 18:35:52 -0700128 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
129 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700130 }
131}
132
133TEST(CORES, uarch) {
Marat Dukhan30401972017-09-26 18:35:52 -0700134 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
135 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700136 }
137}
138
139TEST(CORES, midr) {
Marat Dukhan30401972017-09-26 18:35:52 -0700140 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
141 ASSERT_EQ(UINT32_C(0x410FD033), cpuinfo_get_core(i)->midr);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700142 }
143}
144
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700145TEST(PACKAGES, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700146 ASSERT_EQ(1, cpuinfo_get_packages_count());
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700147}
148
149TEST(PACKAGES, name) {
Marat Dukhan30401972017-09-26 18:35:52 -0700150 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700151 ASSERT_EQ("Samsung Exynos 7580",
Marat Dukhan30401972017-09-26 18:35:52 -0700152 std::string(cpuinfo_get_package(i)->name,
153 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700154 }
155}
156
157TEST(PACKAGES, processor_start) {
Marat Dukhan30401972017-09-26 18:35:52 -0700158 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
159 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700160 }
161}
162
163TEST(PACKAGES, processor_count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700164 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
165 ASSERT_EQ(8, cpuinfo_get_package(i)->processor_count);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700166 }
167}
168
169TEST(PACKAGES, core_start) {
Marat Dukhan30401972017-09-26 18:35:52 -0700170 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
171 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700172 }
173}
174
175TEST(PACKAGES, core_count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700176 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
177 ASSERT_EQ(8, cpuinfo_get_package(i)->core_count);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700178 }
179}
180
Marat Dukhan5496f852017-09-08 18:22:18 -0700181TEST(ISA, thumb) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700182 #if CPUINFO_ARCH_ARM
183 ASSERT_TRUE(cpuinfo_has_arm_thumb());
184 #elif CPUINFO_ARCH_ARM64
185 ASSERT_FALSE(cpuinfo_has_arm_thumb());
186 #endif
Marat Dukhan5496f852017-09-08 18:22:18 -0700187}
188
189TEST(ISA, thumb2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700190 #if CPUINFO_ARCH_ARM
191 ASSERT_TRUE(cpuinfo_has_arm_thumb2());
192 #elif CPUINFO_ARCH_ARM64
193 ASSERT_FALSE(cpuinfo_has_arm_thumb2());
194 #endif
Marat Dukhan5496f852017-09-08 18:22:18 -0700195}
196
197TEST(ISA, armv5e) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700198 #if CPUINFO_ARCH_ARM
199 ASSERT_TRUE(cpuinfo_has_arm_v5e());
200 #elif CPUINFO_ARCH_ARM64
201 ASSERT_FALSE(cpuinfo_has_arm_v5e());
202 #endif
Marat Dukhan5496f852017-09-08 18:22:18 -0700203}
204
205TEST(ISA, armv6) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700206 #if CPUINFO_ARCH_ARM
207 ASSERT_TRUE(cpuinfo_has_arm_v6());
208 #elif CPUINFO_ARCH_ARM64
209 ASSERT_FALSE(cpuinfo_has_arm_v6());
210 #endif
Marat Dukhan5496f852017-09-08 18:22:18 -0700211}
212
213TEST(ISA, armv6k) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700214 #if CPUINFO_ARCH_ARM
215 ASSERT_TRUE(cpuinfo_has_arm_v6k());
216 #elif CPUINFO_ARCH_ARM64
217 ASSERT_FALSE(cpuinfo_has_arm_v6k());
218 #endif
Marat Dukhan5496f852017-09-08 18:22:18 -0700219}
220
221TEST(ISA, armv7) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700222 #if CPUINFO_ARCH_ARM
223 ASSERT_TRUE(cpuinfo_has_arm_v7());
224 #elif CPUINFO_ARCH_ARM64
225 ASSERT_FALSE(cpuinfo_has_arm_v7());
226 #endif
Marat Dukhan5496f852017-09-08 18:22:18 -0700227}
228
229TEST(ISA, armv7mp) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700230 #if CPUINFO_ARCH_ARM
231 ASSERT_TRUE(cpuinfo_has_arm_v7mp());
232 #elif CPUINFO_ARCH_ARM64
233 ASSERT_FALSE(cpuinfo_has_arm_v7mp());
234 #endif
Marat Dukhan5496f852017-09-08 18:22:18 -0700235}
236
237TEST(ISA, idiv) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700238 ASSERT_TRUE(cpuinfo_has_arm_idiv());
Marat Dukhan5496f852017-09-08 18:22:18 -0700239}
240
241TEST(ISA, vfpv2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700242 ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
Marat Dukhan5496f852017-09-08 18:22:18 -0700243}
244
245TEST(ISA, vfpv3) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700246 ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
Marat Dukhan5496f852017-09-08 18:22:18 -0700247}
248
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700249TEST(ISA, vfpv3_d32) {
250 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
Marat Dukhan5496f852017-09-08 18:22:18 -0700251}
252
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700253TEST(ISA, vfpv3_fp16) {
254 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16());
Marat Dukhan5496f852017-09-08 18:22:18 -0700255}
256
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700257TEST(ISA, vfpv3_fp16_d32) {
258 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32());
259}
260
261TEST(ISA, vfpv4) {
262 ASSERT_TRUE(cpuinfo_has_arm_vfpv4());
263}
264
265TEST(ISA, vfpv4_d32) {
266 ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32());
Marat Dukhan5496f852017-09-08 18:22:18 -0700267}
268
269TEST(ISA, wmmx) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700270 ASSERT_FALSE(cpuinfo_has_arm_wmmx());
Marat Dukhan5496f852017-09-08 18:22:18 -0700271}
272
273TEST(ISA, wmmx2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700274 ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
Marat Dukhan5496f852017-09-08 18:22:18 -0700275}
276
277TEST(ISA, neon) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700278 ASSERT_TRUE(cpuinfo_has_arm_neon());
Marat Dukhan5496f852017-09-08 18:22:18 -0700279}
280
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700281TEST(ISA, neon_fp16) {
282 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16());
Marat Dukhan5496f852017-09-08 18:22:18 -0700283}
284
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700285TEST(ISA, neon_fma) {
286 ASSERT_TRUE(cpuinfo_has_arm_neon_fma());
Marat Dukhan5496f852017-09-08 18:22:18 -0700287}
288
Marat Dukhan3e8e1c72017-09-13 12:15:35 -0700289TEST(ISA, atomics) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700290 ASSERT_FALSE(cpuinfo_has_arm_atomics());
Marat Dukhan3e8e1c72017-09-13 12:15:35 -0700291}
292
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700293TEST(ISA, neon_rdm) {
294 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
Marat Dukhan3e8e1c72017-09-13 12:15:35 -0700295}
296
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700297TEST(ISA, fp16_arith) {
298 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
Marat Dukhan3e8e1c72017-09-13 12:15:35 -0700299}
300
301TEST(ISA, jscvt) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700302 ASSERT_FALSE(cpuinfo_has_arm_jscvt());
Marat Dukhan3e8e1c72017-09-13 12:15:35 -0700303}
304
305TEST(ISA, fcma) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700306 ASSERT_FALSE(cpuinfo_has_arm_fcma());
Marat Dukhan3e8e1c72017-09-13 12:15:35 -0700307}
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700308
309TEST(ISA, aes) {
310 ASSERT_TRUE(cpuinfo_has_arm_aes());
311}
312
313TEST(ISA, sha1) {
314 ASSERT_TRUE(cpuinfo_has_arm_sha1());
315}
316
317TEST(ISA, sha2) {
318 ASSERT_TRUE(cpuinfo_has_arm_sha2());
319}
320
321TEST(ISA, pmull) {
322 ASSERT_TRUE(cpuinfo_has_arm_pmull());
323}
324
325TEST(ISA, crc32) {
326 ASSERT_TRUE(cpuinfo_has_arm_crc32());
327}
Marat Dukhan3e8e1c72017-09-13 12:15:35 -0700328
Marat Dukhan5496f852017-09-08 18:22:18 -0700329TEST(L1I, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700330 ASSERT_EQ(8, cpuinfo_get_l1i_caches_count());
Marat Dukhan5496f852017-09-08 18:22:18 -0700331}
332
333TEST(L1I, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -0700334 ASSERT_TRUE(cpuinfo_get_l1i_caches());
Marat Dukhan5496f852017-09-08 18:22:18 -0700335}
336
337TEST(L1I, size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700338 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
339 ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size);
Marat Dukhan5496f852017-09-08 18:22:18 -0700340 }
341}
342
343TEST(L1I, associativity) {
Marat Dukhan30401972017-09-26 18:35:52 -0700344 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
345 ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity);
Marat Dukhan5496f852017-09-08 18:22:18 -0700346 }
347}
348
349TEST(L1I, sets) {
Marat Dukhan30401972017-09-26 18:35:52 -0700350 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
351 ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size,
352 cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity);
Marat Dukhan5496f852017-09-08 18:22:18 -0700353 }
354}
355
356TEST(L1I, partitions) {
Marat Dukhan30401972017-09-26 18:35:52 -0700357 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
358 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
Marat Dukhan5496f852017-09-08 18:22:18 -0700359 }
360}
361
362TEST(L1I, line_size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700363 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
364 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
Marat Dukhan5496f852017-09-08 18:22:18 -0700365 }
366}
367
368TEST(L1I, flags) {
Marat Dukhan30401972017-09-26 18:35:52 -0700369 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
370 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
Marat Dukhan5496f852017-09-08 18:22:18 -0700371 }
372}
373
374TEST(L1I, processors) {
Marat Dukhan30401972017-09-26 18:35:52 -0700375 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
376 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
377 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
Marat Dukhan5496f852017-09-08 18:22:18 -0700378 }
379}
380
381TEST(L1D, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700382 ASSERT_EQ(8, cpuinfo_get_l1d_caches_count());
Marat Dukhan5496f852017-09-08 18:22:18 -0700383}
384
385TEST(L1D, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -0700386 ASSERT_TRUE(cpuinfo_get_l1d_caches());
Marat Dukhan5496f852017-09-08 18:22:18 -0700387}
388
389TEST(L1D, size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700390 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
391 ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size);
Marat Dukhan5496f852017-09-08 18:22:18 -0700392 }
393}
394
395TEST(L1D, associativity) {
Marat Dukhan30401972017-09-26 18:35:52 -0700396 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
397 ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity);
Marat Dukhan5496f852017-09-08 18:22:18 -0700398 }
399}
400
401TEST(L1D, sets) {
Marat Dukhan30401972017-09-26 18:35:52 -0700402 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
403 ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size,
404 cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity);
Marat Dukhan5496f852017-09-08 18:22:18 -0700405 }
406}
407
408TEST(L1D, partitions) {
Marat Dukhan30401972017-09-26 18:35:52 -0700409 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
410 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
Marat Dukhan5496f852017-09-08 18:22:18 -0700411 }
412}
413
414TEST(L1D, line_size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700415 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
416 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
Marat Dukhan5496f852017-09-08 18:22:18 -0700417 }
418}
419
420TEST(L1D, flags) {
Marat Dukhan30401972017-09-26 18:35:52 -0700421 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
422 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
Marat Dukhan5496f852017-09-08 18:22:18 -0700423 }
424}
425
426TEST(L1D, processors) {
Marat Dukhan30401972017-09-26 18:35:52 -0700427 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
428 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
429 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
Marat Dukhan5496f852017-09-08 18:22:18 -0700430 }
431}
432
433TEST(L2, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700434 ASSERT_EQ(2, cpuinfo_get_l2_caches_count());
Marat Dukhan5496f852017-09-08 18:22:18 -0700435}
436
437TEST(L2, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -0700438 ASSERT_TRUE(cpuinfo_get_l2_caches());
Marat Dukhan5496f852017-09-08 18:22:18 -0700439}
440
441TEST(L2, size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700442 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
443 ASSERT_EQ(256 * 1024, cpuinfo_get_l2_cache(i)->size);
Marat Dukhan5496f852017-09-08 18:22:18 -0700444 }
445}
446
447TEST(L2, associativity) {
Marat Dukhan30401972017-09-26 18:35:52 -0700448 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
449 ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity);
Marat Dukhan5496f852017-09-08 18:22:18 -0700450 }
451}
452
453TEST(L2, sets) {
Marat Dukhan30401972017-09-26 18:35:52 -0700454 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
455 ASSERT_EQ(cpuinfo_get_l2_cache(i)->size,
456 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
Marat Dukhan5496f852017-09-08 18:22:18 -0700457 }
458}
459
460TEST(L2, partitions) {
Marat Dukhan30401972017-09-26 18:35:52 -0700461 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
462 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
Marat Dukhan5496f852017-09-08 18:22:18 -0700463 }
464}
465
466TEST(L2, line_size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700467 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
468 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
Marat Dukhan5496f852017-09-08 18:22:18 -0700469 }
470}
471
472TEST(L2, flags) {
Marat Dukhan30401972017-09-26 18:35:52 -0700473 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
474 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
Marat Dukhan5496f852017-09-08 18:22:18 -0700475 }
476}
477
478TEST(L2, processors) {
Marat Dukhan30401972017-09-26 18:35:52 -0700479 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
480 switch (i) {
Marat Dukhan5496f852017-09-08 18:22:18 -0700481 case 0:
Marat Dukhan30401972017-09-26 18:35:52 -0700482 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start);
483 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
Marat Dukhan5496f852017-09-08 18:22:18 -0700484 break;
485 case 1:
Marat Dukhan30401972017-09-26 18:35:52 -0700486 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_start);
487 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
Marat Dukhan5496f852017-09-08 18:22:18 -0700488 break;
489 }
490 }
491}
492
493TEST(L3, none) {
Marat Dukhan30401972017-09-26 18:35:52 -0700494 ASSERT_EQ(0, cpuinfo_get_l3_caches_count());
495 ASSERT_FALSE(cpuinfo_get_l3_caches());
Marat Dukhan5496f852017-09-08 18:22:18 -0700496}
497
498TEST(L4, none) {
Marat Dukhan30401972017-09-26 18:35:52 -0700499 ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
500 ASSERT_FALSE(cpuinfo_get_l4_caches());
Marat Dukhan5496f852017-09-08 18:22:18 -0700501}
502
503#include <galaxy-j7-tmobile.h>
504
505int main(int argc, char* argv[]) {
Marat Dukhan63a7a6b2017-11-29 15:11:56 -0800506#if CPUINFO_ARCH_ARM
507 cpuinfo_set_hwcap(UINT32_C(0x0007B0D6));
508 cpuinfo_set_hwcap2(UINT32_C(0x0000001F));
Marat Dukhan63a7a6b2017-11-29 15:11:56 -0800509#endif
Marat Dukhan5496f852017-09-08 18:22:18 -0700510 cpuinfo_mock_filesystem(filesystem);
Marat Dukhand1565252017-09-12 00:29:01 -0700511#ifdef __ANDROID__
512 cpuinfo_mock_android_properties(properties);
513#endif
Marat Dukhan5496f852017-09-08 18:22:18 -0700514 cpuinfo_initialize();
515 ::testing::InitGoogleTest(&argc, argv);
516 return RUN_ALL_TESTS();
Marat Dukhan30401972017-09-26 18:35:52 -0700517}