Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 1 | #include <gtest/gtest.h> |
| 2 | |
| 3 | #include <cpuinfo.h> |
| 4 | #include <cpuinfo-mock.h> |
| 5 | |
| 6 | |
| 7 | TEST(PROCESSORS, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 8 | ASSERT_EQ(6, cpuinfo_get_processors_count()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 9 | } |
| 10 | |
| 11 | TEST(PROCESSORS, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 12 | ASSERT_TRUE(cpuinfo_get_processors()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 13 | } |
| 14 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 15 | TEST(PROCESSORS, smt_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 16 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 17 | ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 18 | } |
| 19 | } |
| 20 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 21 | TEST(PROCESSORS, core) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 22 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 23 | ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 24 | } |
| 25 | } |
| 26 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame^] | 27 | TEST(PROCESSORS, cluster) { |
| 28 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 29 | switch (i) { |
| 30 | case 0: |
| 31 | case 1: |
| 32 | ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster); |
| 33 | break; |
| 34 | case 2: |
| 35 | case 3: |
| 36 | case 4: |
| 37 | case 5: |
| 38 | ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster); |
| 39 | break; |
| 40 | } |
| 41 | } |
| 42 | } |
| 43 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 44 | TEST(PROCESSORS, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 45 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 46 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 47 | } |
| 48 | } |
| 49 | |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 50 | TEST(PROCESSORS, linux_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 51 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 52 | switch (i) { |
| 53 | case 0: |
| 54 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 55 | ASSERT_EQ(i + 4, cpuinfo_get_processor(i)->linux_id); |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 56 | break; |
| 57 | case 2: |
| 58 | case 3: |
| 59 | case 4: |
| 60 | case 5: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 61 | ASSERT_EQ(i - 2, cpuinfo_get_processor(i)->linux_id); |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 62 | break; |
| 63 | } |
| 64 | } |
| 65 | } |
| 66 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 67 | TEST(PROCESSORS, l1i) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 68 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 69 | ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 70 | } |
| 71 | } |
| 72 | |
| 73 | TEST(PROCESSORS, l1d) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 74 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 75 | ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 76 | } |
| 77 | } |
| 78 | |
| 79 | TEST(PROCESSORS, l2) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 80 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 81 | switch (i) { |
| 82 | case 0: |
| 83 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 84 | ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 85 | break; |
| 86 | case 2: |
| 87 | case 3: |
| 88 | case 4: |
| 89 | case 5: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 90 | ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 91 | break; |
| 92 | } |
| 93 | } |
| 94 | } |
| 95 | |
| 96 | TEST(PROCESSORS, l3) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 97 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 98 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 99 | } |
| 100 | } |
| 101 | |
| 102 | TEST(PROCESSORS, l4) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 103 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 104 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 105 | } |
| 106 | } |
| 107 | |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 108 | TEST(CORES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 109 | ASSERT_EQ(6, cpuinfo_get_cores_count()); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 110 | } |
| 111 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 112 | TEST(CORES, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 113 | ASSERT_TRUE(cpuinfo_get_cores()); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 114 | } |
| 115 | |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 116 | TEST(CORES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 117 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 118 | ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 119 | } |
| 120 | } |
| 121 | |
| 122 | TEST(CORES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 123 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 124 | ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 125 | } |
| 126 | } |
| 127 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 128 | TEST(CORES, core_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 129 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 130 | ASSERT_EQ(i, cpuinfo_get_core(i)->core_id); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 131 | } |
| 132 | } |
| 133 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame^] | 134 | TEST(CORES, cluster) { |
| 135 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 136 | switch (i) { |
| 137 | case 0: |
| 138 | case 1: |
| 139 | ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster); |
| 140 | break; |
| 141 | case 2: |
| 142 | case 3: |
| 143 | case 4: |
| 144 | case 5: |
| 145 | ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_core(i)->cluster); |
| 146 | break; |
| 147 | } |
| 148 | } |
| 149 | } |
| 150 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 151 | TEST(CORES, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 152 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 153 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 154 | } |
| 155 | } |
| 156 | |
| 157 | TEST(CORES, vendor) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 158 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 159 | ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 160 | } |
| 161 | } |
| 162 | |
| 163 | TEST(CORES, uarch) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 164 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 165 | switch (i) { |
| 166 | case 0: |
| 167 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 168 | ASSERT_EQ(cpuinfo_uarch_cortex_a57, cpuinfo_get_core(i)->uarch); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 169 | break; |
| 170 | case 2: |
| 171 | case 3: |
| 172 | case 4: |
| 173 | case 5: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 174 | ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 175 | break; |
| 176 | } |
| 177 | } |
| 178 | } |
| 179 | |
| 180 | TEST(CORES, midr) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 181 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 182 | switch (i) { |
| 183 | case 0: |
| 184 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 185 | ASSERT_EQ(UINT32_C(0x411FD072), cpuinfo_get_core(i)->midr); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 186 | break; |
| 187 | case 2: |
| 188 | case 3: |
| 189 | case 4: |
| 190 | case 5: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 191 | ASSERT_EQ(UINT32_C(0x410FD033), cpuinfo_get_core(i)->midr); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 192 | break; |
| 193 | } |
| 194 | } |
| 195 | } |
| 196 | |
Marat Dukhan | 575a630 | 2018-03-10 14:38:49 -0800 | [diff] [blame] | 197 | TEST(CORES, DISABLED_frequency) { |
| 198 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 199 | switch (i) { |
| 200 | case 0: |
| 201 | case 1: |
| 202 | ASSERT_EQ(UINT64_C(1824000000), cpuinfo_get_core(i)->frequency); |
| 203 | break; |
| 204 | case 2: |
| 205 | case 3: |
| 206 | case 4: |
| 207 | case 5: |
| 208 | ASSERT_EQ(UINT64_C(1440000000), cpuinfo_get_core(i)->frequency); |
| 209 | break; |
| 210 | } |
| 211 | } |
| 212 | } |
| 213 | |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 214 | TEST(PACKAGES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 215 | ASSERT_EQ(1, cpuinfo_get_packages_count()); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 216 | } |
| 217 | |
| 218 | TEST(PACKAGES, name) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 219 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 220 | ASSERT_EQ("Qualcomm MSM8992", |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 221 | std::string(cpuinfo_get_package(i)->name, |
| 222 | strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX))); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 223 | } |
| 224 | } |
| 225 | |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 226 | TEST(PACKAGES, gpu_name) { |
| 227 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 228 | ASSERT_EQ("Qualcomm Adreno 418", |
| 229 | std::string(cpuinfo_get_package(i)->gpu_name, |
| 230 | strnlen(cpuinfo_get_package(i)->gpu_name, CPUINFO_GPU_NAME_MAX))); |
| 231 | } |
| 232 | } |
| 233 | |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 234 | TEST(PACKAGES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 235 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 236 | ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 237 | } |
| 238 | } |
| 239 | |
| 240 | TEST(PACKAGES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 241 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 242 | ASSERT_EQ(6, cpuinfo_get_package(i)->processor_count); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 243 | } |
| 244 | } |
| 245 | |
| 246 | TEST(PACKAGES, core_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 247 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 248 | ASSERT_EQ(0, cpuinfo_get_package(i)->core_start); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 249 | } |
| 250 | } |
| 251 | |
| 252 | TEST(PACKAGES, core_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 253 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 254 | ASSERT_EQ(6, cpuinfo_get_package(i)->core_count); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 255 | } |
| 256 | } |
| 257 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame^] | 258 | TEST(PACKAGES, cluster_start) { |
| 259 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 260 | ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start); |
| 261 | } |
| 262 | } |
| 263 | |
| 264 | TEST(PACKAGES, cluster_count) { |
| 265 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 266 | ASSERT_EQ(2, cpuinfo_get_package(i)->cluster_count); |
| 267 | } |
| 268 | } |
| 269 | |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 270 | TEST(ISA, thumb) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 271 | #if CPUINFO_ARCH_ARM |
| 272 | ASSERT_TRUE(cpuinfo_has_arm_thumb()); |
| 273 | #elif CPUINFO_ARCH_ARM64 |
| 274 | ASSERT_FALSE(cpuinfo_has_arm_thumb()); |
| 275 | #endif |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 276 | } |
| 277 | |
| 278 | TEST(ISA, thumb2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 279 | #if CPUINFO_ARCH_ARM |
| 280 | ASSERT_TRUE(cpuinfo_has_arm_thumb2()); |
| 281 | #elif CPUINFO_ARCH_ARM64 |
| 282 | ASSERT_FALSE(cpuinfo_has_arm_thumb2()); |
| 283 | #endif |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 284 | } |
| 285 | |
| 286 | TEST(ISA, armv5e) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 287 | #if CPUINFO_ARCH_ARM |
| 288 | ASSERT_TRUE(cpuinfo_has_arm_v5e()); |
| 289 | #elif CPUINFO_ARCH_ARM64 |
| 290 | ASSERT_FALSE(cpuinfo_has_arm_v5e()); |
| 291 | #endif |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 292 | } |
| 293 | |
| 294 | TEST(ISA, armv6) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 295 | #if CPUINFO_ARCH_ARM |
| 296 | ASSERT_TRUE(cpuinfo_has_arm_v6()); |
| 297 | #elif CPUINFO_ARCH_ARM64 |
| 298 | ASSERT_FALSE(cpuinfo_has_arm_v6()); |
| 299 | #endif |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 300 | } |
| 301 | |
| 302 | TEST(ISA, armv6k) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 303 | #if CPUINFO_ARCH_ARM |
| 304 | ASSERT_TRUE(cpuinfo_has_arm_v6k()); |
| 305 | #elif CPUINFO_ARCH_ARM64 |
| 306 | ASSERT_FALSE(cpuinfo_has_arm_v6k()); |
| 307 | #endif |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 308 | } |
| 309 | |
| 310 | TEST(ISA, armv7) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 311 | #if CPUINFO_ARCH_ARM |
| 312 | ASSERT_TRUE(cpuinfo_has_arm_v7()); |
| 313 | #elif CPUINFO_ARCH_ARM64 |
| 314 | ASSERT_FALSE(cpuinfo_has_arm_v7()); |
| 315 | #endif |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 316 | } |
| 317 | |
| 318 | TEST(ISA, armv7mp) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 319 | #if CPUINFO_ARCH_ARM |
| 320 | ASSERT_TRUE(cpuinfo_has_arm_v7mp()); |
| 321 | #elif CPUINFO_ARCH_ARM64 |
| 322 | ASSERT_FALSE(cpuinfo_has_arm_v7mp()); |
| 323 | #endif |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 324 | } |
| 325 | |
| 326 | TEST(ISA, idiv) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 327 | ASSERT_TRUE(cpuinfo_has_arm_idiv()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 328 | } |
| 329 | |
| 330 | TEST(ISA, vfpv2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 331 | ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 332 | } |
| 333 | |
| 334 | TEST(ISA, vfpv3) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 335 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 336 | } |
| 337 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 338 | TEST(ISA, vfpv3_d32) { |
| 339 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 340 | } |
| 341 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 342 | TEST(ISA, vfpv3_fp16) { |
| 343 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 344 | } |
| 345 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 346 | TEST(ISA, vfpv3_fp16_d32) { |
| 347 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); |
| 348 | } |
| 349 | |
| 350 | TEST(ISA, vfpv4) { |
| 351 | ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); |
| 352 | } |
| 353 | |
| 354 | TEST(ISA, vfpv4_d32) { |
| 355 | ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 356 | } |
| 357 | |
| 358 | TEST(ISA, wmmx) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 359 | ASSERT_FALSE(cpuinfo_has_arm_wmmx()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 360 | } |
| 361 | |
| 362 | TEST(ISA, wmmx2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 363 | ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 364 | } |
| 365 | |
| 366 | TEST(ISA, neon) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 367 | ASSERT_TRUE(cpuinfo_has_arm_neon()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 368 | } |
| 369 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 370 | TEST(ISA, neon_fp16) { |
| 371 | ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 372 | } |
| 373 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 374 | TEST(ISA, neon_fma) { |
| 375 | ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 376 | } |
| 377 | |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 378 | TEST(ISA, atomics) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 379 | ASSERT_FALSE(cpuinfo_has_arm_atomics()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 380 | } |
| 381 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 382 | TEST(ISA, neon_rdm) { |
| 383 | ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 384 | } |
| 385 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 386 | TEST(ISA, fp16_arith) { |
| 387 | ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 388 | } |
| 389 | |
| 390 | TEST(ISA, jscvt) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 391 | ASSERT_FALSE(cpuinfo_has_arm_jscvt()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 392 | } |
| 393 | |
| 394 | TEST(ISA, fcma) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 395 | ASSERT_FALSE(cpuinfo_has_arm_fcma()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 396 | } |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 397 | |
| 398 | TEST(ISA, aes) { |
| 399 | ASSERT_TRUE(cpuinfo_has_arm_aes()); |
| 400 | } |
| 401 | |
| 402 | TEST(ISA, sha1) { |
| 403 | ASSERT_TRUE(cpuinfo_has_arm_sha1()); |
| 404 | } |
| 405 | |
| 406 | TEST(ISA, sha2) { |
| 407 | ASSERT_TRUE(cpuinfo_has_arm_sha2()); |
| 408 | } |
| 409 | |
| 410 | TEST(ISA, pmull) { |
| 411 | ASSERT_TRUE(cpuinfo_has_arm_pmull()); |
| 412 | } |
| 413 | |
| 414 | TEST(ISA, crc32) { |
| 415 | ASSERT_TRUE(cpuinfo_has_arm_crc32()); |
| 416 | } |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 417 | |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 418 | TEST(L1I, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 419 | ASSERT_EQ(6, cpuinfo_get_l1i_caches_count()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 420 | } |
| 421 | |
| 422 | TEST(L1I, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 423 | ASSERT_TRUE(cpuinfo_get_l1i_caches()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 424 | } |
| 425 | |
| 426 | TEST(L1I, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 427 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 428 | switch (i) { |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 429 | case 0: |
| 430 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 431 | ASSERT_EQ(48 * 1024, cpuinfo_get_l1i_cache(i)->size); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 432 | break; |
| 433 | case 2: |
| 434 | case 3: |
| 435 | case 4: |
| 436 | case 5: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 437 | ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 438 | break; |
| 439 | } |
| 440 | } |
| 441 | } |
| 442 | |
| 443 | TEST(L1I, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 444 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 445 | switch (i) { |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 446 | case 0: |
| 447 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 448 | ASSERT_EQ(3, cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 449 | break; |
| 450 | case 2: |
| 451 | case 3: |
| 452 | case 4: |
| 453 | case 5: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 454 | ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 455 | break; |
| 456 | } |
| 457 | } |
| 458 | } |
| 459 | |
| 460 | TEST(L1I, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 461 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 462 | ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size, |
| 463 | cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 464 | } |
| 465 | } |
| 466 | |
| 467 | TEST(L1I, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 468 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 469 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 470 | } |
| 471 | } |
| 472 | |
| 473 | TEST(L1I, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 474 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 475 | ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 476 | } |
| 477 | } |
| 478 | |
| 479 | TEST(L1I, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 480 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 481 | ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 482 | } |
| 483 | } |
| 484 | |
| 485 | TEST(L1I, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 486 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 487 | ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start); |
| 488 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 489 | } |
| 490 | } |
| 491 | |
| 492 | TEST(L1D, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 493 | ASSERT_EQ(6, cpuinfo_get_l1d_caches_count()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 494 | } |
| 495 | |
| 496 | TEST(L1D, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 497 | ASSERT_TRUE(cpuinfo_get_l1d_caches()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 498 | } |
| 499 | |
| 500 | TEST(L1D, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 501 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 502 | ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 503 | } |
| 504 | } |
| 505 | |
| 506 | TEST(L1D, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 507 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 508 | switch (i) { |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 509 | case 0: |
| 510 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 511 | ASSERT_EQ(2, cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 512 | break; |
| 513 | case 2: |
| 514 | case 3: |
| 515 | case 4: |
| 516 | case 5: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 517 | ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 518 | break; |
| 519 | } |
| 520 | } |
| 521 | } |
| 522 | |
| 523 | TEST(L1D, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 524 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 525 | ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size, |
| 526 | cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 527 | } |
| 528 | } |
| 529 | |
| 530 | TEST(L1D, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 531 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 532 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 533 | } |
| 534 | } |
| 535 | |
| 536 | TEST(L1D, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 537 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 538 | ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 539 | } |
| 540 | } |
| 541 | |
| 542 | TEST(L1D, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 543 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 544 | ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 545 | } |
| 546 | } |
| 547 | |
| 548 | TEST(L1D, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 549 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 550 | ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start); |
| 551 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 552 | } |
| 553 | } |
| 554 | |
| 555 | TEST(L2, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 556 | ASSERT_EQ(2, cpuinfo_get_l2_caches_count()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 557 | } |
| 558 | |
| 559 | TEST(L2, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 560 | ASSERT_TRUE(cpuinfo_get_l2_caches()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 561 | } |
| 562 | |
| 563 | TEST(L2, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 564 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 565 | switch (i) { |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 566 | case 0: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 567 | ASSERT_EQ(1 * 1024 * 1024, cpuinfo_get_l2_cache(i)->size); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 568 | break; |
| 569 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 570 | ASSERT_EQ(512 * 1024, cpuinfo_get_l2_cache(i)->size); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 571 | break; |
| 572 | } |
| 573 | } |
| 574 | } |
| 575 | |
| 576 | TEST(L2, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 577 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 578 | ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 579 | } |
| 580 | } |
| 581 | |
| 582 | TEST(L2, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 583 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 584 | ASSERT_EQ(cpuinfo_get_l2_cache(i)->size, |
| 585 | cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 586 | } |
| 587 | } |
| 588 | |
| 589 | TEST(L2, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 590 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 591 | ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 592 | } |
| 593 | } |
| 594 | |
| 595 | TEST(L2, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 596 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 597 | ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 598 | } |
| 599 | } |
| 600 | |
| 601 | TEST(L2, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 602 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 603 | switch (i) { |
Marat Dukhan | b33716e | 2017-08-31 12:50:10 -0700 | [diff] [blame] | 604 | case 0: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 605 | ASSERT_EQ(CPUINFO_CACHE_INCLUSIVE, cpuinfo_get_l2_cache(i)->flags); |
Marat Dukhan | b33716e | 2017-08-31 12:50:10 -0700 | [diff] [blame] | 606 | break; |
| 607 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 608 | ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags); |
Marat Dukhan | b33716e | 2017-08-31 12:50:10 -0700 | [diff] [blame] | 609 | break; |
| 610 | } |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 611 | } |
| 612 | } |
| 613 | |
| 614 | TEST(L2, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 615 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 616 | switch (i) { |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 617 | case 0: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 618 | ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start); |
| 619 | ASSERT_EQ(2, cpuinfo_get_l2_cache(i)->processor_count); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 620 | break; |
| 621 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 622 | ASSERT_EQ(2, cpuinfo_get_l2_cache(i)->processor_start); |
| 623 | ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 624 | break; |
| 625 | } |
| 626 | } |
| 627 | } |
| 628 | |
| 629 | TEST(L3, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 630 | ASSERT_EQ(0, cpuinfo_get_l3_caches_count()); |
| 631 | ASSERT_FALSE(cpuinfo_get_l3_caches()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 632 | } |
| 633 | |
| 634 | TEST(L4, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 635 | ASSERT_EQ(0, cpuinfo_get_l4_caches_count()); |
| 636 | ASSERT_FALSE(cpuinfo_get_l4_caches()); |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 637 | } |
| 638 | |
| 639 | #include <nexus5x.h> |
| 640 | |
| 641 | int main(int argc, char* argv[]) { |
Marat Dukhan | 63a7a6b | 2017-11-29 15:11:56 -0800 | [diff] [blame] | 642 | #if CPUINFO_ARCH_ARM |
| 643 | cpuinfo_set_hwcap(UINT32_C(0x0027B0D6)); |
| 644 | cpuinfo_set_hwcap2(UINT32_C(0x0000001F)); |
| 645 | #elif CPUINFO_ARCH_ARM64 |
| 646 | cpuinfo_set_hwcap(UINT32_C(0x000000FF)); |
| 647 | #endif |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 648 | cpuinfo_mock_filesystem(filesystem); |
Marat Dukhan | 5659d29 | 2017-09-12 23:21:03 -0700 | [diff] [blame] | 649 | #ifdef __ANDROID__ |
| 650 | cpuinfo_mock_android_properties(properties); |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 651 | cpuinfo_mock_gl_renderer("Adreno (TM) 418"); |
Marat Dukhan | 5659d29 | 2017-09-12 23:21:03 -0700 | [diff] [blame] | 652 | #endif |
Marat Dukhan | 65b05d2 | 2017-08-11 00:53:02 -0700 | [diff] [blame] | 653 | cpuinfo_initialize(); |
| 654 | ::testing::InitGoogleTest(&argc, argv); |
| 655 | return RUN_ALL_TESTS(); |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 656 | } |