Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 1 | #include <gtest/gtest.h> |
| 2 | |
| 3 | #include <cpuinfo.h> |
| 4 | #include <cpuinfo-mock.h> |
| 5 | |
| 6 | |
| 7 | TEST(PROCESSORS, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 8 | ASSERT_EQ(8, cpuinfo_get_processors_count()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 9 | } |
| 10 | |
| 11 | TEST(PROCESSORS, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 12 | ASSERT_TRUE(cpuinfo_get_processors()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 13 | } |
| 14 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 15 | TEST(PROCESSORS, smt_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 16 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 17 | ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 18 | } |
| 19 | } |
| 20 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 21 | TEST(PROCESSORS, core) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 22 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 23 | ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 24 | } |
| 25 | } |
| 26 | |
| 27 | TEST(PROCESSORS, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 28 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 29 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 30 | } |
| 31 | } |
| 32 | |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 33 | TEST(PROCESSORS, linux_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 34 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 35 | switch (i) { |
| 36 | case 0: |
| 37 | case 1: |
| 38 | case 2: |
| 39 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 40 | ASSERT_EQ(i + 4, cpuinfo_get_processor(i)->linux_id); |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 41 | break; |
| 42 | case 4: |
| 43 | case 5: |
| 44 | case 6: |
| 45 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 46 | ASSERT_EQ(i - 4, cpuinfo_get_processor(i)->linux_id); |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 47 | break; |
| 48 | } |
| 49 | } |
| 50 | } |
| 51 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 52 | TEST(PROCESSORS, l1i) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 53 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 54 | ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 55 | } |
| 56 | } |
| 57 | |
| 58 | TEST(PROCESSORS, l1d) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 59 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 60 | ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 61 | } |
| 62 | } |
| 63 | |
| 64 | TEST(PROCESSORS, l2) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 65 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 66 | switch (i) { |
| 67 | case 0: |
| 68 | case 1: |
| 69 | case 2: |
| 70 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 71 | ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 72 | break; |
| 73 | case 4: |
| 74 | case 5: |
| 75 | case 6: |
| 76 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 77 | ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 78 | break; |
| 79 | } |
| 80 | } |
| 81 | } |
| 82 | |
| 83 | TEST(PROCESSORS, l3) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 84 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 85 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 86 | } |
| 87 | } |
| 88 | |
| 89 | TEST(PROCESSORS, l4) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 90 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 91 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 92 | } |
| 93 | } |
| 94 | |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 95 | TEST(CORES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 96 | ASSERT_EQ(8, cpuinfo_get_cores_count()); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 97 | } |
| 98 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 99 | TEST(CORES, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 100 | ASSERT_TRUE(cpuinfo_get_cores()); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 101 | } |
| 102 | |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 103 | TEST(CORES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 104 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 105 | ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 106 | } |
| 107 | } |
| 108 | |
| 109 | TEST(CORES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 110 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 111 | ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 112 | } |
| 113 | } |
| 114 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 115 | TEST(CORES, core_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 116 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 117 | ASSERT_EQ(i, cpuinfo_get_core(i)->core_id); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 118 | } |
| 119 | } |
| 120 | |
| 121 | TEST(CORES, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 122 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 123 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 124 | } |
| 125 | } |
| 126 | |
| 127 | TEST(CORES, vendor) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 128 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 129 | switch (i) { |
| 130 | case 0: |
| 131 | case 1: |
| 132 | case 2: |
| 133 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 134 | ASSERT_EQ(cpuinfo_vendor_samsung, cpuinfo_get_core(i)->vendor); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 135 | break; |
| 136 | case 4: |
| 137 | case 5: |
| 138 | case 6: |
| 139 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 140 | ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 141 | break; |
| 142 | } |
| 143 | } |
| 144 | } |
| 145 | |
| 146 | TEST(CORES, uarch) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 147 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 148 | switch (i) { |
| 149 | case 0: |
| 150 | case 1: |
| 151 | case 2: |
| 152 | case 3: |
Marat Dukhan | a750f2a | 2018-03-07 11:07:48 -0800 | [diff] [blame] | 153 | ASSERT_EQ(cpuinfo_uarch_mongoose_m1, cpuinfo_get_core(i)->uarch); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 154 | break; |
| 155 | case 4: |
| 156 | case 5: |
| 157 | case 6: |
| 158 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 159 | ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 160 | break; |
| 161 | } |
| 162 | } |
| 163 | } |
| 164 | |
| 165 | TEST(CORES, midr) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 166 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 167 | switch (i) { |
| 168 | case 0: |
| 169 | case 1: |
| 170 | case 2: |
| 171 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 172 | ASSERT_EQ(UINT32_C(0x531F0011), cpuinfo_get_core(i)->midr); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 173 | break; |
| 174 | case 4: |
| 175 | case 5: |
| 176 | case 6: |
| 177 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 178 | ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_core(i)->midr); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 179 | break; |
| 180 | } |
| 181 | } |
| 182 | } |
| 183 | |
Marat Dukhan | 575a630 | 2018-03-10 14:38:49 -0800 | [diff] [blame^] | 184 | TEST(CORES, DISABLED_frequency) { |
| 185 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 186 | switch (i) { |
| 187 | case 0: |
| 188 | case 1: |
| 189 | case 2: |
| 190 | case 3: |
| 191 | ASSERT_EQ(UINT64_C(2600000000), cpuinfo_get_core(i)->frequency); |
| 192 | break; |
| 193 | case 4: |
| 194 | case 5: |
| 195 | case 6: |
| 196 | case 7: |
| 197 | ASSERT_EQ(UINT64_C(1586000000), cpuinfo_get_core(i)->frequency); |
| 198 | break; |
| 199 | } |
| 200 | } |
| 201 | } |
| 202 | |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 203 | TEST(PACKAGES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 204 | ASSERT_EQ(1, cpuinfo_get_packages_count()); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 205 | } |
| 206 | |
| 207 | TEST(PACKAGES, name) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 208 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 209 | ASSERT_EQ("Samsung Exynos 8890", |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 210 | std::string(cpuinfo_get_package(i)->name, |
| 211 | strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX))); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 212 | } |
| 213 | } |
| 214 | |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 215 | TEST(PACKAGES, gpu_name) { |
| 216 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 217 | ASSERT_EQ("ARM Mali-T880", |
| 218 | std::string(cpuinfo_get_package(i)->gpu_name, |
| 219 | strnlen(cpuinfo_get_package(i)->gpu_name, CPUINFO_GPU_NAME_MAX))); |
| 220 | } |
| 221 | } |
| 222 | |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 223 | TEST(PACKAGES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 224 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 225 | ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 226 | } |
| 227 | } |
| 228 | |
| 229 | TEST(PACKAGES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 230 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 231 | ASSERT_EQ(8, cpuinfo_get_package(i)->processor_count); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 232 | } |
| 233 | } |
| 234 | |
| 235 | TEST(PACKAGES, core_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 236 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 237 | ASSERT_EQ(0, cpuinfo_get_package(i)->core_start); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 238 | } |
| 239 | } |
| 240 | |
| 241 | TEST(PACKAGES, core_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 242 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 243 | ASSERT_EQ(8, cpuinfo_get_package(i)->core_count); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 244 | } |
| 245 | } |
| 246 | |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 247 | TEST(ISA, thumb) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 248 | #if CPUINFO_ARCH_ARM |
| 249 | ASSERT_TRUE(cpuinfo_has_arm_thumb()); |
| 250 | #elif CPUINFO_ARCH_ARM64 |
| 251 | ASSERT_FALSE(cpuinfo_has_arm_thumb()); |
| 252 | #endif |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 253 | } |
| 254 | |
| 255 | TEST(ISA, thumb2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 256 | #if CPUINFO_ARCH_ARM |
| 257 | ASSERT_TRUE(cpuinfo_has_arm_thumb2()); |
| 258 | #elif CPUINFO_ARCH_ARM64 |
| 259 | ASSERT_FALSE(cpuinfo_has_arm_thumb2()); |
| 260 | #endif |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 261 | } |
| 262 | |
| 263 | TEST(ISA, armv5e) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 264 | #if CPUINFO_ARCH_ARM |
| 265 | ASSERT_TRUE(cpuinfo_has_arm_v5e()); |
| 266 | #elif CPUINFO_ARCH_ARM64 |
| 267 | ASSERT_FALSE(cpuinfo_has_arm_v5e()); |
| 268 | #endif |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 269 | } |
| 270 | |
| 271 | TEST(ISA, armv6) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 272 | #if CPUINFO_ARCH_ARM |
| 273 | ASSERT_TRUE(cpuinfo_has_arm_v6()); |
| 274 | #elif CPUINFO_ARCH_ARM64 |
| 275 | ASSERT_FALSE(cpuinfo_has_arm_v6()); |
| 276 | #endif |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 277 | } |
| 278 | |
| 279 | TEST(ISA, armv6k) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 280 | #if CPUINFO_ARCH_ARM |
| 281 | ASSERT_TRUE(cpuinfo_has_arm_v6k()); |
| 282 | #elif CPUINFO_ARCH_ARM64 |
| 283 | ASSERT_FALSE(cpuinfo_has_arm_v6k()); |
| 284 | #endif |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 285 | } |
| 286 | |
| 287 | TEST(ISA, armv7) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 288 | #if CPUINFO_ARCH_ARM |
| 289 | ASSERT_TRUE(cpuinfo_has_arm_v7()); |
| 290 | #elif CPUINFO_ARCH_ARM64 |
| 291 | ASSERT_FALSE(cpuinfo_has_arm_v7()); |
| 292 | #endif |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 293 | } |
| 294 | |
| 295 | TEST(ISA, armv7mp) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 296 | #if CPUINFO_ARCH_ARM |
| 297 | ASSERT_TRUE(cpuinfo_has_arm_v7mp()); |
| 298 | #elif CPUINFO_ARCH_ARM64 |
| 299 | ASSERT_FALSE(cpuinfo_has_arm_v7mp()); |
| 300 | #endif |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 301 | } |
| 302 | |
| 303 | TEST(ISA, idiv) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 304 | ASSERT_TRUE(cpuinfo_has_arm_idiv()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 305 | } |
| 306 | |
| 307 | TEST(ISA, vfpv2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 308 | ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 309 | } |
| 310 | |
| 311 | TEST(ISA, vfpv3) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 312 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 313 | } |
| 314 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 315 | TEST(ISA, vfpv3_d32) { |
| 316 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 317 | } |
| 318 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 319 | TEST(ISA, vfpv3_fp16) { |
| 320 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 321 | } |
| 322 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 323 | TEST(ISA, vfpv3_fp16_d32) { |
| 324 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); |
| 325 | } |
| 326 | |
| 327 | TEST(ISA, vfpv4) { |
| 328 | ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); |
| 329 | } |
| 330 | |
| 331 | TEST(ISA, vfpv4_d32) { |
| 332 | ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 333 | } |
| 334 | |
| 335 | TEST(ISA, wmmx) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 336 | ASSERT_FALSE(cpuinfo_has_arm_wmmx()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 337 | } |
| 338 | |
| 339 | TEST(ISA, wmmx2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 340 | ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 341 | } |
| 342 | |
| 343 | TEST(ISA, neon) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 344 | ASSERT_TRUE(cpuinfo_has_arm_neon()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 345 | } |
| 346 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 347 | TEST(ISA, neon_fp16) { |
| 348 | ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 349 | } |
| 350 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 351 | TEST(ISA, neon_fma) { |
| 352 | ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 353 | } |
| 354 | |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 355 | TEST(ISA, atomics) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 356 | ASSERT_FALSE(cpuinfo_has_arm_atomics()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 357 | } |
| 358 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 359 | TEST(ISA, neon_rdm) { |
| 360 | ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 361 | } |
| 362 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 363 | TEST(ISA, fp16_arith) { |
| 364 | ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 365 | } |
| 366 | |
| 367 | TEST(ISA, jscvt) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 368 | ASSERT_FALSE(cpuinfo_has_arm_jscvt()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 369 | } |
| 370 | |
| 371 | TEST(ISA, fcma) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 372 | ASSERT_FALSE(cpuinfo_has_arm_fcma()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 373 | } |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 374 | |
| 375 | TEST(ISA, aes) { |
| 376 | ASSERT_TRUE(cpuinfo_has_arm_aes()); |
| 377 | } |
| 378 | |
| 379 | TEST(ISA, sha1) { |
| 380 | ASSERT_TRUE(cpuinfo_has_arm_sha1()); |
| 381 | } |
| 382 | |
| 383 | TEST(ISA, sha2) { |
| 384 | ASSERT_TRUE(cpuinfo_has_arm_sha2()); |
| 385 | } |
| 386 | |
| 387 | TEST(ISA, pmull) { |
| 388 | ASSERT_TRUE(cpuinfo_has_arm_pmull()); |
| 389 | } |
| 390 | |
| 391 | TEST(ISA, crc32) { |
| 392 | ASSERT_TRUE(cpuinfo_has_arm_crc32()); |
| 393 | } |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 394 | |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 395 | TEST(L1I, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 396 | ASSERT_EQ(8, cpuinfo_get_l1i_caches_count()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 397 | } |
| 398 | |
| 399 | TEST(L1I, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 400 | ASSERT_TRUE(cpuinfo_get_l1i_caches()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 401 | } |
| 402 | |
| 403 | TEST(L1I, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 404 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 405 | switch (i) { |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 406 | case 0: |
| 407 | case 1: |
| 408 | case 2: |
| 409 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 410 | ASSERT_EQ(64 * 1024, cpuinfo_get_l1i_cache(i)->size); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 411 | break; |
| 412 | case 4: |
| 413 | case 5: |
| 414 | case 6: |
| 415 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 416 | ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 417 | break; |
| 418 | } |
| 419 | } |
| 420 | } |
| 421 | |
| 422 | TEST(L1I, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 423 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 424 | switch (i) { |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 425 | case 0: |
| 426 | case 1: |
| 427 | case 2: |
| 428 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 429 | ASSERT_EQ(4, cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 430 | break; |
| 431 | case 4: |
| 432 | case 5: |
| 433 | case 6: |
| 434 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 435 | ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 436 | break; |
| 437 | } |
| 438 | } |
| 439 | } |
| 440 | |
| 441 | TEST(L1I, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 442 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 443 | ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size, |
| 444 | cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 445 | } |
| 446 | } |
| 447 | |
| 448 | TEST(L1I, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 449 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 450 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 451 | } |
| 452 | } |
| 453 | |
| 454 | TEST(L1I, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 455 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 456 | switch (i) { |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 457 | case 0: |
| 458 | case 1: |
| 459 | case 2: |
| 460 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 461 | ASSERT_EQ(128, cpuinfo_get_l1i_cache(i)->line_size); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 462 | break; |
| 463 | case 4: |
| 464 | case 5: |
| 465 | case 6: |
| 466 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 467 | ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 468 | break; |
| 469 | } |
| 470 | } |
| 471 | } |
| 472 | |
| 473 | TEST(L1I, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 474 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 475 | ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 476 | } |
| 477 | } |
| 478 | |
| 479 | TEST(L1I, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 480 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 481 | ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start); |
| 482 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 483 | } |
| 484 | } |
| 485 | |
| 486 | TEST(L1D, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 487 | ASSERT_EQ(8, cpuinfo_get_l1d_caches_count()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 488 | } |
| 489 | |
| 490 | TEST(L1D, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 491 | ASSERT_TRUE(cpuinfo_get_l1d_caches()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 492 | } |
| 493 | |
| 494 | TEST(L1D, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 495 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 496 | ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 497 | } |
| 498 | } |
| 499 | |
| 500 | TEST(L1D, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 501 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 502 | switch (i) { |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 503 | case 0: |
| 504 | case 1: |
| 505 | case 2: |
| 506 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 507 | ASSERT_EQ(8, cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 508 | break; |
| 509 | case 4: |
| 510 | case 5: |
| 511 | case 6: |
| 512 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 513 | ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 514 | break; |
| 515 | } |
| 516 | } |
| 517 | } |
| 518 | |
| 519 | TEST(L1D, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 520 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 521 | ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size, |
| 522 | cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 523 | } |
| 524 | } |
| 525 | |
| 526 | TEST(L1D, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 527 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 528 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 529 | } |
| 530 | } |
| 531 | |
| 532 | TEST(L1D, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 533 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 534 | ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 535 | } |
| 536 | } |
| 537 | |
| 538 | TEST(L1D, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 539 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 540 | ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 541 | } |
| 542 | } |
| 543 | |
| 544 | TEST(L1D, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 545 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 546 | ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start); |
| 547 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 548 | } |
| 549 | } |
| 550 | |
| 551 | TEST(L2, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 552 | ASSERT_EQ(2, cpuinfo_get_l2_caches_count()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 553 | } |
| 554 | |
| 555 | TEST(L2, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 556 | ASSERT_TRUE(cpuinfo_get_l2_caches()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 557 | } |
| 558 | |
| 559 | TEST(L2, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 560 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 561 | switch (i) { |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 562 | case 0: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 563 | ASSERT_EQ(2 * 1024 * 1024, cpuinfo_get_l2_cache(i)->size); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 564 | break; |
| 565 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 566 | ASSERT_EQ(256 * 1024, cpuinfo_get_l2_cache(i)->size); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 567 | break; |
| 568 | } |
| 569 | } |
| 570 | } |
| 571 | |
| 572 | TEST(L2, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 573 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 574 | ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 575 | } |
| 576 | } |
| 577 | |
| 578 | TEST(L2, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 579 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 580 | ASSERT_EQ(cpuinfo_get_l2_cache(i)->size, |
| 581 | cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 582 | } |
| 583 | } |
| 584 | |
| 585 | TEST(L2, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 586 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 587 | ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 588 | } |
| 589 | } |
| 590 | |
| 591 | TEST(L2, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 592 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 593 | ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 594 | } |
| 595 | } |
| 596 | |
| 597 | TEST(L2, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 598 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 599 | ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 600 | } |
| 601 | } |
| 602 | |
| 603 | TEST(L2, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 604 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 605 | switch (i) { |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 606 | case 0: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 607 | ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start); |
| 608 | ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 609 | break; |
| 610 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 611 | ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_start); |
| 612 | ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 613 | break; |
| 614 | } |
| 615 | } |
| 616 | } |
| 617 | |
| 618 | TEST(L3, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 619 | ASSERT_EQ(0, cpuinfo_get_l3_caches_count()); |
| 620 | ASSERT_FALSE(cpuinfo_get_l3_caches()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 621 | } |
| 622 | |
| 623 | TEST(L4, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 624 | ASSERT_EQ(0, cpuinfo_get_l4_caches_count()); |
| 625 | ASSERT_FALSE(cpuinfo_get_l4_caches()); |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 626 | } |
| 627 | |
| 628 | #include <galaxy-s7-global.h> |
| 629 | |
| 630 | int main(int argc, char* argv[]) { |
Marat Dukhan | 63a7a6b | 2017-11-29 15:11:56 -0800 | [diff] [blame] | 631 | #if CPUINFO_ARCH_ARM |
| 632 | cpuinfo_set_hwcap(UINT32_C(0x0037B0D6)); |
| 633 | cpuinfo_set_hwcap2(UINT32_C(0x0000001F)); |
| 634 | #elif CPUINFO_ARCH_ARM64 |
| 635 | cpuinfo_set_hwcap(UINT32_C(0x000000FF)); |
| 636 | #endif |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 637 | cpuinfo_mock_filesystem(filesystem); |
Marat Dukhan | a2658a6 | 2017-09-17 11:14:51 -0700 | [diff] [blame] | 638 | #ifdef __ANDROID__ |
| 639 | cpuinfo_mock_android_properties(properties); |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 640 | cpuinfo_mock_gl_renderer("Mali-T880"); |
Marat Dukhan | a2658a6 | 2017-09-17 11:14:51 -0700 | [diff] [blame] | 641 | #endif |
Marat Dukhan | 2e00fed | 2017-08-10 17:23:43 -0700 | [diff] [blame] | 642 | cpuinfo_initialize(); |
| 643 | ::testing::InitGoogleTest(&argc, argv); |
| 644 | return RUN_ALL_TESTS(); |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 645 | } |