blob: 3aad0cf12a4040457afd977a37d0cb0f45ce40e4 [file] [log] [blame]
Marat Dukhan419a8192017-05-08 12:25:17 +00001#include <gtest/gtest.h>
2
3#include <cpuinfo.h>
4#include <cpuinfo-mock.h>
5
6
7TEST(PROCESSORS, count) {
Marat Dukhan30401972017-09-26 18:35:52 -07008 ASSERT_EQ(1, cpuinfo_get_processors_count());
Marat Dukhan419a8192017-05-08 12:25:17 +00009}
10
11TEST(PROCESSORS, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -070012 ASSERT_TRUE(cpuinfo_get_processors());
Marat Dukhan419a8192017-05-08 12:25:17 +000013}
14
Marat Dukhan2d37dc42017-09-25 01:32:37 -070015TEST(PROCESSORS, smt_id) {
Marat Dukhan30401972017-09-26 18:35:52 -070016 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
17 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
Marat Dukhan419a8192017-05-08 12:25:17 +000018 }
19}
20
Marat Dukhan2d37dc42017-09-25 01:32:37 -070021TEST(PROCESSORS, core) {
Marat Dukhan30401972017-09-26 18:35:52 -070022 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
23 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070024 }
25}
26
27TEST(PROCESSORS, package) {
Marat Dukhan30401972017-09-26 18:35:52 -070028 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
29 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
Marat Dukhan419a8192017-05-08 12:25:17 +000030 }
31}
32
Marat Dukhan846c1782017-09-13 09:47:26 -070033TEST(PROCESSORS, linux_id) {
Marat Dukhan30401972017-09-26 18:35:52 -070034 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
35 ASSERT_EQ(i, cpuinfo_get_processor(i)->linux_id);
Marat Dukhan846c1782017-09-13 09:47:26 -070036 }
37}
38
Marat Dukhan2d37dc42017-09-25 01:32:37 -070039TEST(PROCESSORS, l1i) {
Marat Dukhan30401972017-09-26 18:35:52 -070040 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
41 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070042 }
43}
44
45TEST(PROCESSORS, l1d) {
Marat Dukhan30401972017-09-26 18:35:52 -070046 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
47 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070048 }
49}
50
51TEST(PROCESSORS, l2) {
Marat Dukhan30401972017-09-26 18:35:52 -070052 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
53 ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070054 }
55}
56
57TEST(PROCESSORS, l3) {
Marat Dukhan30401972017-09-26 18:35:52 -070058 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
59 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070060 }
61}
62
63TEST(PROCESSORS, l4) {
Marat Dukhan30401972017-09-26 18:35:52 -070064 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
65 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070066 }
67}
68
Marat Dukhan7073e832017-09-24 22:23:55 -070069TEST(CORES, count) {
Marat Dukhan30401972017-09-26 18:35:52 -070070 ASSERT_EQ(1, cpuinfo_get_cores_count());
Marat Dukhan7073e832017-09-24 22:23:55 -070071}
72
Marat Dukhan2d37dc42017-09-25 01:32:37 -070073TEST(CORES, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -070074 ASSERT_TRUE(cpuinfo_get_cores());
Marat Dukhan2d37dc42017-09-25 01:32:37 -070075}
76
Marat Dukhan7073e832017-09-24 22:23:55 -070077TEST(CORES, processor_start) {
Marat Dukhan30401972017-09-26 18:35:52 -070078 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
79 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
Marat Dukhan7073e832017-09-24 22:23:55 -070080 }
81}
82
83TEST(CORES, processor_count) {
Marat Dukhan30401972017-09-26 18:35:52 -070084 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
85 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
Marat Dukhan7073e832017-09-24 22:23:55 -070086 }
87}
88
Marat Dukhan2d37dc42017-09-25 01:32:37 -070089TEST(CORES, core_id) {
Marat Dukhan30401972017-09-26 18:35:52 -070090 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
91 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070092 }
93}
94
95TEST(CORES, package) {
Marat Dukhan30401972017-09-26 18:35:52 -070096 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
97 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070098 }
99}
100
101TEST(CORES, vendor) {
Marat Dukhan30401972017-09-26 18:35:52 -0700102 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
103 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700104 }
105}
106
107TEST(CORES, uarch) {
Marat Dukhan30401972017-09-26 18:35:52 -0700108 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
109 ASSERT_EQ(cpuinfo_uarch_cortex_a8, cpuinfo_get_core(i)->uarch);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700110 }
111}
112
113TEST(CORES, midr) {
Marat Dukhan30401972017-09-26 18:35:52 -0700114 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
115 ASSERT_EQ(UINT32_C(0x412FC082), cpuinfo_get_core(i)->midr);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700116 }
117}
118
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700119TEST(PACKAGES, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700120 ASSERT_EQ(1, cpuinfo_get_packages_count());
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700121}
122
123TEST(PACKAGES, name) {
Marat Dukhan30401972017-09-26 18:35:52 -0700124 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700125 ASSERT_EQ("Samsung Exynos 3110",
Marat Dukhan30401972017-09-26 18:35:52 -0700126 std::string(cpuinfo_get_package(i)->name,
127 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700128 }
129}
130
131TEST(PACKAGES, processor_start) {
Marat Dukhan30401972017-09-26 18:35:52 -0700132 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
133 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700134 }
135}
136
137TEST(PACKAGES, processor_count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700138 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
139 ASSERT_EQ(1, cpuinfo_get_package(i)->processor_count);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700140 }
141}
142
143TEST(PACKAGES, core_start) {
Marat Dukhan30401972017-09-26 18:35:52 -0700144 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
145 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700146 }
147}
148
149TEST(PACKAGES, core_count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700150 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
151 ASSERT_EQ(1, cpuinfo_get_package(i)->core_count);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700152 }
153}
154
Marat Dukhan419a8192017-05-08 12:25:17 +0000155TEST(ISA, thumb) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700156 ASSERT_TRUE(cpuinfo_has_arm_thumb());
Marat Dukhan419a8192017-05-08 12:25:17 +0000157}
158
159TEST(ISA, thumb2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700160 ASSERT_TRUE(cpuinfo_has_arm_thumb2());
Marat Dukhan419a8192017-05-08 12:25:17 +0000161}
162
163TEST(ISA, armv5e) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700164 ASSERT_TRUE(cpuinfo_has_arm_v5e());
Marat Dukhan419a8192017-05-08 12:25:17 +0000165}
166
167TEST(ISA, armv6) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700168 ASSERT_TRUE(cpuinfo_has_arm_v6());
Marat Dukhan419a8192017-05-08 12:25:17 +0000169}
170
171TEST(ISA, armv6k) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700172 ASSERT_TRUE(cpuinfo_has_arm_v6k());
Marat Dukhan419a8192017-05-08 12:25:17 +0000173}
174
175TEST(ISA, armv7) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700176 ASSERT_TRUE(cpuinfo_has_arm_v7());
Marat Dukhan419a8192017-05-08 12:25:17 +0000177}
178
179TEST(ISA, armv7mp) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700180 ASSERT_FALSE(cpuinfo_has_arm_v7mp());
Marat Dukhan419a8192017-05-08 12:25:17 +0000181}
182
183TEST(ISA, idiv) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700184 ASSERT_FALSE(cpuinfo_has_arm_idiv());
Marat Dukhan419a8192017-05-08 12:25:17 +0000185}
186
187TEST(ISA, vfpv2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700188 ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
Marat Dukhan419a8192017-05-08 12:25:17 +0000189}
190
191TEST(ISA, vfpv3) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700192 ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
Marat Dukhan419a8192017-05-08 12:25:17 +0000193}
194
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700195TEST(ISA, vfpv3_d32) {
196 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
Marat Dukhan419a8192017-05-08 12:25:17 +0000197}
198
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700199TEST(ISA, vfpv3_fp16) {
200 ASSERT_FALSE(cpuinfo_has_arm_vfpv3_fp16());
Marat Dukhan419a8192017-05-08 12:25:17 +0000201}
202
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700203TEST(ISA, vfpv3_fp16_d32) {
204 ASSERT_FALSE(cpuinfo_has_arm_vfpv3_fp16_d32());
205}
206
207TEST(ISA, vfpv4) {
208 ASSERT_FALSE(cpuinfo_has_arm_vfpv4());
209}
210
211TEST(ISA, vfpv4_d32) {
212 ASSERT_FALSE(cpuinfo_has_arm_vfpv4_d32());
Marat Dukhan419a8192017-05-08 12:25:17 +0000213}
214
215TEST(ISA, wmmx) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700216 ASSERT_FALSE(cpuinfo_has_arm_wmmx());
Marat Dukhan419a8192017-05-08 12:25:17 +0000217}
218
219TEST(ISA, wmmx2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700220 ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
Marat Dukhan419a8192017-05-08 12:25:17 +0000221}
222
223TEST(ISA, neon) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700224 ASSERT_TRUE(cpuinfo_has_arm_neon());
225}
226
227TEST(ISA, neon_fp16) {
228 ASSERT_FALSE(cpuinfo_has_arm_neon_fp16());
229}
230
231TEST(ISA, neon_fma) {
232 ASSERT_FALSE(cpuinfo_has_arm_neon_fma());
233}
234
235TEST(ISA, atomics) {
236 ASSERT_FALSE(cpuinfo_has_arm_atomics());
237}
238
239TEST(ISA, neon_rdm) {
240 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
241}
242
243TEST(ISA, fp16_arith) {
244 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
245}
246
247TEST(ISA, jscvt) {
248 ASSERT_FALSE(cpuinfo_has_arm_jscvt());
249}
250
251TEST(ISA, fcma) {
252 ASSERT_FALSE(cpuinfo_has_arm_fcma());
Marat Dukhan419a8192017-05-08 12:25:17 +0000253}
254
255TEST(ISA, aes) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700256 ASSERT_FALSE(cpuinfo_has_arm_aes());
Marat Dukhan419a8192017-05-08 12:25:17 +0000257}
258
259TEST(ISA, sha1) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700260 ASSERT_FALSE(cpuinfo_has_arm_sha1());
Marat Dukhan419a8192017-05-08 12:25:17 +0000261}
262
263TEST(ISA, sha2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700264 ASSERT_FALSE(cpuinfo_has_arm_sha2());
Marat Dukhan419a8192017-05-08 12:25:17 +0000265}
266
267TEST(ISA, pmull) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700268 ASSERT_FALSE(cpuinfo_has_arm_pmull());
Marat Dukhan419a8192017-05-08 12:25:17 +0000269}
270
271TEST(ISA, crc32) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700272 ASSERT_FALSE(cpuinfo_has_arm_crc32());
Marat Dukhan419a8192017-05-08 12:25:17 +0000273}
274
275TEST(L1I, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700276 ASSERT_EQ(1, cpuinfo_get_l1i_caches_count());
Marat Dukhan419a8192017-05-08 12:25:17 +0000277}
278
279TEST(L1I, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -0700280 ASSERT_TRUE(cpuinfo_get_l1i_caches());
Marat Dukhan419a8192017-05-08 12:25:17 +0000281}
282
283TEST(L1I, size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700284 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
285 ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size);
Marat Dukhan419a8192017-05-08 12:25:17 +0000286 }
287}
288
289TEST(L1I, associativity) {
Marat Dukhan30401972017-09-26 18:35:52 -0700290 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
291 ASSERT_EQ(4, cpuinfo_get_l1i_cache(i)->associativity);
Marat Dukhan419a8192017-05-08 12:25:17 +0000292 }
293}
294
295TEST(L1I, sets) {
Marat Dukhan30401972017-09-26 18:35:52 -0700296 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
297 ASSERT_EQ(128, cpuinfo_get_l1i_cache(i)->sets);
Marat Dukhan419a8192017-05-08 12:25:17 +0000298 }
299}
300
301TEST(L1I, partitions) {
Marat Dukhan30401972017-09-26 18:35:52 -0700302 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
303 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
Marat Dukhan419a8192017-05-08 12:25:17 +0000304 }
305}
306
307TEST(L1I, line_size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700308 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
309 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
Marat Dukhan419a8192017-05-08 12:25:17 +0000310 }
311}
312
313TEST(L1I, flags) {
Marat Dukhan30401972017-09-26 18:35:52 -0700314 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
315 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
Marat Dukhan419a8192017-05-08 12:25:17 +0000316 }
317}
318
319TEST(L1I, processors) {
Marat Dukhan30401972017-09-26 18:35:52 -0700320 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
321 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
322 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
Marat Dukhan419a8192017-05-08 12:25:17 +0000323 }
324}
325
326TEST(L1D, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700327 ASSERT_EQ(1, cpuinfo_get_l1d_caches_count());
Marat Dukhan419a8192017-05-08 12:25:17 +0000328}
329
330TEST(L1D, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -0700331 ASSERT_TRUE(cpuinfo_get_l1d_caches());
Marat Dukhan419a8192017-05-08 12:25:17 +0000332}
333
334TEST(L1D, size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700335 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
336 ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size);
Marat Dukhan419a8192017-05-08 12:25:17 +0000337 }
338}
339
340TEST(L1D, associativity) {
Marat Dukhan30401972017-09-26 18:35:52 -0700341 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
342 ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity);
Marat Dukhan419a8192017-05-08 12:25:17 +0000343 }
344}
345
346TEST(L1D, sets) {
Marat Dukhan30401972017-09-26 18:35:52 -0700347 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
348 ASSERT_EQ(128, cpuinfo_get_l1d_cache(i)->sets);
Marat Dukhan419a8192017-05-08 12:25:17 +0000349 }
350}
351
352TEST(L1D, partitions) {
Marat Dukhan30401972017-09-26 18:35:52 -0700353 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
354 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
Marat Dukhan419a8192017-05-08 12:25:17 +0000355 }
356}
357
358TEST(L1D, line_size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700359 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
360 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
Marat Dukhan419a8192017-05-08 12:25:17 +0000361 }
362}
363
364TEST(L1D, flags) {
Marat Dukhan30401972017-09-26 18:35:52 -0700365 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
366 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
Marat Dukhan419a8192017-05-08 12:25:17 +0000367 }
368}
369
370TEST(L1D, processors) {
Marat Dukhan30401972017-09-26 18:35:52 -0700371 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
372 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
373 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
Marat Dukhan419a8192017-05-08 12:25:17 +0000374 }
375}
376
377TEST(L2, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700378 ASSERT_EQ(1, cpuinfo_get_l2_caches_count());
Marat Dukhan419a8192017-05-08 12:25:17 +0000379}
380
381TEST(L2, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -0700382 ASSERT_TRUE(cpuinfo_get_l2_caches());
Marat Dukhan419a8192017-05-08 12:25:17 +0000383}
384
Marat Dukhan5659d292017-09-12 23:21:03 -0700385TEST(L2, size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700386 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
387 ASSERT_EQ(512 * 1024, cpuinfo_get_l2_cache(i)->size);
Marat Dukhan419a8192017-05-08 12:25:17 +0000388 }
389}
390
391TEST(L2, associativity) {
Marat Dukhan30401972017-09-26 18:35:52 -0700392 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
393 ASSERT_EQ(8, cpuinfo_get_l2_cache(i)->associativity);
Marat Dukhan419a8192017-05-08 12:25:17 +0000394 }
395}
396
Marat Dukhan5659d292017-09-12 23:21:03 -0700397TEST(L2, sets) {
Marat Dukhan30401972017-09-26 18:35:52 -0700398 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
399 ASSERT_EQ(cpuinfo_get_l2_cache(i)->size,
400 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
Marat Dukhan419a8192017-05-08 12:25:17 +0000401 }
402}
403
404TEST(L2, partitions) {
Marat Dukhan30401972017-09-26 18:35:52 -0700405 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
406 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
Marat Dukhan419a8192017-05-08 12:25:17 +0000407 }
408}
409
410TEST(L2, line_size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700411 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
412 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
Marat Dukhan419a8192017-05-08 12:25:17 +0000413 }
414}
415
416TEST(L2, flags) {
Marat Dukhan30401972017-09-26 18:35:52 -0700417 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
418 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
Marat Dukhan419a8192017-05-08 12:25:17 +0000419 }
420}
421
422TEST(L2, processors) {
Marat Dukhan30401972017-09-26 18:35:52 -0700423 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
424 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start);
425 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->processor_count);
Marat Dukhan419a8192017-05-08 12:25:17 +0000426 }
427}
428
429TEST(L3, none) {
Marat Dukhan30401972017-09-26 18:35:52 -0700430 ASSERT_EQ(0, cpuinfo_get_l3_caches_count());
431 ASSERT_FALSE(cpuinfo_get_l3_caches());
Marat Dukhan419a8192017-05-08 12:25:17 +0000432}
433
434TEST(L4, none) {
Marat Dukhan30401972017-09-26 18:35:52 -0700435 ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
436 ASSERT_FALSE(cpuinfo_get_l4_caches());
Marat Dukhan419a8192017-05-08 12:25:17 +0000437}
438
Marat Dukhana00f92a2017-09-08 17:45:34 -0700439#include <nexus-s.h>
440
Marat Dukhan419a8192017-05-08 12:25:17 +0000441int main(int argc, char* argv[]) {
Marat Dukhan63a7a6b2017-11-29 15:11:56 -0800442#if CPUINFO_ARCH_ARM
443 cpuinfo_set_hwcap(UINT32_C(0x000038D7));
444#endif
Marat Dukhana00f92a2017-09-08 17:45:34 -0700445 cpuinfo_mock_filesystem(filesystem);
Marat Dukhand1565252017-09-12 00:29:01 -0700446#ifdef __ANDROID__
447 cpuinfo_mock_android_properties(properties);
448#endif
Marat Dukhan419a8192017-05-08 12:25:17 +0000449 cpuinfo_initialize();
450 ::testing::InitGoogleTest(&argc, argv);
451 return RUN_ALL_TESTS();
Marat Dukhan30401972017-09-26 18:35:52 -0700452}