blob: 8664f3a2b734bfdcdc50c337262065081acfd452 [file] [log] [blame]
Marat Dukhanaf8a12d2017-12-08 16:12:16 -08001#include <gtest/gtest.h>
2
3#include <cpuinfo.h>
4#include <cpuinfo-mock.h>
5
6
7TEST(PROCESSORS, count) {
8 ASSERT_EQ(4, cpuinfo_get_processors_count());
9}
10
11TEST(PROCESSORS, non_null) {
12 ASSERT_TRUE(cpuinfo_get_processors());
13}
14
15TEST(PROCESSORS, smt_id) {
16 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
17 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
18 }
19}
20
21TEST(PROCESSORS, core) {
22 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
23 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
24 }
25}
26
Marat Dukhan91ac6a52018-04-01 02:20:00 -070027TEST(PROCESSORS, cluster) {
28 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
29 ASSERT_EQ(cpuinfo_get_cluster(i / 2), cpuinfo_get_processor(i)->cluster);
30 }
31}
32
Marat Dukhanaf8a12d2017-12-08 16:12:16 -080033TEST(PROCESSORS, package) {
34 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
35 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
36 }
37}
38
39TEST(PROCESSORS, linux_id) {
40 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
41 ASSERT_EQ(i, cpuinfo_get_processor(i)->linux_id);
42 }
43}
44
45TEST(PROCESSORS, l1i) {
46 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
47 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
48 }
49}
50
51TEST(PROCESSORS, l1d) {
52 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
53 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
54 }
55}
56
57TEST(PROCESSORS, l2) {
58 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
59 ASSERT_EQ(cpuinfo_get_l2_cache(i / 2), cpuinfo_get_processor(i)->cache.l2);
60 }
61}
62
63TEST(PROCESSORS, l3) {
64 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
65 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3);
66 }
67}
68
69TEST(PROCESSORS, l4) {
70 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
71 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
72 }
73}
74
75TEST(CORES, count) {
76 ASSERT_EQ(4, cpuinfo_get_cores_count());
77}
78
79TEST(CORES, non_null) {
80 ASSERT_TRUE(cpuinfo_get_cores());
81}
82
83TEST(CORES, processor_start) {
84 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
85 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
86 }
87}
88
89TEST(CORES, processor_count) {
90 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
91 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
92 }
93}
94
95TEST(CORES, core_id) {
96 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
97 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
98 }
99}
100
Marat Dukhan91ac6a52018-04-01 02:20:00 -0700101TEST(CORES, cluster) {
102 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
103 ASSERT_EQ(cpuinfo_get_cluster(i / 2), cpuinfo_get_core(i)->cluster);
104 }
105}
106
Marat Dukhanaf8a12d2017-12-08 16:12:16 -0800107TEST(CORES, package) {
108 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
109 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
110 }
111}
112
113TEST(CORES, vendor) {
114 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
115 ASSERT_EQ(cpuinfo_vendor_intel, cpuinfo_get_core(i)->vendor);
116 }
117}
118
119TEST(CORES, uarch) {
120 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
121 ASSERT_EQ(cpuinfo_uarch_airmont, cpuinfo_get_core(i)->uarch);
122 }
123}
124
125TEST(CORES, cpuid) {
126 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
127 ASSERT_EQ(UINT32_C(0x000406C4), cpuinfo_get_core(i)->cpuid);
128 }
129}
130
Marat Dukhan575a6302018-03-10 14:38:49 -0800131TEST(CORES, DISABLED_frequency) {
132 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
133 ASSERT_EQ(UINT64_C(1920000000), cpuinfo_get_core(i)->frequency);
134 }
135}
136
Marat Dukhan91ac6a52018-04-01 02:20:00 -0700137TEST(CLUSTERS, count) {
138 ASSERT_EQ(2, cpuinfo_get_clusters_count());
139}
140
141TEST(CLUSTERS, non_null) {
142 ASSERT_TRUE(cpuinfo_get_clusters());
143}
144
145TEST(CLUSTERS, processor_start) {
146 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
147 ASSERT_EQ(i * 2, cpuinfo_get_cluster(i)->processor_start);
148 }
149}
150
151TEST(CLUSTERS, processor_count) {
152 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
153 ASSERT_EQ(2, cpuinfo_get_cluster(i)->processor_count);
154 }
155}
156
157TEST(CLUSTERS, core_start) {
158 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
159 ASSERT_EQ(i * 2, cpuinfo_get_cluster(i)->core_start);
160 }
161}
162
163TEST(CLUSTERS, core_count) {
164 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
165 ASSERT_EQ(2, cpuinfo_get_cluster(i)->core_count);
166 }
167}
168
169TEST(CLUSTERS, cluster_id) {
170 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
171 ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id);
172 }
173}
174
175TEST(CLUSTERS, package) {
176 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
177 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package);
178 }
179}
180
181TEST(CLUSTERS, vendor) {
182 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
183 ASSERT_EQ(cpuinfo_vendor_intel, cpuinfo_get_cluster(i)->vendor);
184 }
185}
186
187TEST(CLUSTERS, uarch) {
188 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
189 ASSERT_EQ(cpuinfo_uarch_airmont, cpuinfo_get_cluster(i)->uarch);
190 }
191}
192
193TEST(CLUSTERS, cpuid) {
194 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
195 ASSERT_EQ(UINT32_C(0x000406C4), cpuinfo_get_cluster(i)->cpuid);
196 }
197}
198
199TEST(CLUSTERS, DISABLED_frequency) {
200 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
201 ASSERT_EQ(UINT64_C(1920000000), cpuinfo_get_cluster(i)->frequency);
202 }
203}
204
Marat Dukhanaf8a12d2017-12-08 16:12:16 -0800205TEST(PACKAGES, count) {
206 ASSERT_EQ(1, cpuinfo_get_packages_count());
207}
208
Marat Dukhan91ac6a52018-04-01 02:20:00 -0700209TEST(PACKAGES, non_null) {
210 ASSERT_TRUE(cpuinfo_get_packages());
211}
212
Marat Dukhanaf8a12d2017-12-08 16:12:16 -0800213TEST(PACKAGES, name) {
214 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
Marat Dukhanba208d12018-03-11 15:30:40 -0700215 ASSERT_EQ("Intel Atom x5-Z8350",
Marat Dukhanaf8a12d2017-12-08 16:12:16 -0800216 std::string(cpuinfo_get_package(i)->name,
217 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
218 }
219}
220
Marat Dukhanfd0f3ef2017-12-18 17:45:18 -0800221TEST(PACKAGES, gpu_name) {
222 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
223 ASSERT_EQ("Intel Gen 8",
224 std::string(cpuinfo_get_package(i)->gpu_name,
225 strnlen(cpuinfo_get_package(i)->gpu_name, CPUINFO_GPU_NAME_MAX)));
226 }
227}
228
Marat Dukhanaf8a12d2017-12-08 16:12:16 -0800229TEST(PACKAGES, processor_start) {
230 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
231 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
232 }
233}
234
235TEST(PACKAGES, processor_count) {
236 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
237 ASSERT_EQ(4, cpuinfo_get_package(i)->processor_count);
238 }
239}
240
241TEST(PACKAGES, core_start) {
242 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
243 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
244 }
245}
246
247TEST(PACKAGES, core_count) {
248 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
249 ASSERT_EQ(4, cpuinfo_get_package(i)->core_count);
250 }
251}
252
Marat Dukhan91ac6a52018-04-01 02:20:00 -0700253TEST(PACKAGES, cluster_start) {
254 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
255 ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start);
256 }
257}
258
259TEST(PACKAGES, cluster_count) {
260 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
261 ASSERT_EQ(2, cpuinfo_get_package(i)->cluster_count);
262 }
263}
264
Marat Dukhanaf8a12d2017-12-08 16:12:16 -0800265TEST(ISA, rdtsc) {
266 ASSERT_TRUE(cpuinfo_has_x86_rdtsc());
267}
268
269TEST(ISA, rdtscp) {
270 ASSERT_TRUE(cpuinfo_has_x86_rdtscp());
271}
272
273TEST(ISA, rdpid) {
274 ASSERT_FALSE(cpuinfo_has_x86_rdpid());
275}
276
277TEST(ISA, clzero) {
278 ASSERT_FALSE(cpuinfo_has_x86_clzero());
279}
280
281TEST(ISA, mwait) {
282 ASSERT_TRUE(cpuinfo_has_x86_mwait());
283}
284
285TEST(ISA, mwaitx) {
286 ASSERT_FALSE(cpuinfo_has_x86_mwaitx());
287}
288
289TEST(ISA, fxsave) {
290 ASSERT_TRUE(cpuinfo_has_x86_fxsave());
291}
292
293TEST(ISA, xsave) {
294 ASSERT_FALSE(cpuinfo_has_x86_xsave());
295}
296
297TEST(ISA, fpu) {
298 ASSERT_TRUE(cpuinfo_has_x86_fpu());
299}
300
301TEST(ISA, mmx) {
302 ASSERT_TRUE(cpuinfo_has_x86_mmx());
303}
304
305TEST(ISA, mmx_plus) {
306 ASSERT_TRUE(cpuinfo_has_x86_mmx_plus());
307}
308
309TEST(ISA, three_d_now) {
310 ASSERT_FALSE(cpuinfo_has_x86_3dnow());
311}
312
313TEST(ISA, three_d_now_plus) {
314 ASSERT_FALSE(cpuinfo_has_x86_3dnow_plus());
315}
316
317TEST(ISA, three_d_now_geode) {
318 ASSERT_FALSE(cpuinfo_has_x86_3dnow_geode());
319}
320
321TEST(ISA, prefetch) {
322 ASSERT_FALSE(cpuinfo_has_x86_prefetch());
323}
324
325TEST(ISA, prefetchw) {
326 ASSERT_TRUE(cpuinfo_has_x86_prefetchw());
327}
328
329TEST(ISA, prefetchwt1) {
330 ASSERT_FALSE(cpuinfo_has_x86_prefetchwt1());
331}
332
333TEST(ISA, daz) {
334 ASSERT_TRUE(cpuinfo_has_x86_daz());
335}
336
337TEST(ISA, sse) {
338 ASSERT_TRUE(cpuinfo_has_x86_sse());
339}
340
341TEST(ISA, sse2) {
342 ASSERT_TRUE(cpuinfo_has_x86_sse2());
343}
344
345TEST(ISA, sse3) {
346 ASSERT_TRUE(cpuinfo_has_x86_sse3());
347}
348
349TEST(ISA, ssse3) {
350 ASSERT_TRUE(cpuinfo_has_x86_ssse3());
351}
352
353TEST(ISA, sse4_1) {
354 ASSERT_TRUE(cpuinfo_has_x86_sse4_1());
355}
356
357TEST(ISA, sse4_2) {
358 ASSERT_TRUE(cpuinfo_has_x86_sse4_2());
359}
360
361TEST(ISA, sse4a) {
362 ASSERT_FALSE(cpuinfo_has_x86_sse4a());
363}
364
365TEST(ISA, misaligned_sse) {
366 ASSERT_FALSE(cpuinfo_has_x86_misaligned_sse());
367}
368
369TEST(ISA, avx) {
370 ASSERT_FALSE(cpuinfo_has_x86_avx());
371}
372
373TEST(ISA, fma3) {
374 ASSERT_FALSE(cpuinfo_has_x86_fma3());
375}
376
377TEST(ISA, fma4) {
378 ASSERT_FALSE(cpuinfo_has_x86_fma4());
379}
380
381TEST(ISA, xop) {
382 ASSERT_FALSE(cpuinfo_has_x86_xop());
383}
384
385TEST(ISA, f16c) {
386 ASSERT_FALSE(cpuinfo_has_x86_f16c());
387}
388
389TEST(ISA, avx2) {
390 ASSERT_FALSE(cpuinfo_has_x86_avx2());
391}
392
393TEST(ISA, avx512f) {
394 ASSERT_FALSE(cpuinfo_has_x86_avx512f());
395}
396
397TEST(ISA, avx512pf) {
398 ASSERT_FALSE(cpuinfo_has_x86_avx512pf());
399}
400
401TEST(ISA, avx512er) {
402 ASSERT_FALSE(cpuinfo_has_x86_avx512er());
403}
404
405TEST(ISA, avx512cd) {
406 ASSERT_FALSE(cpuinfo_has_x86_avx512cd());
407}
408
409TEST(ISA, avx512dq) {
410 ASSERT_FALSE(cpuinfo_has_x86_avx512dq());
411}
412
413TEST(ISA, avx512bw) {
414 ASSERT_FALSE(cpuinfo_has_x86_avx512bw());
415}
416
417TEST(ISA, avx512vl) {
418 ASSERT_FALSE(cpuinfo_has_x86_avx512vl());
419}
420
421TEST(ISA, avx512ifma) {
422 ASSERT_FALSE(cpuinfo_has_x86_avx512ifma());
423}
424
425TEST(ISA, avx512vbmi) {
426 ASSERT_FALSE(cpuinfo_has_x86_avx512vbmi());
427}
428
429TEST(ISA, avx512vpopcntdq) {
430 ASSERT_FALSE(cpuinfo_has_x86_avx512vpopcntdq());
431}
432
433TEST(ISA, avx512_4vnniw) {
434 ASSERT_FALSE(cpuinfo_has_x86_avx512_4vnniw());
435}
436
437TEST(ISA, avx512_4fmaps) {
438 ASSERT_FALSE(cpuinfo_has_x86_avx512_4fmaps());
439}
440
441TEST(ISA, hle) {
442 ASSERT_FALSE(cpuinfo_has_x86_hle());
443}
444
445TEST(ISA, rtm) {
446 ASSERT_FALSE(cpuinfo_has_x86_rtm());
447}
448
449TEST(ISA, xtest) {
450 ASSERT_FALSE(cpuinfo_has_x86_xtest());
451}
452
453TEST(ISA, mpx) {
454 ASSERT_FALSE(cpuinfo_has_x86_mpx());
455}
456
457TEST(ISA, cmov) {
458 ASSERT_TRUE(cpuinfo_has_x86_cmov());
459}
460
461TEST(ISA, cmpxchg8b) {
462 ASSERT_TRUE(cpuinfo_has_x86_cmpxchg8b());
463}
464
465TEST(ISA, cmpxchg16b) {
466 ASSERT_FALSE(cpuinfo_has_x86_cmpxchg16b());
467}
468
469TEST(ISA, clwb) {
470 ASSERT_FALSE(cpuinfo_has_x86_clwb());
471}
472
473TEST(ISA, movbe) {
474 ASSERT_TRUE(cpuinfo_has_x86_movbe());
475}
476
477TEST(ISA, lahf_sahf) {
478 ASSERT_TRUE(cpuinfo_has_x86_lahf_sahf());
479}
480
481TEST(ISA, lzcnt) {
482 ASSERT_FALSE(cpuinfo_has_x86_lzcnt());
483}
484
485TEST(ISA, popcnt) {
486 ASSERT_TRUE(cpuinfo_has_x86_popcnt());
487}
488
489TEST(ISA, tbm) {
490 ASSERT_FALSE(cpuinfo_has_x86_tbm());
491}
492
493TEST(ISA, bmi) {
494 ASSERT_FALSE(cpuinfo_has_x86_bmi());
495}
496
497TEST(ISA, bmi2) {
498 ASSERT_FALSE(cpuinfo_has_x86_bmi2());
499}
500
501TEST(ISA, adx) {
502 ASSERT_FALSE(cpuinfo_has_x86_adx());
503}
504
505TEST(ISA, aes) {
506 ASSERT_TRUE(cpuinfo_has_x86_aes());
507}
508
509TEST(ISA, pclmulqdq) {
510 ASSERT_TRUE(cpuinfo_has_x86_pclmulqdq());
511}
512
513TEST(ISA, rdrand) {
514 ASSERT_TRUE(cpuinfo_has_x86_rdrand());
515}
516
517TEST(ISA, rdseed) {
518 ASSERT_FALSE(cpuinfo_has_x86_rdseed());
519}
520
521TEST(ISA, sha) {
522 ASSERT_FALSE(cpuinfo_has_x86_sha());
523}
524
525TEST(L1I, count) {
526 ASSERT_EQ(4, cpuinfo_get_l1i_caches_count());
527}
528
529TEST(L1I, non_null) {
530 ASSERT_TRUE(cpuinfo_get_l1i_caches());
531}
532
533TEST(L1I, size) {
534 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
535 ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size);
536 }
537}
538
539TEST(L1I, associativity) {
540 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
541 ASSERT_EQ(8, cpuinfo_get_l1i_cache(i)->associativity);
542 }
543}
544
545TEST(L1I, sets) {
546 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
547 ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size,
548 cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity);
549 }
550}
551
552TEST(L1I, partitions) {
553 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
554 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
555 }
556}
557
558TEST(L1I, line_size) {
559 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
560 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
561 }
562}
563
564TEST(L1I, flags) {
565 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
566 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
567 }
568}
569
570TEST(L1I, processors) {
571 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
572 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
573 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
574 }
575}
576
577TEST(L1D, count) {
578 ASSERT_EQ(4, cpuinfo_get_l1d_caches_count());
579}
580
581TEST(L1D, non_null) {
582 ASSERT_TRUE(cpuinfo_get_l1d_caches());
583}
584
585TEST(L1D, size) {
586 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
587 ASSERT_EQ(24 * 1024, cpuinfo_get_l1d_cache(i)->size);
588 }
589}
590
591TEST(L1D, associativity) {
592 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
593 ASSERT_EQ(6, cpuinfo_get_l1d_cache(i)->associativity);
594 }
595}
596
597TEST(L1D, sets) {
598 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
599 ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size,
600 cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity);
601 }
602}
603
604TEST(L1D, partitions) {
605 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
606 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
607 }
608}
609
610TEST(L1D, line_size) {
611 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
612 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
613 }
614}
615
616TEST(L1D, flags) {
617 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
618 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
619 }
620}
621
622TEST(L1D, processors) {
623 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
624 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
625 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
626 }
627}
628
629TEST(L2, count) {
630 ASSERT_EQ(2, cpuinfo_get_l2_caches_count());
631}
632
633TEST(L2, non_null) {
634 ASSERT_TRUE(cpuinfo_get_l2_caches());
635}
636
637TEST(L2, size) {
638 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
639 ASSERT_EQ(1024 * 1024, cpuinfo_get_l2_cache(i)->size);
640 }
641}
642
643TEST(L2, associativity) {
644 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
645 ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity);
646 }
647}
648
649TEST(L2, sets) {
650 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
651 ASSERT_EQ(cpuinfo_get_l2_cache(i)->size,
652 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
653 }
654}
655
656TEST(L2, partitions) {
657 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
658 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
659 }
660}
661
662TEST(L2, line_size) {
663 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
664 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
665 }
666}
667
668TEST(L2, flags) {
669 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
670 ASSERT_EQ(CPUINFO_CACHE_UNIFIED, cpuinfo_get_l2_cache(i)->flags);
671 }
672}
673
674TEST(L2, processors) {
675 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
676 ASSERT_EQ(i * 2, cpuinfo_get_l2_cache(i)->processor_start);
677 ASSERT_EQ(2, cpuinfo_get_l2_cache(i)->processor_count);
678 }
679}
680
681TEST(L3, none) {
682 ASSERT_EQ(0, cpuinfo_get_l3_caches_count());
683 ASSERT_FALSE(cpuinfo_get_l3_caches());
684}
685
686TEST(L4, none) {
687 ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
688 ASSERT_FALSE(cpuinfo_get_l4_caches());
689}
690
691#include <alldocube-iwork8.h>
692
693int main(int argc, char* argv[]) {
694 cpuinfo_mock_filesystem(filesystem);
695 cpuinfo_mock_set_cpuid(cpuid_dump, sizeof(cpuid_dump) / sizeof(cpuinfo_mock_cpuid));
Marat Dukhanfd0f3ef2017-12-18 17:45:18 -0800696#ifdef __ANDROID__
697 cpuinfo_mock_gl_renderer("Intel(R) HD Graphics for Atom(TM) x5/x7");
698#endif
Marat Dukhanaf8a12d2017-12-08 16:12:16 -0800699 cpuinfo_initialize();
700 ::testing::InitGoogleTest(&argc, argv);
701 return RUN_ALL_TESTS();
702}