blob: 1cdcbf71d6a664abccf89a307a558f79490e9dd2 [file] [log] [blame]
Marat Dukhana5fda232017-12-04 16:08:25 -08001#include <gtest/gtest.h>
2
3#include <cpuinfo.h>
4#include <cpuinfo-mock.h>
5
6
7TEST(PROCESSORS, count) {
8 ASSERT_EQ(8, cpuinfo_get_processors_count());
9}
10
11TEST(PROCESSORS, non_null) {
12 ASSERT_TRUE(cpuinfo_get_processors());
13}
14
15TEST(PROCESSORS, smt_id) {
16 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
17 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
18 }
19}
20
21TEST(PROCESSORS, core) {
22 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
23 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
24 }
25}
26
27TEST(PROCESSORS, package) {
28 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
29 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
30 }
31}
32
33TEST(PROCESSORS, linux_id) {
34 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
35 switch (i) {
36 case 0:
37 case 1:
38 case 2:
39 case 3:
40 ASSERT_EQ(i + 4, cpuinfo_get_processor(i)->linux_id);
41 break;
42 case 4:
43 case 5:
44 case 6:
45 case 7:
46 ASSERT_EQ(i - 4, cpuinfo_get_processor(i)->linux_id);
47 break;
48 }
49 }
50}
51
52TEST(PROCESSORS, l1i) {
53 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
54 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
55 }
56}
57
58TEST(PROCESSORS, l1d) {
59 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
60 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
61 }
62}
63
64TEST(PROCESSORS, l2) {
65 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
66 switch (i) {
67 case 0:
68 case 1:
69 case 2:
70 case 3:
71 ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2);
72 break;
73 case 4:
74 case 5:
75 case 6:
76 case 7:
77 ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2);
78 break;
79 }
80 }
81}
82
83TEST(PROCESSORS, l3) {
84 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
85 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3);
86 }
87}
88
89TEST(PROCESSORS, l4) {
90 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
91 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
92 }
93}
94
95TEST(CORES, count) {
96 ASSERT_EQ(8, cpuinfo_get_cores_count());
97}
98
99TEST(CORES, non_null) {
100 ASSERT_TRUE(cpuinfo_get_cores());
101}
102
103TEST(CORES, processor_start) {
104 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
105 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
106 }
107}
108
109TEST(CORES, processor_count) {
110 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
111 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
112 }
113}
114
115TEST(CORES, core_id) {
116 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
117 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
118 }
119}
120
121TEST(CORES, package) {
122 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
123 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
124 }
125}
126
127TEST(CORES, vendor) {
128 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
129 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor);
130 }
131}
132
133TEST(CORES, uarch) {
134 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
135 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch);
136 }
137}
138
139TEST(CORES, midr) {
140 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
141 ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_core(i)->midr);
142 }
143}
144
145TEST(PACKAGES, count) {
146 ASSERT_EQ(1, cpuinfo_get_packages_count());
147}
148
149TEST(PACKAGES, name) {
150 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
151 ASSERT_EQ("Qualcomm MSM8953",
152 std::string(cpuinfo_get_package(i)->name,
153 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
154 }
155}
156
157TEST(PACKAGES, processor_start) {
158 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
159 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
160 }
161}
162
163TEST(PACKAGES, processor_count) {
164 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
165 ASSERT_EQ(8, cpuinfo_get_package(i)->processor_count);
166 }
167}
168
169TEST(PACKAGES, core_start) {
170 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
171 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
172 }
173}
174
175TEST(PACKAGES, core_count) {
176 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
177 ASSERT_EQ(8, cpuinfo_get_package(i)->core_count);
178 }
179}
180
181TEST(ISA, thumb) {
182 #if CPUINFO_ARCH_ARM
183 ASSERT_TRUE(cpuinfo_has_arm_thumb());
184 #elif CPUINFO_ARCH_ARM64
185 ASSERT_FALSE(cpuinfo_has_arm_thumb());
186 #endif
187}
188
189TEST(ISA, thumb2) {
190 #if CPUINFO_ARCH_ARM
191 ASSERT_TRUE(cpuinfo_has_arm_thumb2());
192 #elif CPUINFO_ARCH_ARM64
193 ASSERT_FALSE(cpuinfo_has_arm_thumb2());
194 #endif
195}
196
197TEST(ISA, armv5e) {
198 #if CPUINFO_ARCH_ARM
199 ASSERT_TRUE(cpuinfo_has_arm_v5e());
200 #elif CPUINFO_ARCH_ARM64
201 ASSERT_FALSE(cpuinfo_has_arm_v5e());
202 #endif
203}
204
205TEST(ISA, armv6) {
206 #if CPUINFO_ARCH_ARM
207 ASSERT_TRUE(cpuinfo_has_arm_v6());
208 #elif CPUINFO_ARCH_ARM64
209 ASSERT_FALSE(cpuinfo_has_arm_v6());
210 #endif
211}
212
213TEST(ISA, armv6k) {
214 #if CPUINFO_ARCH_ARM
215 ASSERT_TRUE(cpuinfo_has_arm_v6k());
216 #elif CPUINFO_ARCH_ARM64
217 ASSERT_FALSE(cpuinfo_has_arm_v6k());
218 #endif
219}
220
221TEST(ISA, armv7) {
222 #if CPUINFO_ARCH_ARM
223 ASSERT_TRUE(cpuinfo_has_arm_v7());
224 #elif CPUINFO_ARCH_ARM64
225 ASSERT_FALSE(cpuinfo_has_arm_v7());
226 #endif
227}
228
229TEST(ISA, armv7mp) {
230 #if CPUINFO_ARCH_ARM
231 ASSERT_TRUE(cpuinfo_has_arm_v7mp());
232 #elif CPUINFO_ARCH_ARM64
233 ASSERT_FALSE(cpuinfo_has_arm_v7mp());
234 #endif
235}
236
237TEST(ISA, idiv) {
238 ASSERT_TRUE(cpuinfo_has_arm_idiv());
239}
240
241TEST(ISA, vfpv2) {
242 ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
243}
244
245TEST(ISA, vfpv3) {
246 ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
247}
248
249TEST(ISA, vfpv3_d32) {
250 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
251}
252
253TEST(ISA, vfpv3_fp16) {
254 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16());
255}
256
257TEST(ISA, vfpv3_fp16_d32) {
258 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32());
259}
260
261TEST(ISA, vfpv4) {
262 ASSERT_TRUE(cpuinfo_has_arm_vfpv4());
263}
264
265TEST(ISA, vfpv4_d32) {
266 ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32());
267}
268
269TEST(ISA, wmmx) {
270 ASSERT_FALSE(cpuinfo_has_arm_wmmx());
271}
272
273TEST(ISA, wmmx2) {
274 ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
275}
276
277TEST(ISA, neon) {
278 ASSERT_TRUE(cpuinfo_has_arm_neon());
279}
280
281TEST(ISA, neon_fp16) {
282 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16());
283}
284
285TEST(ISA, neon_fma) {
286 ASSERT_TRUE(cpuinfo_has_arm_neon_fma());
287}
288
289TEST(ISA, atomics) {
290 ASSERT_FALSE(cpuinfo_has_arm_atomics());
291}
292
293TEST(ISA, neon_rdm) {
294 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
295}
296
297TEST(ISA, fp16_arith) {
298 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
299}
300
301TEST(ISA, jscvt) {
302 ASSERT_FALSE(cpuinfo_has_arm_jscvt());
303}
304
305TEST(ISA, fcma) {
306 ASSERT_FALSE(cpuinfo_has_arm_fcma());
307}
308
309TEST(ISA, aes) {
310 ASSERT_TRUE(cpuinfo_has_arm_aes());
311}
312
313TEST(ISA, sha1) {
314 ASSERT_TRUE(cpuinfo_has_arm_sha1());
315}
316
317TEST(ISA, sha2) {
318 ASSERT_TRUE(cpuinfo_has_arm_sha2());
319}
320
321TEST(ISA, pmull) {
322 ASSERT_TRUE(cpuinfo_has_arm_pmull());
323}
324
325TEST(ISA, crc32) {
326 ASSERT_TRUE(cpuinfo_has_arm_crc32());
327}
328
329TEST(L1I, count) {
330 ASSERT_EQ(8, cpuinfo_get_l1i_caches_count());
331}
332
333TEST(L1I, non_null) {
334 ASSERT_TRUE(cpuinfo_get_l1i_caches());
335}
336
337TEST(L1I, size) {
338 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
339 ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size);
340 }
341}
342
343TEST(L1I, associativity) {
344 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
345 ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity);
346 }
347}
348
349TEST(L1I, sets) {
350 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
351 ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size,
352 cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity);
353 }
354}
355
356TEST(L1I, partitions) {
357 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
358 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
359 }
360}
361
362TEST(L1I, line_size) {
363 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
364 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
365 }
366}
367
368TEST(L1I, flags) {
369 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
370 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
371 }
372}
373
374TEST(L1I, processors) {
375 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
376 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
377 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
378 }
379}
380
381TEST(L1D, count) {
382 ASSERT_EQ(8, cpuinfo_get_l1d_caches_count());
383}
384
385TEST(L1D, non_null) {
386 ASSERT_TRUE(cpuinfo_get_l1d_caches());
387}
388
389TEST(L1D, size) {
390 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
391 ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size);
392 }
393}
394
395TEST(L1D, associativity) {
396 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
397 ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity);
398 }
399}
400
401TEST(L1D, sets) {
402 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
403 ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size,
404 cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity);
405 }
406}
407
408TEST(L1D, partitions) {
409 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
410 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
411 }
412}
413
414TEST(L1D, line_size) {
415 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
416 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
417 }
418}
419
420TEST(L1D, flags) {
421 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
422 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
423 }
424}
425
426TEST(L1D, processors) {
427 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
428 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
429 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
430 }
431}
432
433TEST(L2, count) {
434 ASSERT_EQ(2, cpuinfo_get_l2_caches_count());
435}
436
437TEST(L2, non_null) {
438 ASSERT_TRUE(cpuinfo_get_l2_caches());
439}
440
441TEST(L2, size) {
442 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
443 switch (i) {
444 case 0:
445 ASSERT_EQ(1024 * 1024, cpuinfo_get_l2_cache(i)->size);
446 break;
447 case 1:
448 ASSERT_EQ(512 * 1024, cpuinfo_get_l2_cache(i)->size);
449 break;
450 }
451 }
452}
453
454TEST(L2, associativity) {
455 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
456 ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity);
457 }
458}
459
460TEST(L2, sets) {
461 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
462 ASSERT_EQ(cpuinfo_get_l2_cache(i)->size,
463 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
464 }
465}
466
467TEST(L2, partitions) {
468 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
469 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
470 }
471}
472
473TEST(L2, line_size) {
474 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
475 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
476 }
477}
478
479TEST(L2, flags) {
480 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
481 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
482 }
483}
484
485TEST(L2, processors) {
486 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
487 switch (i) {
488 case 0:
489 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start);
490 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
491 break;
492 case 1:
493 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_start);
494 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
495 break;
496 }
497 }
498}
499
500TEST(L3, none) {
501 ASSERT_EQ(0, cpuinfo_get_l3_caches_count());
502 ASSERT_FALSE(cpuinfo_get_l3_caches());
503}
504
505TEST(L4, none) {
506 ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
507 ASSERT_FALSE(cpuinfo_get_l4_caches());
508}
509
510#include <xiaomi-redmi-note-4.h>
511
512int main(int argc, char* argv[]) {
513#if CPUINFO_ARCH_ARM
514 cpuinfo_set_hwcap(UINT32_C(0x0037B0D6));
515 cpuinfo_set_hwcap2(UINT32_C(0x0000001F));
516#elif CPUINFO_ARCH_ARM64
517 cpuinfo_set_hwcap(UINT32_C(0x000000FF));
518#endif
519 cpuinfo_mock_filesystem(filesystem);
520#ifdef __ANDROID__
521 cpuinfo_mock_android_properties(properties);
522#endif
523 cpuinfo_initialize();
524 ::testing::InitGoogleTest(&argc, argv);
525 return RUN_ALL_TESTS();
526}