blob: 593c6136fa7e3b4267cd0583ef08a9b7d0926e41 [file] [log] [blame]
Marat Dukhan2f29c762018-04-10 22:07:36 -07001#include <gtest/gtest.h>
2
3#include <cpuinfo.h>
4#include <cpuinfo-mock.h>
5
6
7TEST(PROCESSORS, count) {
8 ASSERT_EQ(8, cpuinfo_get_processors_count());
9}
10
11TEST(PROCESSORS, non_null) {
12 ASSERT_TRUE(cpuinfo_get_processors());
13}
14
15TEST(PROCESSORS, smt_id) {
16 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
17 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
18 }
19}
20
21TEST(PROCESSORS, core) {
22 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
23 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
24 }
25}
26
27TEST(PROCESSORS, cluster) {
28 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
29 switch (i) {
30 case 0:
31 case 1:
32 case 2:
33 case 3:
34 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster);
35 break;
36 case 4:
37 case 5:
38 case 6:
39 case 7:
40 ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster);
41 break;
42 }
43 }
44}
45
46TEST(PROCESSORS, package) {
47 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
48 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
49 }
50}
51
52TEST(PROCESSORS, linux_id) {
53 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
54 switch (i) {
55 case 0:
56 case 1:
57 case 2:
58 case 3:
59 ASSERT_EQ(i + 4, cpuinfo_get_processor(i)->linux_id);
60 break;
61 case 4:
62 case 5:
63 case 6:
64 case 7:
65 ASSERT_EQ(i - 4, cpuinfo_get_processor(i)->linux_id);
66 break;
67 }
68 }
69}
70
71TEST(PROCESSORS, l1i) {
72 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
73 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
74 }
75}
76
77TEST(PROCESSORS, l1d) {
78 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
79 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
80 }
81}
82
83TEST(PROCESSORS, DISABLED_l2) {
84 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
85 ASSERT_EQ(cpuinfo_get_l2_cache(i), cpuinfo_get_processor(i)->cache.l2);
86 }
87}
88
89TEST(PROCESSORS, DISABLED_l3) {
90 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
91 ASSERT_EQ(cpuinfo_get_l3_cache(i / 4), cpuinfo_get_processor(i)->cache.l3);
92 }
93}
94
95TEST(PROCESSORS, l4) {
96 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
97 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
98 }
99}
100
101TEST(CORES, count) {
102 ASSERT_EQ(8, cpuinfo_get_cores_count());
103}
104
105TEST(CORES, non_null) {
106 ASSERT_TRUE(cpuinfo_get_cores());
107}
108
109TEST(CORES, processor_start) {
110 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
111 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
112 }
113}
114
115TEST(CORES, processor_count) {
116 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
117 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
118 }
119}
120
121TEST(CORES, core_id) {
122 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
123 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
124 }
125}
126
127TEST(CORES, cluster) {
128 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
129 switch (i) {
130 case 0:
131 case 1:
132 case 2:
133 case 3:
134 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster);
135 break;
136 case 4:
137 case 5:
138 case 6:
139 case 7:
140 ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_core(i)->cluster);
141 break;
142 }
143 }
144}
145
146TEST(CORES, package) {
147 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
148 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
149 }
150}
151
152TEST(CORES, vendor) {
153 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
154 switch (i) {
155 case 0:
156 case 1:
157 case 2:
158 case 3:
159 ASSERT_EQ(cpuinfo_vendor_samsung, cpuinfo_get_core(i)->vendor);
160 break;
161 case 4:
162 case 5:
163 case 6:
164 case 7:
165 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor);
166 break;
167 }
168 }
169}
170
171TEST(CORES, uarch) {
172 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
173 switch (i) {
174 case 0:
175 case 1:
176 case 2:
177 case 3:
178 ASSERT_EQ(cpuinfo_uarch_meerkat_m3, cpuinfo_get_core(i)->uarch);
179 break;
180 case 4:
181 case 5:
182 case 6:
183 case 7:
184 ASSERT_EQ(cpuinfo_uarch_cortex_a55, cpuinfo_get_core(i)->uarch);
185 break;
186 }
187 }
188}
189
190TEST(CORES, midr) {
191 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
192 switch (i) {
193 case 0:
194 case 1:
195 case 2:
196 case 3:
197 ASSERT_EQ(UINT32_C(0x531F0020), cpuinfo_get_core(i)->midr);
198 break;
199 case 4:
200 case 5:
201 case 6:
202 case 7:
203 ASSERT_EQ(UINT32_C(0x410FD051), cpuinfo_get_core(i)->midr);
204 break;
205 }
206 }
207}
208
209TEST(CORES, DISABLED_frequency) {
210 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
211 switch (i) {
212 case 0:
213 case 1:
214 case 2:
215 case 3:
216 ASSERT_EQ(UINT64_C(2704000000), cpuinfo_get_core(i)->frequency);
217 break;
218 case 4:
219 case 5:
220 case 6:
221 case 7:
222 ASSERT_EQ(UINT64_C(1794000000), cpuinfo_get_core(i)->frequency);
223 break;
224 }
225 }
226}
227
228TEST(CLUSTERS, count) {
229 ASSERT_EQ(2, cpuinfo_get_clusters_count());
230}
231
232TEST(CLUSTERS, non_null) {
233 ASSERT_TRUE(cpuinfo_get_clusters());
234}
235
236TEST(CLUSTERS, processor_start) {
237 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
238 switch (i) {
239 case 0:
240 ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start);
241 break;
242 case 1:
243 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_start);
244 break;
245 }
246 }
247}
248
249TEST(CLUSTERS, processor_count) {
250 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
251 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count);
252 }
253}
254
255TEST(CLUSTERS, core_start) {
256 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
257 switch (i) {
258 case 0:
259 ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start);
260 break;
261 case 1:
262 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_start);
263 break;
264 }
265 }
266}
267
268TEST(CLUSTERS, core_count) {
269 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
270 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count);
271 }
272}
273
274TEST(CLUSTERS, cluster_id) {
275 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
276 ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id);
277 }
278}
279
280TEST(CLUSTERS, package) {
281 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
282 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package);
283 }
284}
285
286TEST(CLUSTERS, vendor) {
287 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
288 switch (i) {
289 case 0:
290 ASSERT_EQ(cpuinfo_vendor_samsung, cpuinfo_get_cluster(i)->vendor);
291 break;
292 case 1:
293 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor);
294 break;
295 }
296 }
297}
298
299TEST(CLUSTERS, uarch) {
300 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
301 switch (i) {
302 case 0:
303 ASSERT_EQ(cpuinfo_uarch_meerkat_m3, cpuinfo_get_cluster(i)->uarch);
304 break;
305 case 1:
306 ASSERT_EQ(cpuinfo_uarch_cortex_a55, cpuinfo_get_cluster(i)->uarch);
307 break;
308 }
309 }
310}
311
312TEST(CLUSTERS, midr) {
313 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
314 switch (i) {
315 case 0:
316 ASSERT_EQ(UINT32_C(0x531F0020), cpuinfo_get_cluster(i)->midr);
317 break;
318 case 1:
319 ASSERT_EQ(UINT32_C(0x410FD051), cpuinfo_get_cluster(i)->midr);
320 break;
321 }
322 }
323}
324
325TEST(CLUSTERS, DISABLED_frequency) {
326 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
327 switch (i) {
328 case 0:
329 ASSERT_EQ(UINT64_C(2704000000), cpuinfo_get_cluster(i)->frequency);
330 break;
331 case 1:
332 ASSERT_EQ(UINT64_C(1794000000), cpuinfo_get_cluster(i)->frequency);
333 break;
334 }
335 }
336}
337
338TEST(PACKAGES, count) {
339 ASSERT_EQ(1, cpuinfo_get_packages_count());
340}
341
342TEST(PACKAGES, name) {
343 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
344 ASSERT_EQ("Samsung Exynos 9810",
345 std::string(cpuinfo_get_package(i)->name,
346 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
347 }
348}
349
350TEST(PACKAGES, gpu_name) {
351 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
352 ASSERT_EQ("ARM Mali-G72",
353 std::string(cpuinfo_get_package(i)->gpu_name,
354 strnlen(cpuinfo_get_package(i)->gpu_name, CPUINFO_GPU_NAME_MAX)));
355 }
356}
357
358TEST(PACKAGES, processor_start) {
359 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
360 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
361 }
362}
363
364TEST(PACKAGES, processor_count) {
365 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
366 ASSERT_EQ(8, cpuinfo_get_package(i)->processor_count);
367 }
368}
369
370TEST(PACKAGES, core_start) {
371 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
372 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
373 }
374}
375
376TEST(PACKAGES, core_count) {
377 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
378 ASSERT_EQ(8, cpuinfo_get_package(i)->core_count);
379 }
380}
381
382TEST(PACKAGES, cluster_start) {
383 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
384 ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start);
385 }
386}
387
388TEST(PACKAGES, cluster_count) {
389 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
390 ASSERT_EQ(2, cpuinfo_get_package(i)->cluster_count);
391 }
392}
393
394TEST(ISA, thumb) {
395 #if CPUINFO_ARCH_ARM
396 ASSERT_TRUE(cpuinfo_has_arm_thumb());
397 #elif CPUINFO_ARCH_ARM64
398 ASSERT_FALSE(cpuinfo_has_arm_thumb());
399 #endif
400}
401
402TEST(ISA, thumb2) {
403 #if CPUINFO_ARCH_ARM
404 ASSERT_TRUE(cpuinfo_has_arm_thumb2());
405 #elif CPUINFO_ARCH_ARM64
406 ASSERT_FALSE(cpuinfo_has_arm_thumb2());
407 #endif
408}
409
410TEST(ISA, armv5e) {
411 #if CPUINFO_ARCH_ARM
412 ASSERT_TRUE(cpuinfo_has_arm_v5e());
413 #elif CPUINFO_ARCH_ARM64
414 ASSERT_FALSE(cpuinfo_has_arm_v5e());
415 #endif
416}
417
418TEST(ISA, armv6) {
419 #if CPUINFO_ARCH_ARM
420 ASSERT_TRUE(cpuinfo_has_arm_v6());
421 #elif CPUINFO_ARCH_ARM64
422 ASSERT_FALSE(cpuinfo_has_arm_v6());
423 #endif
424}
425
426TEST(ISA, armv6k) {
427 #if CPUINFO_ARCH_ARM
428 ASSERT_TRUE(cpuinfo_has_arm_v6k());
429 #elif CPUINFO_ARCH_ARM64
430 ASSERT_FALSE(cpuinfo_has_arm_v6k());
431 #endif
432}
433
434TEST(ISA, armv7) {
435 #if CPUINFO_ARCH_ARM
436 ASSERT_TRUE(cpuinfo_has_arm_v7());
437 #elif CPUINFO_ARCH_ARM64
438 ASSERT_FALSE(cpuinfo_has_arm_v7());
439 #endif
440}
441
442TEST(ISA, armv7mp) {
443 #if CPUINFO_ARCH_ARM
444 ASSERT_TRUE(cpuinfo_has_arm_v7mp());
445 #elif CPUINFO_ARCH_ARM64
446 ASSERT_FALSE(cpuinfo_has_arm_v7mp());
447 #endif
448}
449
450TEST(ISA, idiv) {
451 ASSERT_TRUE(cpuinfo_has_arm_idiv());
452}
453
454TEST(ISA, vfpv2) {
455 ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
456}
457
458TEST(ISA, vfpv3) {
459 ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
460}
461
462TEST(ISA, vfpv3_d32) {
463 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
464}
465
466TEST(ISA, vfpv3_fp16) {
467 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16());
468}
469
470TEST(ISA, vfpv3_fp16_d32) {
471 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32());
472}
473
474TEST(ISA, vfpv4) {
475 ASSERT_TRUE(cpuinfo_has_arm_vfpv4());
476}
477
478TEST(ISA, vfpv4_d32) {
479 ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32());
480}
481
482TEST(ISA, wmmx) {
483 ASSERT_FALSE(cpuinfo_has_arm_wmmx());
484}
485
486TEST(ISA, wmmx2) {
487 ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
488}
489
490TEST(ISA, neon) {
491 ASSERT_TRUE(cpuinfo_has_arm_neon());
492}
493
494TEST(ISA, neon_fp16) {
495 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16());
496}
497
498TEST(ISA, neon_fma) {
499 ASSERT_TRUE(cpuinfo_has_arm_neon_fma());
500}
501
502TEST(ISA, atomics) {
503 #if CPUINFO_ARCH_ARM
504 ASSERT_FALSE(cpuinfo_has_arm_atomics());
505 #elif CPUINFO_ARCH_ARM64
506 ASSERT_TRUE(cpuinfo_has_arm_atomics());
507 #endif
508}
509
510TEST(ISA, neon_rdm) {
511 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
512}
513
Marat Dukhand03d5d22018-04-19 22:27:28 -0700514TEST(ISA, fp16_arith) {
Marat Dukhan2f29c762018-04-10 22:07:36 -0700515 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
516}
517
518TEST(ISA, jscvt) {
519 ASSERT_FALSE(cpuinfo_has_arm_jscvt());
520}
521
522TEST(ISA, fcma) {
523 ASSERT_FALSE(cpuinfo_has_arm_fcma());
524}
525
526TEST(ISA, aes) {
527 ASSERT_TRUE(cpuinfo_has_arm_aes());
528}
529
530TEST(ISA, sha1) {
531 ASSERT_TRUE(cpuinfo_has_arm_sha1());
532}
533
534TEST(ISA, sha2) {
535 ASSERT_TRUE(cpuinfo_has_arm_sha2());
536}
537
538TEST(ISA, pmull) {
539 ASSERT_TRUE(cpuinfo_has_arm_pmull());
540}
541
542TEST(ISA, crc32) {
543 ASSERT_TRUE(cpuinfo_has_arm_crc32());
544}
545
546TEST(L1I, count) {
547 ASSERT_EQ(8, cpuinfo_get_l1i_caches_count());
548}
549
550TEST(L1I, non_null) {
551 ASSERT_TRUE(cpuinfo_get_l1i_caches());
552}
553
554TEST(L1I, DISABLED_size) {
555 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
556 switch (i) {
557 case 0:
558 case 1:
559 case 2:
560 case 3:
561 ASSERT_EQ(64 * 1024, cpuinfo_get_l1i_cache(i)->size);
562 break;
563 case 4:
564 case 5:
565 case 6:
566 case 7:
567 ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size);
568 break;
569 }
570 }
571}
572
573TEST(L1I, DISABLED_associativity) {
574 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
575 switch (i) {
576 case 0:
577 case 1:
578 case 2:
579 case 3:
580 ASSERT_EQ(4, cpuinfo_get_l1i_cache(i)->associativity);
581 break;
582 case 4:
583 case 5:
584 case 6:
585 case 7:
586 ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity);
587 break;
588 }
589 }
590}
591
592TEST(L1I, sets) {
593 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
594 ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size,
595 cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity);
596 }
597}
598
599TEST(L1I, partitions) {
600 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
601 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
602 }
603}
604
605TEST(L1I, line_size) {
606 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
607 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
608 }
609}
610
611TEST(L1I, flags) {
612 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
613 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
614 }
615}
616
617TEST(L1I, processors) {
618 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
619 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
620 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
621 }
622}
623
624TEST(L1D, count) {
625 ASSERT_EQ(8, cpuinfo_get_l1d_caches_count());
626}
627
628TEST(L1D, non_null) {
629 ASSERT_TRUE(cpuinfo_get_l1d_caches());
630}
631
632TEST(L1D, DISABLED_size) {
633 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
634 ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size);
635 }
636}
637
638TEST(L1D, DISABLED_associativity) {
639 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
640 switch (i) {
641 case 0:
642 case 1:
643 case 2:
644 case 3:
645 ASSERT_EQ(8, cpuinfo_get_l1d_cache(i)->associativity);
646 break;
647 case 4:
648 case 5:
649 case 6:
650 case 7:
651 ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity);
652 break;
653 }
654 }
655}
656
657TEST(L1D, sets) {
658 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
659 ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size,
660 cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity);
661 }
662}
663
664TEST(L1D, partitions) {
665 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
666 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
667 }
668}
669
670TEST(L1D, line_size) {
671 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
672 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
673 }
674}
675
676TEST(L1D, flags) {
677 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
678 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
679 }
680}
681
682TEST(L1D, processors) {
683 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
684 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
685 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
686 }
687}
688
689TEST(L2, DISABLED_count) {
690 ASSERT_EQ(5, cpuinfo_get_l2_caches_count());
691}
692
693TEST(L2, non_null) {
694 ASSERT_TRUE(cpuinfo_get_l2_caches());
695}
696
697TEST(L2, DISABLED_size) {
698 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
699 switch (i) {
700 case 0:
701 case 1:
702 case 2:
703 case 3:
704 ASSERT_EQ(512 * 1024, cpuinfo_get_l2_cache(i)->size);
705 break;
706 case 4:
707 ASSERT_EQ(256 * 1024, cpuinfo_get_l2_cache(i)->size);
708 break;
709 }
710 }
711}
712
713TEST(L2, DISABLED_associativity) {
714 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
715 ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity);
716 }
717}
718
719TEST(L2, sets) {
720 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
721 ASSERT_EQ(cpuinfo_get_l2_cache(i)->size,
722 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
723 }
724}
725
726TEST(L2, partitions) {
727 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
728 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
729 }
730}
731
732TEST(L2, line_size) {
733 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
734 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
735 }
736}
737
738TEST(L2, DISABLED_flags) {
739 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
740 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
741 }
742}
743
744TEST(L2, DISABLED_processors) {
745 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
746 switch (i) {
747 case 0:
748 case 1:
749 case 2:
750 case 3:
751 ASSERT_EQ(i, cpuinfo_get_l2_cache(i)->processor_start);
752 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->processor_count);
753 break;
754 case 4:
755 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_start);
756 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
757 break;
758 }
759 }
760}
761
762TEST(L3, DISABLED_count) {
763 ASSERT_EQ(1, cpuinfo_get_l3_caches_count());
764}
765
766TEST(L3, DISABLED_non_null) {
767 ASSERT_TRUE(cpuinfo_get_l3_caches());
768}
769
770TEST(L3, DISABLED_size) {
771 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
772 switch (i) {
773 case 0:
774 ASSERT_EQ(4 * 1024 * 1024, cpuinfo_get_l3_cache(i)->size);
775 break;
776 }
777 }
778}
779
780TEST(L3, DISABLED_associativity) {
781 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
782 ASSERT_EQ(8, cpuinfo_get_l3_cache(i)->associativity);
783 }
784}
785
786TEST(L3, sets) {
787 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
788 ASSERT_EQ(cpuinfo_get_l3_cache(i)->size,
789 cpuinfo_get_l3_cache(i)->sets * cpuinfo_get_l3_cache(i)->line_size * cpuinfo_get_l3_cache(i)->partitions * cpuinfo_get_l3_cache(i)->associativity);
790 }
791}
792
793TEST(L3, partitions) {
794 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
795 ASSERT_EQ(1, cpuinfo_get_l3_cache(i)->partitions);
796 }
797}
798
799TEST(L3, line_size) {
800 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
801 ASSERT_EQ(64, cpuinfo_get_l3_cache(i)->line_size);
802 }
803}
804
805TEST(L3, DISABLED_flags) {
806 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
807 ASSERT_EQ(0, cpuinfo_get_l3_cache(i)->flags);
808 }
809}
810
811TEST(L3, processors) {
812 for (uint32_t i = 0; i < cpuinfo_get_l3_caches_count(); i++) {
813 ASSERT_EQ(0, cpuinfo_get_l3_cache(i)->processor_start);
814 ASSERT_EQ(4, cpuinfo_get_l3_cache(i)->processor_count);
815 }
816}
817
818TEST(L4, none) {
819 ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
820 ASSERT_FALSE(cpuinfo_get_l4_caches());
821}
822
823#include <galaxy-s9-global.h>
824
825int main(int argc, char* argv[]) {
826#if CPUINFO_ARCH_ARM
827 cpuinfo_set_hwcap(UINT32_C(0x0037B0D6));
828 cpuinfo_set_hwcap2(UINT32_C(0x0000001F));
829#elif CPUINFO_ARCH_ARM64
830 cpuinfo_set_hwcap(UINT32_C(0x000007FF));
831#endif
832 cpuinfo_mock_filesystem(filesystem);
833#ifdef __ANDROID__
834 cpuinfo_mock_android_properties(properties);
835 cpuinfo_mock_gl_renderer("Mali-G72");
836#endif
837 cpuinfo_initialize();
838 ::testing::InitGoogleTest(&argc, argv);
839 return RUN_ALL_TESTS();
840}