blob: eb3498a6374f6ce0d2c877ea6db4f1ea2cbee3e1 [file] [log] [blame]
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -08001#include <stdint.h>
2#include <stddef.h>
3#include <stdlib.h>
4#include <string.h>
5
6#include <cpuinfo.h>
7#include <x86/api.h>
Marat Dukhand0b37602018-12-09 01:59:26 -08008#include <cpuinfo/internal-api.h>
9#include <cpuinfo/log.h>
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -080010
11#include <Windows.h>
12
13static inline uint32_t bit_mask(uint32_t bits) {
14 return (UINT32_C(1) << bits) - UINT32_C(1);
15}
16
17static inline uint32_t low_index_from_kaffinity(KAFFINITY kaffinity) {
18 #if defined(_M_X64) || defined(_M_AMD64)
19 unsigned long index;
20 _BitScanForward64(&index, (unsigned __int64) kaffinity);
21 return (uint32_t) index;
22 #elif defined(_M_IX86)
23 unsigned long index;
24 _BitScanForward(&index, (unsigned long) kaffinity);
25 return (uint32_t) index;
26 #else
27 #error Platform-specific implementation required
28 #endif
29}
30
31static void cpuinfo_x86_count_caches(
32 uint32_t processors_count,
33 const struct cpuinfo_processor* processors,
34 const struct cpuinfo_x86_processor* x86_processor,
35 uint32_t* l1i_count_ptr,
36 uint32_t* l1d_count_ptr,
37 uint32_t* l2_count_ptr,
38 uint32_t* l3_count_ptr,
39 uint32_t* l4_count_ptr)
40{
41 uint32_t l1i_count = 0, l1d_count = 0, l2_count = 0, l3_count = 0, l4_count = 0;
42 uint32_t last_l1i_id = UINT32_MAX, last_l1d_id = UINT32_MAX;
43 uint32_t last_l2_id = UINT32_MAX, last_l3_id = UINT32_MAX, last_l4_id = UINT32_MAX;
44 for (uint32_t i = 0; i < processors_count; i++) {
45 const uint32_t apic_id = processors[i].apic_id;
46 cpuinfo_log_debug("APID ID %"PRIu32": logical processor %"PRIu32, apic_id, i);
47
48 if (x86_processor->cache.l1i.size != 0) {
49 const uint32_t l1i_id = apic_id & ~bit_mask(x86_processor->cache.l1i.apic_bits);
50 if (l1i_id != last_l1i_id) {
51 last_l1i_id = l1i_id;
52 l1i_count++;
53 }
54 }
55 if (x86_processor->cache.l1d.size != 0) {
56 const uint32_t l1d_id = apic_id & ~bit_mask(x86_processor->cache.l1d.apic_bits);
57 if (l1d_id != last_l1d_id) {
58 last_l1d_id = l1d_id;
59 l1d_count++;
60 }
61 }
62 if (x86_processor->cache.l2.size != 0) {
63 const uint32_t l2_id = apic_id & ~bit_mask(x86_processor->cache.l2.apic_bits);
64 if (l2_id != last_l2_id) {
65 last_l2_id = l2_id;
66 l2_count++;
67 }
68 }
69 if (x86_processor->cache.l3.size != 0) {
70 const uint32_t l3_id = apic_id & ~bit_mask(x86_processor->cache.l3.apic_bits);
71 if (l3_id != last_l3_id) {
72 last_l3_id = l3_id;
73 l3_count++;
74 }
75 }
76 if (x86_processor->cache.l4.size != 0) {
77 const uint32_t l4_id = apic_id & ~bit_mask(x86_processor->cache.l4.apic_bits);
78 if (l4_id != last_l4_id) {
79 last_l4_id = l4_id;
80 l4_count++;
81 }
82 }
83 }
84 *l1i_count_ptr = l1i_count;
85 *l1d_count_ptr = l1d_count;
86 *l2_count_ptr = l2_count;
87 *l3_count_ptr = l3_count;
88 *l4_count_ptr = l4_count;
89}
90
91BOOL CALLBACK cpuinfo_x86_windows_init(PINIT_ONCE init_once, PVOID parameter, PVOID* context) {
92 struct cpuinfo_processor* processors = NULL;
93 struct cpuinfo_core* cores = NULL;
Marat Dukhan4d376c32018-03-18 11:36:39 -070094 struct cpuinfo_cluster* clusters = NULL;
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -080095 struct cpuinfo_package* packages = NULL;
96 struct cpuinfo_cache* l1i = NULL;
97 struct cpuinfo_cache* l1d = NULL;
98 struct cpuinfo_cache* l2 = NULL;
99 struct cpuinfo_cache* l3 = NULL;
100 struct cpuinfo_cache* l4 = NULL;
101 PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX processor_infos = NULL;
102
103 HANDLE heap = GetProcessHeap();
104
105 struct cpuinfo_x86_processor x86_processor;
106 ZeroMemory(&x86_processor, sizeof(x86_processor));
107 cpuinfo_x86_init_processor(&x86_processor);
Marat Dukhan88346572018-03-11 15:28:17 -0700108 char brand_string[48];
109 cpuinfo_x86_normalize_brand_string(x86_processor.brand_string, brand_string);
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -0800110
111 const uint32_t thread_bits_mask = bit_mask(x86_processor.topology.thread_bits_length);
112 const uint32_t core_bits_mask = bit_mask(x86_processor.topology.core_bits_length);
113 const uint32_t package_bits_offset = max(
114 x86_processor.topology.thread_bits_offset + x86_processor.topology.thread_bits_length,
115 x86_processor.topology.core_bits_offset + x86_processor.topology.core_bits_length);
116
117 const uint32_t max_group_count = (uint32_t) GetMaximumProcessorGroupCount();
118 cpuinfo_log_debug("detected %"PRIu32" processor groups", max_group_count);
119
120 uint32_t processors_count = 0;
121 uint32_t* processors_per_group = (uint32_t*) _alloca(max_group_count * sizeof(uint32_t));
122 for (uint32_t i = 0; i < max_group_count; i++) {
123 processors_per_group[i] = GetMaximumProcessorCount((WORD) i);
124 cpuinfo_log_debug("detected %"PRIu32" processors in group %"PRIu32,
125 processors_per_group[i], i);
126 processors_count += processors_per_group[i];
127 }
128
129 uint32_t* processors_before_group = (uint32_t*) _alloca(max_group_count * sizeof(uint32_t));
130 for (uint32_t i = 0, count = 0; i < max_group_count; i++) {
131 processors_before_group[i] = count;
132 cpuinfo_log_debug("detected %"PRIu32" processors before group %"PRIu32,
133 processors_before_group[i], i);
134 count += processors_per_group[i];
135 }
136
137 processors = HeapAlloc(heap, HEAP_ZERO_MEMORY, processors_count * sizeof(struct cpuinfo_processor));
138 if (processors == NULL) {
139 cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" logical processors",
140 processors_count * sizeof(struct cpuinfo_processor), processors_count);
141 goto cleanup;
142 }
143
144 DWORD cores_info_size = 0;
145 if (GetLogicalProcessorInformationEx(RelationProcessorCore, NULL, &cores_info_size) == FALSE) {
146 const DWORD last_error = GetLastError();
147 if (last_error != ERROR_INSUFFICIENT_BUFFER) {
148 cpuinfo_log_error("failed to query size of processor cores information: error %"PRIu32,
149 (uint32_t) last_error);
150 goto cleanup;
151 }
152 }
153
154 DWORD packages_info_size = 0;
155 if (GetLogicalProcessorInformationEx(RelationProcessorPackage, NULL, &packages_info_size) == FALSE) {
156 const DWORD last_error = GetLastError();
157 if (last_error != ERROR_INSUFFICIENT_BUFFER) {
158 cpuinfo_log_error("failed to query size of processor packages information: error %"PRIu32,
159 (uint32_t) last_error);
160 goto cleanup;
161 }
162 }
163
164 DWORD max_info_size = max(cores_info_size, packages_info_size);
165
166 processor_infos = HeapAlloc(heap, 0, max_info_size);
167 if (processor_infos == NULL) {
168 cpuinfo_log_error("failed to allocate %"PRIu32" bytes for logical processor information",
169 (uint32_t) max_info_size);
170 goto cleanup;
171 }
172
173 if (GetLogicalProcessorInformationEx(RelationProcessorPackage, processor_infos, &max_info_size) == FALSE) {
174 cpuinfo_log_error("failed to query processor packages information: error %"PRIu32,
175 (uint32_t) GetLastError());
176 goto cleanup;
177 }
178
179 uint32_t packages_count = 0;
180 PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX packages_info_end =
181 (PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX) ((uintptr_t) processor_infos + packages_info_size);
182 for (PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX package_info = processor_infos;
183 package_info < packages_info_end;
184 package_info = (PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX) ((uintptr_t) package_info + package_info->Size))
185 {
186 if (package_info->Relationship != RelationProcessorPackage) {
187 cpuinfo_log_warning("unexpected processor info type (%"PRIu32") for processor package information",
188 (uint32_t) package_info->Relationship);
189 continue;
190 }
191
192 /* We assume that packages are reported in APIC order */
193 const uint32_t package_id = packages_count++;
194 /* Reconstruct package part of APIC ID */
195 const uint32_t package_apic_id = package_id << package_bits_offset;
196 /* Iterate processor groups and set the package part of APIC ID */
197 for (uint32_t i = 0; i < package_info->Processor.GroupCount; i++) {
198 const uint32_t group_id = package_info->Processor.GroupMask[i].Group;
199 /* Global index of the first logical processor belonging to this group */
200 const uint32_t group_processors_start = processors_before_group[group_id];
201 /* Bitmask representing processors in this group belonging to this package */
202 KAFFINITY group_processors_mask = package_info->Processor.GroupMask[i].Mask;
203 while (group_processors_mask != 0) {
204 const uint32_t group_processor_id = low_index_from_kaffinity(group_processors_mask);
205 const uint32_t processor_id = group_processors_start + group_processor_id;
206 processors[processor_id].package = (const struct cpuinfo_package*) NULL + package_id;
207 processors[processor_id].windows_group_id = (uint16_t) group_id;
208 processors[processor_id].windows_processor_id = (uint16_t) group_processor_id;
209 processors[processor_id].apic_id = package_apic_id;
210
211 /* Reset the lowest bit in affinity mask */
212 group_processors_mask &= (group_processors_mask - 1);
213 }
214 }
215 }
216
217 max_info_size = max(cores_info_size, packages_info_size);
218 if (GetLogicalProcessorInformationEx(RelationProcessorCore, processor_infos, &max_info_size) == FALSE) {
219 cpuinfo_log_error("failed to query processor cores information: error %"PRIu32,
220 (uint32_t) GetLastError());
221 goto cleanup;
222 }
223
224 uint32_t cores_count = 0;
225 /* Index (among all cores) of the the first core on the current package */
226 uint32_t package_core_start = 0;
227 uint32_t current_package_apic_id = 0;
228 PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX cores_info_end =
229 (PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX) ((uintptr_t) processor_infos + cores_info_size);
230 for (PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX core_info = processor_infos;
231 core_info < cores_info_end;
232 core_info = (PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX) ((uintptr_t) core_info + core_info->Size))
233 {
234 if (core_info->Relationship != RelationProcessorCore) {
235 cpuinfo_log_warning("unexpected processor info type (%"PRIu32") for processor core information",
236 (uint32_t) core_info->Relationship);
237 continue;
238 }
239
240 /* We assume that cores and logical processors are reported in APIC order */
241 const uint32_t core_id = cores_count++;
242 uint32_t smt_id = 0;
243 /* Reconstruct core part of APIC ID */
244 const uint32_t core_apic_id = (core_id & core_bits_mask) << x86_processor.topology.core_bits_offset;
245 /* Iterate processor groups and set the core & SMT parts of APIC ID */
246 for (uint32_t i = 0; i < core_info->Processor.GroupCount; i++) {
247 const uint32_t group_id = core_info->Processor.GroupMask[i].Group;
248 /* Global index of the first logical processor belonging to this group */
249 const uint32_t group_processors_start = processors_before_group[group_id];
250 /* Bitmask representing processors in this group belonging to this package */
251 KAFFINITY group_processors_mask = core_info->Processor.GroupMask[i].Mask;
252 while (group_processors_mask != 0) {
253 const uint32_t group_processor_id = low_index_from_kaffinity(group_processors_mask);
254 const uint32_t processor_id = group_processors_start + group_processor_id;
255
256 /* Check if this is the first core on a new package */
257 if (processors[processor_id].apic_id != current_package_apic_id) {
258 package_core_start = core_id;
259 current_package_apic_id = processors[processor_id].apic_id;
260 }
261 /* Core ID w.r.t package */
262 const uint32_t package_core_id = core_id - package_core_start;
263
264 /* Update APIC ID with core and SMT parts */
265 processors[processor_id].apic_id |=
266 ((smt_id & thread_bits_mask) << x86_processor.topology.thread_bits_offset) |
267 ((package_core_id & core_bits_mask) << x86_processor.topology.core_bits_offset);
268 cpuinfo_log_debug("reconstructed APIC ID 0x%08"PRIx32" for processor %"PRIu32" in group %"PRIu32,
269 processors[processor_id].apic_id, group_processor_id, group_id);
270
271 /* Set SMT ID (assume logical processors within the core are reported in APIC order) */
272 processors[processor_id].smt_id = smt_id++;
273 processors[processor_id].core = (const struct cpuinfo_core*) NULL + core_id;
274
275 /* Reset the lowest bit in affinity mask */
276 group_processors_mask &= (group_processors_mask - 1);
277 }
278 }
279 }
280
281 cores = HeapAlloc(heap, HEAP_ZERO_MEMORY, cores_count * sizeof(struct cpuinfo_core));
282 if (cores == NULL) {
283 cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" cores",
284 cores_count * sizeof(struct cpuinfo_core), cores_count);
285 goto cleanup;
286 }
287
Marat Dukhan4d376c32018-03-18 11:36:39 -0700288 clusters = HeapAlloc(heap, HEAP_ZERO_MEMORY, packages_count * sizeof(struct cpuinfo_cluster));
289 if (clusters == NULL) {
290 cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" core clusters",
291 packages_count * sizeof(struct cpuinfo_cluster), packages_count);
292 goto cleanup;
293 }
294
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -0800295 packages = HeapAlloc(heap, HEAP_ZERO_MEMORY, packages_count * sizeof(struct cpuinfo_package));
296 if (packages == NULL) {
Marat Dukhan29000602018-03-18 00:29:39 -0700297 cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" physical packages",
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -0800298 packages_count * sizeof(struct cpuinfo_package), packages_count);
299 goto cleanup;
300 }
301
302 for (uint32_t i = processors_count; i != 0; i--) {
303 const uint32_t processor_id = i - 1;
304 struct cpuinfo_processor* processor = processors + processor_id;
305
306 /* Adjust core and package pointers for all logical processors */
307 struct cpuinfo_core* core =
308 (struct cpuinfo_core*) ((uintptr_t) cores + (uintptr_t) processor->core);
309 processor->core = core;
Marat Dukhan4d376c32018-03-18 11:36:39 -0700310 struct cpuinfo_cluster* cluster =
311 (struct cpuinfo_cluster*) ((uintptr_t) clusters + (uintptr_t) processor->cluster);
312 processor->cluster = cluster;
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -0800313 struct cpuinfo_package* package =
Marat Dukhan29000602018-03-18 00:29:39 -0700314 (struct cpuinfo_package*) ((uintptr_t) packages + (uintptr_t) processor->package);
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -0800315 processor->package = package;
316
317 /* This can be overwritten by lower-index processors on the same package */
318 package->processor_start = processor_id;
319 package->processor_count += 1;
320
Marat Dukhan4d376c32018-03-18 11:36:39 -0700321 /* This can be overwritten by lower-index processors on the same cluster */
322 cluster->processor_start = processor_id;
323 cluster->processor_count += 1;
324
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -0800325 /* This can be overwritten by lower-index processors on the same core*/
326 core->processor_start = processor_id;
327 core->processor_count += 1;
328 }
329
330 /* Set vendor/uarch/CPUID information for cores */
331 for (uint32_t i = cores_count; i != 0; i--) {
332 const uint32_t global_core_id = i - 1;
333 struct cpuinfo_core* core = cores + global_core_id;
334 const struct cpuinfo_processor* processor = processors + core->processor_start;
335 struct cpuinfo_package* package = (struct cpuinfo_package*) processor->package;
Marat Dukhan4d376c32018-03-18 11:36:39 -0700336 struct cpuinfo_cluster* cluster = (struct cpuinfo_cluster*) processor->cluster;
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -0800337
Marat Dukhan6851c3f2018-03-18 12:00:45 -0700338 core->cluster = cluster;
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -0800339 core->package = package;
340 core->core_id = core_bits_mask &
341 (processor->apic_id >> x86_processor.topology.core_bits_offset);
342 core->vendor = x86_processor.vendor;
343 core->uarch = x86_processor.uarch;
344 core->cpuid = x86_processor.cpuid;
345
Marat Dukhan4d376c32018-03-18 11:36:39 -0700346 /* This can be overwritten by lower-index cores on the same cluster/package */
347 cluster->core_start = global_core_id;
348 cluster->core_count += 1;
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -0800349 package->core_start = global_core_id;
350 package->core_count += 1;
351 }
352
353 for (uint32_t i = 0; i < packages_count; i++) {
Marat Dukhan706fea32018-03-18 11:49:40 -0700354 struct cpuinfo_package* package = packages + i;
355 struct cpuinfo_cluster* cluster = clusters + i;
356
357 cluster->package = package;
Marat Dukhan4d376c32018-03-18 11:36:39 -0700358 cluster->vendor = cores[cluster->core_start].vendor;
359 cluster->uarch = cores[cluster->core_start].uarch;
360 cluster->cpuid = cores[cluster->core_start].cpuid;
361 package->cluster_start = i;
362 package->cluster_count = 1;
Marat Dukhan706fea32018-03-18 11:49:40 -0700363 cpuinfo_x86_format_package_name(x86_processor.vendor, brand_string, package->name);
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -0800364 }
365
366 /* Count caches */
367 uint32_t l1i_count, l1d_count, l2_count, l3_count, l4_count;
368 cpuinfo_x86_count_caches(processors_count, processors, &x86_processor,
369 &l1i_count, &l1d_count, &l2_count, &l3_count, &l4_count);
370
371 /* Allocate cache descriptions */
372 if (l1i_count != 0) {
373 l1i = HeapAlloc(heap, HEAP_ZERO_MEMORY, l1i_count * sizeof(struct cpuinfo_cache));
374 if (l1i == NULL) {
375 cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" L1I caches",
376 l1i_count * sizeof(struct cpuinfo_cache), l1i_count);
377 goto cleanup;
378 }
379 }
380 if (l1d_count != 0) {
381 l1d = HeapAlloc(heap, HEAP_ZERO_MEMORY, l1d_count * sizeof(struct cpuinfo_cache));
382 if (l1d == NULL) {
383 cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" L1D caches",
384 l1d_count * sizeof(struct cpuinfo_cache), l1d_count);
385 goto cleanup;
386 }
387 }
388 if (l2_count != 0) {
389 l2 = HeapAlloc(heap, HEAP_ZERO_MEMORY, l2_count * sizeof(struct cpuinfo_cache));
390 if (l2 == NULL) {
391 cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" L2 caches",
392 l2_count * sizeof(struct cpuinfo_cache), l2_count);
393 goto cleanup;
394 }
395 }
396 if (l3_count != 0) {
397 l3 = HeapAlloc(heap, HEAP_ZERO_MEMORY, l3_count * sizeof(struct cpuinfo_cache));
398 if (l3 == NULL) {
399 cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" L3 caches",
400 l3_count * sizeof(struct cpuinfo_cache), l3_count);
401 goto cleanup;
402 }
403 }
404 if (l4_count != 0) {
405 l4 = HeapAlloc(heap, HEAP_ZERO_MEMORY, l4_count * sizeof(struct cpuinfo_cache));
406 if (l4 == NULL) {
407 cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" L4 caches",
408 l4_count * sizeof(struct cpuinfo_cache), l4_count);
409 goto cleanup;
410 }
411 }
412
413 /* Set cache information */
414 uint32_t l1i_index = UINT32_MAX, l1d_index = UINT32_MAX, l2_index = UINT32_MAX, l3_index = UINT32_MAX, l4_index = UINT32_MAX;
415 uint32_t last_l1i_id = UINT32_MAX, last_l1d_id = UINT32_MAX;
416 uint32_t last_l2_id = UINT32_MAX, last_l3_id = UINT32_MAX, last_l4_id = UINT32_MAX;
417 for (uint32_t i = 0; i < processors_count; i++) {
418 const uint32_t apic_id = processors[i].apic_id;
419
420 //linux_cpu_to_processor_map[x86_linux_processors[i].linux_id] = processors + processor_index;
421 //linux_cpu_to_core_map[x86_linux_processors[i].linux_id] = cores + core_index;
422
423 if (x86_processor.cache.l1i.size != 0) {
424 const uint32_t l1i_id = apic_id & ~bit_mask(x86_processor.cache.l1i.apic_bits);
425 processors[i].cache.l1i = &l1i[l1i_index];
426 if (l1i_id != last_l1i_id) {
427 /* new cache */
428 last_l1i_id = l1i_id;
429 l1i[++l1i_index] = (struct cpuinfo_cache) {
430 .size = x86_processor.cache.l1i.size,
431 .associativity = x86_processor.cache.l1i.associativity,
432 .sets = x86_processor.cache.l1i.sets,
433 .partitions = x86_processor.cache.l1i.partitions,
434 .line_size = x86_processor.cache.l1i.line_size,
435 .flags = x86_processor.cache.l1i.flags,
436 .processor_start = i,
437 .processor_count = 1,
438 };
439 } else {
440 /* another processor sharing the same cache */
441 l1i[l1i_index].processor_count += 1;
442 }
443 processors[i].cache.l1i = &l1i[l1i_index];
444 } else {
445 /* reset cache id */
446 last_l1i_id = UINT32_MAX;
447 }
448 if (x86_processor.cache.l1d.size != 0) {
449 const uint32_t l1d_id = apic_id & ~bit_mask(x86_processor.cache.l1d.apic_bits);
450 processors[i].cache.l1d = &l1d[l1d_index];
451 if (l1d_id != last_l1d_id) {
452 /* new cache */
453 last_l1d_id = l1d_id;
454 l1d[++l1d_index] = (struct cpuinfo_cache) {
455 .size = x86_processor.cache.l1d.size,
456 .associativity = x86_processor.cache.l1d.associativity,
457 .sets = x86_processor.cache.l1d.sets,
458 .partitions = x86_processor.cache.l1d.partitions,
459 .line_size = x86_processor.cache.l1d.line_size,
460 .flags = x86_processor.cache.l1d.flags,
461 .processor_start = i,
462 .processor_count = 1,
463 };
464 } else {
465 /* another processor sharing the same cache */
466 l1d[l1d_index].processor_count += 1;
467 }
468 processors[i].cache.l1d = &l1d[l1d_index];
469 } else {
470 /* reset cache id */
471 last_l1d_id = UINT32_MAX;
472 }
473 if (x86_processor.cache.l2.size != 0) {
474 const uint32_t l2_id = apic_id & ~bit_mask(x86_processor.cache.l2.apic_bits);
475 processors[i].cache.l2 = &l2[l2_index];
476 if (l2_id != last_l2_id) {
477 /* new cache */
478 last_l2_id = l2_id;
479 l2[++l2_index] = (struct cpuinfo_cache) {
480 .size = x86_processor.cache.l2.size,
481 .associativity = x86_processor.cache.l2.associativity,
482 .sets = x86_processor.cache.l2.sets,
483 .partitions = x86_processor.cache.l2.partitions,
484 .line_size = x86_processor.cache.l2.line_size,
485 .flags = x86_processor.cache.l2.flags,
486 .processor_start = i,
487 .processor_count = 1,
488 };
489 } else {
490 /* another processor sharing the same cache */
491 l2[l2_index].processor_count += 1;
492 }
493 processors[i].cache.l2 = &l2[l2_index];
494 } else {
495 /* reset cache id */
496 last_l2_id = UINT32_MAX;
497 }
498 if (x86_processor.cache.l3.size != 0) {
499 const uint32_t l3_id = apic_id & ~bit_mask(x86_processor.cache.l3.apic_bits);
500 processors[i].cache.l3 = &l3[l3_index];
501 if (l3_id != last_l3_id) {
502 /* new cache */
503 last_l3_id = l3_id;
504 l3[++l3_index] = (struct cpuinfo_cache) {
505 .size = x86_processor.cache.l3.size,
506 .associativity = x86_processor.cache.l3.associativity,
507 .sets = x86_processor.cache.l3.sets,
508 .partitions = x86_processor.cache.l3.partitions,
509 .line_size = x86_processor.cache.l3.line_size,
510 .flags = x86_processor.cache.l3.flags,
511 .processor_start = i,
512 .processor_count = 1,
513 };
514 } else {
515 /* another processor sharing the same cache */
516 l3[l3_index].processor_count += 1;
517 }
518 processors[i].cache.l3 = &l3[l3_index];
519 } else {
520 /* reset cache id */
521 last_l3_id = UINT32_MAX;
522 }
523 if (x86_processor.cache.l4.size != 0) {
524 const uint32_t l4_id = apic_id & ~bit_mask(x86_processor.cache.l4.apic_bits);
525 processors[i].cache.l4 = &l4[l4_index];
526 if (l4_id != last_l4_id) {
527 /* new cache */
528 last_l4_id = l4_id;
529 l4[++l4_index] = (struct cpuinfo_cache) {
530 .size = x86_processor.cache.l4.size,
531 .associativity = x86_processor.cache.l4.associativity,
532 .sets = x86_processor.cache.l4.sets,
533 .partitions = x86_processor.cache.l4.partitions,
534 .line_size = x86_processor.cache.l4.line_size,
535 .flags = x86_processor.cache.l4.flags,
536 .processor_start = i,
537 .processor_count = 1,
538 };
539 } else {
540 /* another processor sharing the same cache */
541 l4[l4_index].processor_count += 1;
542 }
543 processors[i].cache.l4 = &l4[l4_index];
544 } else {
545 /* reset cache id */
546 last_l4_id = UINT32_MAX;
547 }
548 }
549
550
551 /* Commit changes */
552 cpuinfo_cache[cpuinfo_cache_level_1i] = l1i;
553 cpuinfo_cache[cpuinfo_cache_level_1d] = l1d;
554 cpuinfo_cache[cpuinfo_cache_level_2] = l2;
555 cpuinfo_cache[cpuinfo_cache_level_3] = l3;
556 cpuinfo_cache[cpuinfo_cache_level_4] = l4;
557
558 cpuinfo_processors = processors;
559 cpuinfo_cores = cores;
Marat Dukhan6851c3f2018-03-18 12:00:45 -0700560 cpuinfo_clusters = clusters;
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -0800561 cpuinfo_packages = packages;
562
563 cpuinfo_cache_count[cpuinfo_cache_level_1i] = l1i_count;
564 cpuinfo_cache_count[cpuinfo_cache_level_1d] = l1d_count;
565 cpuinfo_cache_count[cpuinfo_cache_level_2] = l2_count;
566 cpuinfo_cache_count[cpuinfo_cache_level_3] = l3_count;
567 cpuinfo_cache_count[cpuinfo_cache_level_4] = l4_count;
568
569 cpuinfo_processors_count = processors_count;
570 cpuinfo_cores_count = cores_count;
Marat Dukhan6851c3f2018-03-18 12:00:45 -0700571 cpuinfo_clusters_count = packages_count;
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -0800572 cpuinfo_packages_count = packages_count;
573
Marat Dukhancf70aee2018-03-24 23:21:02 -0700574 MemoryBarrier();
575
576 cpuinfo_is_initialized = true;
577
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -0800578 processors = NULL;
579 cores = NULL;
Marat Dukhan4d376c32018-03-18 11:36:39 -0700580 clusters = NULL;
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -0800581 packages = NULL;
582 l1i = l1d = l2 = l3 = l4 = NULL;
583
584cleanup:
585 if (processors != NULL) {
586 HeapFree(heap, 0, processors);
587 }
588 if (cores != NULL) {
589 HeapFree(heap, 0, cores);
590 }
Marat Dukhan4d376c32018-03-18 11:36:39 -0700591 if (clusters != NULL) {
592 HeapFree(heap, 0, clusters);
593 }
Marat Dukhanb2fc4ab2018-02-19 22:43:26 -0800594 if (packages != NULL) {
595 HeapFree(heap, 0, packages);
596 }
597 if (l1i != NULL) {
598 HeapFree(heap, 0, l1i);
599 }
600 if (l1d != NULL) {
601 HeapFree(heap, 0, l1d);
602 }
603 if (l2 != NULL) {
604 HeapFree(heap, 0, l2);
605 }
606 if (l3 != NULL) {
607 HeapFree(heap, 0, l3);
608 }
609 if (l4 != NULL) {
610 HeapFree(heap, 0, l4);
611 }
612 return TRUE;
613}