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Marat Dukhan1aeee8e2017-08-10 17:33:45 -07001#include <gtest/gtest.h>
2
3#include <cpuinfo.h>
4#include <cpuinfo-mock.h>
5
6
7TEST(PROCESSORS, count) {
Marat Dukhan30401972017-09-26 18:35:52 -07008 ASSERT_EQ(4, cpuinfo_get_processors_count());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -07009}
10
11TEST(PROCESSORS, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -070012 ASSERT_TRUE(cpuinfo_get_processors());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -070013}
14
Marat Dukhan2d37dc42017-09-25 01:32:37 -070015TEST(PROCESSORS, smt_id) {
Marat Dukhan30401972017-09-26 18:35:52 -070016 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
17 ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -070018 }
19}
20
Marat Dukhan2d37dc42017-09-25 01:32:37 -070021TEST(PROCESSORS, core) {
Marat Dukhan30401972017-09-26 18:35:52 -070022 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
23 ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070024 }
25}
26
Marat Dukhan2b307932018-03-18 16:15:36 -070027TEST(PROCESSORS, cluster) {
28 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
29 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster);
30 }
31}
32
Marat Dukhan2d37dc42017-09-25 01:32:37 -070033TEST(PROCESSORS, package) {
Marat Dukhan30401972017-09-26 18:35:52 -070034 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
35 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -070036 }
37}
38
Marat Dukhan846c1782017-09-13 09:47:26 -070039TEST(PROCESSORS, linux_id) {
Marat Dukhan30401972017-09-26 18:35:52 -070040 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
41 ASSERT_EQ(i, cpuinfo_get_processor(i)->linux_id);
Marat Dukhan846c1782017-09-13 09:47:26 -070042 }
43}
44
Marat Dukhan2d37dc42017-09-25 01:32:37 -070045TEST(PROCESSORS, l1i) {
Marat Dukhan30401972017-09-26 18:35:52 -070046 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
47 ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070048 }
49}
50
51TEST(PROCESSORS, l1d) {
Marat Dukhan30401972017-09-26 18:35:52 -070052 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
53 ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070054 }
55}
56
57TEST(PROCESSORS, l2) {
Marat Dukhan30401972017-09-26 18:35:52 -070058 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
59 ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070060 }
61}
62
63TEST(PROCESSORS, l3) {
Marat Dukhan30401972017-09-26 18:35:52 -070064 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
65 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070066 }
67}
68
69TEST(PROCESSORS, l4) {
Marat Dukhan30401972017-09-26 18:35:52 -070070 for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) {
71 ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070072 }
73}
74
Marat Dukhan7073e832017-09-24 22:23:55 -070075TEST(CORES, count) {
Marat Dukhan30401972017-09-26 18:35:52 -070076 ASSERT_EQ(4, cpuinfo_get_cores_count());
Marat Dukhan7073e832017-09-24 22:23:55 -070077}
78
Marat Dukhan2d37dc42017-09-25 01:32:37 -070079TEST(CORES, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -070080 ASSERT_TRUE(cpuinfo_get_cores());
Marat Dukhan2d37dc42017-09-25 01:32:37 -070081}
82
Marat Dukhan7073e832017-09-24 22:23:55 -070083TEST(CORES, processor_start) {
Marat Dukhan30401972017-09-26 18:35:52 -070084 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
85 ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start);
Marat Dukhan7073e832017-09-24 22:23:55 -070086 }
87}
88
89TEST(CORES, processor_count) {
Marat Dukhan30401972017-09-26 18:35:52 -070090 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
91 ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count);
Marat Dukhan7073e832017-09-24 22:23:55 -070092 }
93}
94
Marat Dukhan2d37dc42017-09-25 01:32:37 -070095TEST(CORES, core_id) {
Marat Dukhan30401972017-09-26 18:35:52 -070096 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
97 ASSERT_EQ(i, cpuinfo_get_core(i)->core_id);
Marat Dukhan2d37dc42017-09-25 01:32:37 -070098 }
99}
100
Marat Dukhan2b307932018-03-18 16:15:36 -0700101TEST(CORES, cluster) {
102 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
103 ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster);
104 }
105}
106
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700107TEST(CORES, package) {
Marat Dukhan30401972017-09-26 18:35:52 -0700108 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
109 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700110 }
111}
112
113TEST(CORES, vendor) {
Marat Dukhan30401972017-09-26 18:35:52 -0700114 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
115 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700116 }
117}
118
119TEST(CORES, uarch) {
Marat Dukhan30401972017-09-26 18:35:52 -0700120 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
121 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700122 }
123}
124
125TEST(CORES, midr) {
Marat Dukhan30401972017-09-26 18:35:52 -0700126 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
127 ASSERT_EQ(UINT32_C(0x410FD033), cpuinfo_get_core(i)->midr);
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700128 }
129}
130
Marat Dukhan575a6302018-03-10 14:38:49 -0800131TEST(CORES, DISABLED_frequency) {
132 for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) {
133 ASSERT_EQ(UINT64_C(1300000000), cpuinfo_get_core(i)->frequency);
134 }
135}
136
Marat Dukhandbc78402018-03-18 22:49:35 -0700137TEST(CLUSTERS, count) {
138 ASSERT_EQ(1, cpuinfo_get_clusters_count());
139}
140
141TEST(CLUSTERS, non_null) {
142 ASSERT_TRUE(cpuinfo_get_clusters());
143}
144
145TEST(CLUSTERS, processor_start) {
146 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
147 ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start);
148 }
149}
150
151TEST(CLUSTERS, processor_count) {
152 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
153 ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count);
154 }
155}
156
157TEST(CLUSTERS, core_start) {
158 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
159 ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start);
160 }
161}
162
163TEST(CLUSTERS, core_count) {
164 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
165 ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count);
166 }
167}
168
169TEST(CLUSTERS, cluster_id) {
170 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
171 ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id);
172 }
173}
174
175TEST(CLUSTERS, package) {
176 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
177 ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package);
178 }
179}
180
181TEST(CLUSTERS, vendor) {
182 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
183 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor);
184 }
185}
186
187TEST(CLUSTERS, uarch) {
188 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
189 ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_cluster(i)->uarch);
190 }
191}
192
193TEST(CLUSTERS, midr) {
194 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
195 ASSERT_EQ(UINT32_C(0x410FD033), cpuinfo_get_cluster(i)->midr);
196 }
197}
198
199TEST(CLUSTERS, DISABLED_frequency) {
200 for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) {
201 ASSERT_EQ(UINT64_C(1300000000), cpuinfo_get_cluster(i)->frequency);
202 }
203}
204
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700205TEST(PACKAGES, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700206 ASSERT_EQ(1, cpuinfo_get_packages_count());
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700207}
208
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700209TEST(PACKAGES, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -0700210 ASSERT_TRUE(cpuinfo_get_packages());
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700211}
212
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700213TEST(PACKAGES, name) {
Marat Dukhan30401972017-09-26 18:35:52 -0700214 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700215 ASSERT_EQ("MediaTek MT6735",
Marat Dukhan30401972017-09-26 18:35:52 -0700216 std::string(cpuinfo_get_package(i)->name,
217 strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX)));
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700218 }
219}
220
Marat Dukhanfd0f3ef2017-12-18 17:45:18 -0800221TEST(PACKAGES, gpu_name) {
222 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
223 ASSERT_EQ("ARM Mali-T720",
224 std::string(cpuinfo_get_package(i)->gpu_name,
225 strnlen(cpuinfo_get_package(i)->gpu_name, CPUINFO_GPU_NAME_MAX)));
226 }
227}
228
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700229TEST(PACKAGES, processor_start) {
Marat Dukhan30401972017-09-26 18:35:52 -0700230 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
231 ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700232 }
233}
234
235TEST(PACKAGES, processor_count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700236 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
237 ASSERT_EQ(4, cpuinfo_get_package(i)->processor_count);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700238 }
239}
240
241TEST(PACKAGES, core_start) {
Marat Dukhan30401972017-09-26 18:35:52 -0700242 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
243 ASSERT_EQ(0, cpuinfo_get_package(i)->core_start);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700244 }
245}
246
247TEST(PACKAGES, core_count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700248 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
249 ASSERT_EQ(4, cpuinfo_get_package(i)->core_count);
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700250 }
251}
252
Marat Dukhan2b307932018-03-18 16:15:36 -0700253TEST(PACKAGES, cluster_start) {
254 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
255 ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start);
256 }
257}
258
259TEST(PACKAGES, cluster_count) {
260 for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) {
261 ASSERT_EQ(1, cpuinfo_get_package(i)->cluster_count);
262 }
263}
264
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700265TEST(ISA, thumb) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700266 ASSERT_TRUE(cpuinfo_has_arm_thumb());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700267}
268
269TEST(ISA, thumb2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700270 ASSERT_TRUE(cpuinfo_has_arm_thumb2());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700271}
272
273TEST(ISA, armv5e) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700274 ASSERT_TRUE(cpuinfo_has_arm_v5e());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700275}
276
277TEST(ISA, armv6) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700278 ASSERT_TRUE(cpuinfo_has_arm_v6());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700279}
280
281TEST(ISA, armv6k) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700282 ASSERT_TRUE(cpuinfo_has_arm_v6k());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700283}
284
285TEST(ISA, armv7) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700286 ASSERT_TRUE(cpuinfo_has_arm_v7());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700287}
288
289TEST(ISA, armv7mp) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700290 ASSERT_TRUE(cpuinfo_has_arm_v7mp());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700291}
292
293TEST(ISA, idiv) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700294 ASSERT_TRUE(cpuinfo_has_arm_idiv());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700295}
296
297TEST(ISA, vfpv2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700298 ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700299}
300
301TEST(ISA, vfpv3) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700302 ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700303}
304
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700305TEST(ISA, vfpv3_d32) {
306 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700307}
308
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700309TEST(ISA, vfpv3_fp16) {
310 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700311}
312
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700313TEST(ISA, vfpv3_fp16_d32) {
314 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32());
315}
316
317TEST(ISA, vfpv4) {
318 ASSERT_TRUE(cpuinfo_has_arm_vfpv4());
319}
320
321TEST(ISA, vfpv4_d32) {
322 ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700323}
324
325TEST(ISA, wmmx) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700326 ASSERT_FALSE(cpuinfo_has_arm_wmmx());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700327}
328
329TEST(ISA, wmmx2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700330 ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700331}
332
333TEST(ISA, neon) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700334 ASSERT_TRUE(cpuinfo_has_arm_neon());
335}
336
337TEST(ISA, neon_fp16) {
338 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16());
339}
340
341TEST(ISA, neon_fma) {
342 ASSERT_TRUE(cpuinfo_has_arm_neon_fma());
343}
344
345TEST(ISA, atomics) {
346 ASSERT_FALSE(cpuinfo_has_arm_atomics());
347}
348
349TEST(ISA, neon_rdm) {
350 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
351}
352
353TEST(ISA, fp16_arith) {
354 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
355}
356
357TEST(ISA, jscvt) {
358 ASSERT_FALSE(cpuinfo_has_arm_jscvt());
359}
360
361TEST(ISA, fcma) {
362 ASSERT_FALSE(cpuinfo_has_arm_fcma());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700363}
364
365TEST(ISA, aes) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700366 ASSERT_FALSE(cpuinfo_has_arm_aes());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700367}
368
369TEST(ISA, sha1) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700370 ASSERT_FALSE(cpuinfo_has_arm_sha1());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700371}
372
373TEST(ISA, sha2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700374 ASSERT_TRUE(cpuinfo_has_arm_sha2());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700375}
376
377TEST(ISA, pmull) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700378 ASSERT_FALSE(cpuinfo_has_arm_pmull());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700379}
380
381TEST(ISA, crc32) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700382 ASSERT_FALSE(cpuinfo_has_arm_crc32());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700383}
384
385TEST(L1I, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700386 ASSERT_EQ(4, cpuinfo_get_l1i_caches_count());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700387}
388
389TEST(L1I, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -0700390 ASSERT_TRUE(cpuinfo_get_l1i_caches());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700391}
392
393TEST(L1I, size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700394 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
395 ASSERT_EQ(16 * 1024, cpuinfo_get_l1i_cache(i)->size);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700396 }
397}
398
399TEST(L1I, associativity) {
Marat Dukhan30401972017-09-26 18:35:52 -0700400 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
401 ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700402 }
403}
404
405TEST(L1I, sets) {
Marat Dukhan30401972017-09-26 18:35:52 -0700406 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
407 ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size,
408 cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700409 }
410}
411
412TEST(L1I, partitions) {
Marat Dukhan30401972017-09-26 18:35:52 -0700413 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
414 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700415 }
416}
417
418TEST(L1I, line_size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700419 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
420 ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700421 }
422}
423
424TEST(L1I, flags) {
Marat Dukhan30401972017-09-26 18:35:52 -0700425 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
426 ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700427 }
428}
429
430TEST(L1I, processors) {
Marat Dukhan30401972017-09-26 18:35:52 -0700431 for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) {
432 ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start);
433 ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700434 }
435}
436
437TEST(L1D, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700438 ASSERT_EQ(4, cpuinfo_get_l1d_caches_count());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700439}
440
441TEST(L1D, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -0700442 ASSERT_TRUE(cpuinfo_get_l1d_caches());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700443}
444
445TEST(L1D, size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700446 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
447 ASSERT_EQ(16 * 1024, cpuinfo_get_l1d_cache(i)->size);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700448 }
449}
450
451TEST(L1D, associativity) {
Marat Dukhan30401972017-09-26 18:35:52 -0700452 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
453 ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700454 }
455}
456
457TEST(L1D, sets) {
Marat Dukhan30401972017-09-26 18:35:52 -0700458 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
459 ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size,
460 cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700461 }
462}
463
464TEST(L1D, partitions) {
Marat Dukhan30401972017-09-26 18:35:52 -0700465 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
466 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700467 }
468}
469
470TEST(L1D, line_size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700471 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
472 ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700473 }
474}
475
476TEST(L1D, flags) {
Marat Dukhan30401972017-09-26 18:35:52 -0700477 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
478 ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700479 }
480}
481
482TEST(L1D, processors) {
Marat Dukhan30401972017-09-26 18:35:52 -0700483 for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) {
484 ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start);
485 ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700486 }
487}
488
489TEST(L2, count) {
Marat Dukhan30401972017-09-26 18:35:52 -0700490 ASSERT_EQ(1, cpuinfo_get_l2_caches_count());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700491}
492
493TEST(L2, non_null) {
Marat Dukhan30401972017-09-26 18:35:52 -0700494 ASSERT_TRUE(cpuinfo_get_l2_caches());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700495}
496
497TEST(L2, size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700498 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
499 ASSERT_EQ(256 * 1024, cpuinfo_get_l2_cache(i)->size);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700500 }
501}
502
503TEST(L2, associativity) {
Marat Dukhan30401972017-09-26 18:35:52 -0700504 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
505 ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700506 }
507}
508
509TEST(L2, sets) {
Marat Dukhan30401972017-09-26 18:35:52 -0700510 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
511 ASSERT_EQ(cpuinfo_get_l2_cache(i)->size,
512 cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700513 }
514}
515
516TEST(L2, partitions) {
Marat Dukhan30401972017-09-26 18:35:52 -0700517 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
518 ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700519 }
520}
521
522TEST(L2, line_size) {
Marat Dukhan30401972017-09-26 18:35:52 -0700523 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
524 ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700525 }
526}
527
528TEST(L2, flags) {
Marat Dukhan30401972017-09-26 18:35:52 -0700529 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
530 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700531 }
532}
533
534TEST(L2, processors) {
Marat Dukhan30401972017-09-26 18:35:52 -0700535 for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) {
536 ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start);
537 ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count);
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700538 }
539}
540
541TEST(L3, none) {
Marat Dukhan30401972017-09-26 18:35:52 -0700542 ASSERT_EQ(0, cpuinfo_get_l3_caches_count());
543 ASSERT_FALSE(cpuinfo_get_l3_caches());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700544}
545
546TEST(L4, none) {
Marat Dukhan30401972017-09-26 18:35:52 -0700547 ASSERT_EQ(0, cpuinfo_get_l4_caches_count());
548 ASSERT_FALSE(cpuinfo_get_l4_caches());
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700549}
550
551#include <blu-r1-hd.h>
552
553int main(int argc, char* argv[]) {
Marat Dukhan63a7a6b2017-11-29 15:11:56 -0800554#if CPUINFO_ARCH_ARM
555 cpuinfo_set_hwcap(UINT32_C(0x003FB0D6));
556 cpuinfo_set_hwcap2(UINT32_C(0x00000008));
557#endif
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700558 cpuinfo_mock_filesystem(filesystem);
Marat Dukhan3c1df682017-09-22 17:09:49 -0700559#ifdef __ANDROID__
560 cpuinfo_mock_android_properties(properties);
Marat Dukhanfd0f3ef2017-12-18 17:45:18 -0800561 cpuinfo_mock_gl_renderer("Mali-T720");
Marat Dukhan3c1df682017-09-22 17:09:49 -0700562#endif
Marat Dukhan1aeee8e2017-08-10 17:33:45 -0700563 cpuinfo_initialize();
564 ::testing::InitGoogleTest(&argc, argv);
565 return RUN_ALL_TESTS();
Marat Dukhanfd0f3ef2017-12-18 17:45:18 -0800566}