Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 1 | #include <gtest/gtest.h> |
| 2 | |
| 3 | #include <cpuinfo.h> |
| 4 | #include <cpuinfo-mock.h> |
| 5 | |
| 6 | |
| 7 | TEST(PROCESSORS, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 8 | ASSERT_EQ(8, cpuinfo_get_processors_count()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 9 | } |
| 10 | |
| 11 | TEST(PROCESSORS, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 12 | ASSERT_TRUE(cpuinfo_get_processors()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 13 | } |
| 14 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 15 | TEST(PROCESSORS, smt_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 16 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 17 | ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 18 | } |
| 19 | } |
| 20 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 21 | TEST(PROCESSORS, core) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 22 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 23 | ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 24 | } |
| 25 | } |
| 26 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame] | 27 | TEST(PROCESSORS, cluster) { |
| 28 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 29 | switch (i) { |
| 30 | case 0: |
| 31 | case 1: |
| 32 | case 2: |
| 33 | case 3: |
| 34 | ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster); |
| 35 | break; |
| 36 | case 4: |
| 37 | case 5: |
| 38 | case 6: |
| 39 | case 7: |
| 40 | ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_processor(i)->cluster); |
| 41 | break; |
| 42 | } |
| 43 | } |
| 44 | } |
| 45 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 46 | TEST(PROCESSORS, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 47 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 48 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 49 | } |
| 50 | } |
| 51 | |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 52 | TEST(PROCESSORS, linux_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 53 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 54 | switch (i) { |
| 55 | case 0: |
| 56 | case 1: |
| 57 | case 2: |
| 58 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 59 | ASSERT_EQ(i + 4, cpuinfo_get_processor(i)->linux_id); |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 60 | break; |
| 61 | case 4: |
| 62 | case 5: |
| 63 | case 6: |
| 64 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 65 | ASSERT_EQ(i - 4, cpuinfo_get_processor(i)->linux_id); |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 66 | break; |
| 67 | } |
| 68 | } |
| 69 | } |
| 70 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 71 | TEST(PROCESSORS, l1i) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 72 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 73 | ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 74 | } |
| 75 | } |
| 76 | |
| 77 | TEST(PROCESSORS, l1d) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 78 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 79 | ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 80 | } |
| 81 | } |
| 82 | |
| 83 | TEST(PROCESSORS, l2) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 84 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 85 | switch (i) { |
| 86 | case 0: |
| 87 | case 1: |
| 88 | case 2: |
| 89 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 90 | ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 91 | break; |
| 92 | case 4: |
| 93 | case 5: |
| 94 | case 6: |
| 95 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 96 | ASSERT_EQ(cpuinfo_get_l2_cache(1), cpuinfo_get_processor(i)->cache.l2); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 97 | break; |
| 98 | } |
| 99 | } |
| 100 | } |
| 101 | |
| 102 | TEST(PROCESSORS, l3) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 103 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 104 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 105 | } |
| 106 | } |
| 107 | |
| 108 | TEST(PROCESSORS, l4) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 109 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 110 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 111 | } |
| 112 | } |
| 113 | |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 114 | TEST(CORES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 115 | ASSERT_EQ(8, cpuinfo_get_cores_count()); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 116 | } |
| 117 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 118 | TEST(CORES, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 119 | ASSERT_TRUE(cpuinfo_get_cores()); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 120 | } |
| 121 | |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 122 | TEST(CORES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 123 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 124 | ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 125 | } |
| 126 | } |
| 127 | |
| 128 | TEST(CORES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 129 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 130 | ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 131 | } |
| 132 | } |
| 133 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 134 | TEST(CORES, core_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 135 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 136 | ASSERT_EQ(i, cpuinfo_get_core(i)->core_id); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 137 | } |
| 138 | } |
| 139 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame] | 140 | TEST(CORES, cluster) { |
| 141 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 142 | switch (i) { |
| 143 | case 0: |
| 144 | case 1: |
| 145 | case 2: |
| 146 | case 3: |
| 147 | ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster); |
| 148 | break; |
| 149 | case 4: |
| 150 | case 5: |
| 151 | case 6: |
| 152 | case 7: |
| 153 | ASSERT_EQ(cpuinfo_get_cluster(1), cpuinfo_get_core(i)->cluster); |
| 154 | break; |
| 155 | } |
| 156 | } |
| 157 | } |
| 158 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 159 | TEST(CORES, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 160 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 161 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 162 | } |
| 163 | } |
| 164 | |
| 165 | TEST(CORES, vendor) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 166 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 167 | ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 168 | } |
| 169 | } |
| 170 | |
| 171 | TEST(CORES, uarch) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 172 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 173 | switch (i) { |
| 174 | case 0: |
| 175 | case 1: |
| 176 | case 2: |
| 177 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 178 | ASSERT_EQ(cpuinfo_uarch_cortex_a72, cpuinfo_get_core(i)->uarch); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 179 | break; |
| 180 | case 4: |
| 181 | case 5: |
| 182 | case 6: |
| 183 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 184 | ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_core(i)->uarch); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 185 | break; |
| 186 | } |
| 187 | } |
| 188 | } |
| 189 | |
| 190 | TEST(CORES, midr) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 191 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 192 | switch (i) { |
| 193 | case 0: |
| 194 | case 1: |
| 195 | case 2: |
| 196 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 197 | ASSERT_EQ(UINT32_C(0x410FD080), cpuinfo_get_core(i)->midr); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 198 | break; |
| 199 | case 4: |
| 200 | case 5: |
| 201 | case 6: |
| 202 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 203 | ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_core(i)->midr); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 204 | break; |
| 205 | } |
| 206 | } |
| 207 | } |
| 208 | |
Marat Dukhan | 575a630 | 2018-03-10 14:38:49 -0800 | [diff] [blame] | 209 | TEST(CORES, DISABLED_frequency) { |
| 210 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 211 | switch (i) { |
| 212 | case 0: |
| 213 | case 1: |
| 214 | case 2: |
| 215 | case 3: |
| 216 | ASSERT_EQ(UINT64_C(2304000000), cpuinfo_get_core(i)->frequency); |
| 217 | break; |
| 218 | case 4: |
| 219 | case 5: |
| 220 | case 6: |
| 221 | case 7: |
| 222 | ASSERT_EQ(UINT64_C(1805000000), cpuinfo_get_core(i)->frequency); |
| 223 | break; |
| 224 | } |
| 225 | } |
| 226 | } |
| 227 | |
Marat Dukhan | dbc7840 | 2018-03-18 22:49:35 -0700 | [diff] [blame^] | 228 | TEST(CLUSTERS, count) { |
| 229 | ASSERT_EQ(2, cpuinfo_get_clusters_count()); |
| 230 | } |
| 231 | |
| 232 | TEST(CLUSTERS, non_null) { |
| 233 | ASSERT_TRUE(cpuinfo_get_clusters()); |
| 234 | } |
| 235 | |
| 236 | TEST(CLUSTERS, processor_start) { |
| 237 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 238 | switch (i) { |
| 239 | case 0: |
| 240 | ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start); |
| 241 | break; |
| 242 | case 1: |
| 243 | ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_start); |
| 244 | break; |
| 245 | } |
| 246 | } |
| 247 | } |
| 248 | |
| 249 | TEST(CLUSTERS, processor_count) { |
| 250 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 251 | ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count); |
| 252 | } |
| 253 | } |
| 254 | |
| 255 | TEST(CLUSTERS, core_start) { |
| 256 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 257 | switch (i) { |
| 258 | case 0: |
| 259 | ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start); |
| 260 | break; |
| 261 | case 1: |
| 262 | ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_start); |
| 263 | break; |
| 264 | } |
| 265 | } |
| 266 | } |
| 267 | |
| 268 | TEST(CLUSTERS, core_count) { |
| 269 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 270 | ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count); |
| 271 | } |
| 272 | } |
| 273 | |
| 274 | TEST(CLUSTERS, cluster_id) { |
| 275 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 276 | ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id); |
| 277 | } |
| 278 | } |
| 279 | |
| 280 | TEST(CLUSTERS, package) { |
| 281 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 282 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package); |
| 283 | } |
| 284 | } |
| 285 | |
| 286 | TEST(CLUSTERS, vendor) { |
| 287 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 288 | ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor); |
| 289 | } |
| 290 | } |
| 291 | |
| 292 | TEST(CLUSTERS, uarch) { |
| 293 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 294 | switch (i) { |
| 295 | case 0: |
| 296 | ASSERT_EQ(cpuinfo_uarch_cortex_a72, cpuinfo_get_cluster(i)->uarch); |
| 297 | break; |
| 298 | case 1: |
| 299 | ASSERT_EQ(cpuinfo_uarch_cortex_a53, cpuinfo_get_cluster(i)->uarch); |
| 300 | break; |
| 301 | } |
| 302 | } |
| 303 | } |
| 304 | |
| 305 | TEST(CLUSTERS, midr) { |
| 306 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 307 | switch (i) { |
| 308 | case 0: |
| 309 | ASSERT_EQ(UINT32_C(0x410FD080), cpuinfo_get_cluster(i)->midr); |
| 310 | break; |
| 311 | case 1: |
| 312 | ASSERT_EQ(UINT32_C(0x410FD034), cpuinfo_get_cluster(i)->midr); |
| 313 | break; |
| 314 | } |
| 315 | } |
| 316 | } |
| 317 | |
| 318 | TEST(CLUSTERS, DISABLED_frequency) { |
| 319 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 320 | switch (i) { |
| 321 | case 0: |
| 322 | ASSERT_EQ(UINT64_C(2304000000), cpuinfo_get_cluster(i)->frequency); |
| 323 | break; |
| 324 | case 1: |
| 325 | ASSERT_EQ(UINT64_C(1805000000), cpuinfo_get_cluster(i)->frequency); |
| 326 | break; |
| 327 | } |
| 328 | } |
| 329 | } |
| 330 | |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 331 | TEST(PACKAGES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 332 | ASSERT_EQ(1, cpuinfo_get_packages_count()); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 333 | } |
| 334 | |
| 335 | TEST(PACKAGES, name) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 336 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 337 | ASSERT_EQ("HiSilicon Kirin 950", |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 338 | std::string(cpuinfo_get_package(i)->name, |
| 339 | strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX))); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 340 | } |
| 341 | } |
| 342 | |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 343 | TEST(PACKAGES, gpu_name) { |
| 344 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 345 | ASSERT_EQ("ARM Mali-T880", |
| 346 | std::string(cpuinfo_get_package(i)->gpu_name, |
| 347 | strnlen(cpuinfo_get_package(i)->gpu_name, CPUINFO_GPU_NAME_MAX))); |
| 348 | } |
| 349 | } |
| 350 | |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 351 | TEST(PACKAGES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 352 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 353 | ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 354 | } |
| 355 | } |
| 356 | |
| 357 | TEST(PACKAGES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 358 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 359 | ASSERT_EQ(8, cpuinfo_get_package(i)->processor_count); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 360 | } |
| 361 | } |
| 362 | |
| 363 | TEST(PACKAGES, core_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 364 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 365 | ASSERT_EQ(0, cpuinfo_get_package(i)->core_start); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 366 | } |
| 367 | } |
| 368 | |
| 369 | TEST(PACKAGES, core_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 370 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 371 | ASSERT_EQ(8, cpuinfo_get_package(i)->core_count); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 372 | } |
| 373 | } |
| 374 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame] | 375 | TEST(PACKAGES, cluster_start) { |
| 376 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 377 | ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start); |
| 378 | } |
| 379 | } |
| 380 | |
| 381 | TEST(PACKAGES, cluster_count) { |
| 382 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 383 | ASSERT_EQ(2, cpuinfo_get_package(i)->cluster_count); |
| 384 | } |
| 385 | } |
| 386 | |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 387 | TEST(ISA, thumb) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 388 | #if CPUINFO_ARCH_ARM |
| 389 | ASSERT_TRUE(cpuinfo_has_arm_thumb()); |
| 390 | #elif CPUINFO_ARCH_ARM64 |
| 391 | ASSERT_FALSE(cpuinfo_has_arm_thumb()); |
| 392 | #endif |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 393 | } |
| 394 | |
| 395 | TEST(ISA, thumb2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 396 | #if CPUINFO_ARCH_ARM |
| 397 | ASSERT_TRUE(cpuinfo_has_arm_thumb2()); |
| 398 | #elif CPUINFO_ARCH_ARM64 |
| 399 | ASSERT_FALSE(cpuinfo_has_arm_thumb2()); |
| 400 | #endif |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 401 | } |
| 402 | |
| 403 | TEST(ISA, armv5e) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 404 | #if CPUINFO_ARCH_ARM |
| 405 | ASSERT_TRUE(cpuinfo_has_arm_v5e()); |
| 406 | #elif CPUINFO_ARCH_ARM64 |
| 407 | ASSERT_FALSE(cpuinfo_has_arm_v5e()); |
| 408 | #endif |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 409 | } |
| 410 | |
| 411 | TEST(ISA, armv6) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 412 | #if CPUINFO_ARCH_ARM |
| 413 | ASSERT_TRUE(cpuinfo_has_arm_v6()); |
| 414 | #elif CPUINFO_ARCH_ARM64 |
| 415 | ASSERT_FALSE(cpuinfo_has_arm_v6()); |
| 416 | #endif |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 417 | } |
| 418 | |
| 419 | TEST(ISA, armv6k) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 420 | #if CPUINFO_ARCH_ARM |
| 421 | ASSERT_TRUE(cpuinfo_has_arm_v6k()); |
| 422 | #elif CPUINFO_ARCH_ARM64 |
| 423 | ASSERT_FALSE(cpuinfo_has_arm_v6k()); |
| 424 | #endif |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 425 | } |
| 426 | |
| 427 | TEST(ISA, armv7) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 428 | #if CPUINFO_ARCH_ARM |
| 429 | ASSERT_TRUE(cpuinfo_has_arm_v7()); |
| 430 | #elif CPUINFO_ARCH_ARM64 |
| 431 | ASSERT_FALSE(cpuinfo_has_arm_v7()); |
| 432 | #endif |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 433 | } |
| 434 | |
| 435 | TEST(ISA, armv7mp) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 436 | #if CPUINFO_ARCH_ARM |
| 437 | ASSERT_TRUE(cpuinfo_has_arm_v7mp()); |
| 438 | #elif CPUINFO_ARCH_ARM64 |
| 439 | ASSERT_FALSE(cpuinfo_has_arm_v7mp()); |
| 440 | #endif |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 441 | } |
| 442 | |
| 443 | TEST(ISA, idiv) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 444 | ASSERT_TRUE(cpuinfo_has_arm_idiv()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 445 | } |
| 446 | |
| 447 | TEST(ISA, vfpv2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 448 | ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 449 | } |
| 450 | |
| 451 | TEST(ISA, vfpv3) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 452 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 453 | } |
| 454 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 455 | TEST(ISA, vfpv3_d32) { |
| 456 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 457 | } |
| 458 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 459 | TEST(ISA, vfpv3_fp16) { |
| 460 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 461 | } |
| 462 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 463 | TEST(ISA, vfpv3_fp16_d32) { |
| 464 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); |
| 465 | } |
| 466 | |
| 467 | TEST(ISA, vfpv4) { |
| 468 | ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); |
| 469 | } |
| 470 | |
| 471 | TEST(ISA, vfpv4_d32) { |
| 472 | ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 473 | } |
| 474 | |
| 475 | TEST(ISA, wmmx) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 476 | ASSERT_FALSE(cpuinfo_has_arm_wmmx()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 477 | } |
| 478 | |
| 479 | TEST(ISA, wmmx2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 480 | ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 481 | } |
| 482 | |
| 483 | TEST(ISA, neon) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 484 | ASSERT_TRUE(cpuinfo_has_arm_neon()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 485 | } |
| 486 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 487 | TEST(ISA, neon_fp16) { |
| 488 | ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 489 | } |
| 490 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 491 | TEST(ISA, neon_fma) { |
| 492 | ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 493 | } |
| 494 | |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 495 | TEST(ISA, atomics) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 496 | ASSERT_FALSE(cpuinfo_has_arm_atomics()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 497 | } |
| 498 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 499 | TEST(ISA, neon_rdm) { |
| 500 | ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 501 | } |
| 502 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 503 | TEST(ISA, fp16_arith) { |
| 504 | ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 505 | } |
| 506 | |
| 507 | TEST(ISA, jscvt) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 508 | ASSERT_FALSE(cpuinfo_has_arm_jscvt()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 509 | } |
| 510 | |
| 511 | TEST(ISA, fcma) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 512 | ASSERT_FALSE(cpuinfo_has_arm_fcma()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 513 | } |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 514 | |
| 515 | TEST(ISA, aes) { |
| 516 | ASSERT_TRUE(cpuinfo_has_arm_aes()); |
| 517 | } |
| 518 | |
| 519 | TEST(ISA, sha1) { |
| 520 | ASSERT_TRUE(cpuinfo_has_arm_sha1()); |
| 521 | } |
| 522 | |
| 523 | TEST(ISA, sha2) { |
| 524 | ASSERT_TRUE(cpuinfo_has_arm_sha2()); |
| 525 | } |
| 526 | |
| 527 | TEST(ISA, pmull) { |
| 528 | ASSERT_TRUE(cpuinfo_has_arm_pmull()); |
| 529 | } |
| 530 | |
| 531 | TEST(ISA, crc32) { |
| 532 | ASSERT_TRUE(cpuinfo_has_arm_crc32()); |
| 533 | } |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 534 | |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 535 | TEST(L1I, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 536 | ASSERT_EQ(8, cpuinfo_get_l1i_caches_count()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 537 | } |
| 538 | |
| 539 | TEST(L1I, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 540 | ASSERT_TRUE(cpuinfo_get_l1i_caches()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 541 | } |
| 542 | |
| 543 | TEST(L1I, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 544 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 545 | switch (i) { |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 546 | case 0: |
| 547 | case 1: |
| 548 | case 2: |
| 549 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 550 | ASSERT_EQ(48 * 1024, cpuinfo_get_l1i_cache(i)->size); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 551 | break; |
| 552 | case 4: |
| 553 | case 5: |
| 554 | case 6: |
| 555 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 556 | ASSERT_EQ(32 * 1024, cpuinfo_get_l1i_cache(i)->size); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 557 | break; |
| 558 | } |
| 559 | } |
| 560 | } |
| 561 | |
| 562 | TEST(L1I, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 563 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 564 | switch (i) { |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 565 | case 0: |
| 566 | case 1: |
| 567 | case 2: |
| 568 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 569 | ASSERT_EQ(3, cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 570 | break; |
| 571 | case 4: |
| 572 | case 5: |
| 573 | case 6: |
| 574 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 575 | ASSERT_EQ(2, cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 576 | break; |
| 577 | } |
| 578 | } |
| 579 | } |
| 580 | |
| 581 | TEST(L1I, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 582 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 583 | ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size, |
| 584 | cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 585 | } |
| 586 | } |
| 587 | |
| 588 | TEST(L1I, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 589 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 590 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 591 | } |
| 592 | } |
| 593 | |
| 594 | TEST(L1I, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 595 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 596 | ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 597 | } |
| 598 | } |
| 599 | |
| 600 | TEST(L1I, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 601 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 602 | ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 603 | } |
| 604 | } |
| 605 | |
| 606 | TEST(L1I, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 607 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 608 | ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start); |
| 609 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 610 | } |
| 611 | } |
| 612 | |
| 613 | TEST(L1D, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 614 | ASSERT_EQ(8, cpuinfo_get_l1d_caches_count()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 615 | } |
| 616 | |
| 617 | TEST(L1D, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 618 | ASSERT_TRUE(cpuinfo_get_l1d_caches()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 619 | } |
| 620 | |
| 621 | TEST(L1D, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 622 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 623 | ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 624 | } |
| 625 | } |
| 626 | |
| 627 | TEST(L1D, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 628 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 629 | switch (i) { |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 630 | case 0: |
| 631 | case 1: |
| 632 | case 2: |
| 633 | case 3: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 634 | ASSERT_EQ(2, cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 635 | break; |
| 636 | case 4: |
| 637 | case 5: |
| 638 | case 6: |
| 639 | case 7: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 640 | ASSERT_EQ(4, cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 641 | break; |
| 642 | } |
| 643 | } |
| 644 | } |
| 645 | |
| 646 | TEST(L1D, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 647 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 648 | ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size, |
| 649 | cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 650 | } |
| 651 | } |
| 652 | |
| 653 | TEST(L1D, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 654 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 655 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 656 | } |
| 657 | } |
| 658 | |
| 659 | TEST(L1D, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 660 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 661 | ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 662 | } |
| 663 | } |
| 664 | |
| 665 | TEST(L1D, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 666 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 667 | ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 668 | } |
| 669 | } |
| 670 | |
| 671 | TEST(L1D, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 672 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 673 | ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start); |
| 674 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 675 | } |
| 676 | } |
| 677 | |
| 678 | TEST(L2, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 679 | ASSERT_EQ(2, cpuinfo_get_l2_caches_count()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 680 | } |
| 681 | |
| 682 | TEST(L2, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 683 | ASSERT_TRUE(cpuinfo_get_l2_caches()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 684 | } |
| 685 | |
| 686 | TEST(L2, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 687 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 688 | switch (i) { |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 689 | case 0: |
Marat Dukhan | 89d1e6c | 2017-11-20 14:43:44 +0300 | [diff] [blame] | 690 | ASSERT_EQ(2 * 1024 * 1024, cpuinfo_get_l2_cache(i)->size); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 691 | break; |
| 692 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 693 | ASSERT_EQ(512 * 1024, cpuinfo_get_l2_cache(i)->size); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 694 | break; |
| 695 | } |
| 696 | } |
| 697 | } |
| 698 | |
| 699 | TEST(L2, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 700 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 701 | ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 702 | } |
| 703 | } |
| 704 | |
| 705 | TEST(L2, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 706 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 707 | ASSERT_EQ(cpuinfo_get_l2_cache(i)->size, |
| 708 | cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 709 | } |
| 710 | } |
| 711 | |
| 712 | TEST(L2, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 713 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 714 | ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 715 | } |
| 716 | } |
| 717 | |
| 718 | TEST(L2, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 719 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 720 | ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 721 | } |
| 722 | } |
| 723 | |
| 724 | TEST(L2, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 725 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 726 | switch (i) { |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 727 | case 0: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 728 | ASSERT_EQ(CPUINFO_CACHE_INCLUSIVE, cpuinfo_get_l2_cache(i)->flags); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 729 | break; |
| 730 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 731 | ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->flags); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 732 | break; |
| 733 | } |
| 734 | } |
| 735 | } |
| 736 | |
| 737 | TEST(L2, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 738 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 739 | switch (i) { |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 740 | case 0: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 741 | ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start); |
| 742 | ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 743 | break; |
| 744 | case 1: |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 745 | ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_start); |
| 746 | ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 747 | break; |
| 748 | } |
| 749 | } |
| 750 | } |
| 751 | |
| 752 | TEST(L3, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 753 | ASSERT_EQ(0, cpuinfo_get_l3_caches_count()); |
| 754 | ASSERT_FALSE(cpuinfo_get_l3_caches()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 755 | } |
| 756 | |
| 757 | TEST(L4, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 758 | ASSERT_EQ(0, cpuinfo_get_l4_caches_count()); |
| 759 | ASSERT_FALSE(cpuinfo_get_l4_caches()); |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 760 | } |
| 761 | |
| 762 | #include <huawei-mate-8.h> |
| 763 | |
| 764 | int main(int argc, char* argv[]) { |
Marat Dukhan | 63a7a6b | 2017-11-29 15:11:56 -0800 | [diff] [blame] | 765 | #if CPUINFO_ARCH_ARM |
| 766 | cpuinfo_set_hwcap(UINT32_C(0x0037B0D6)); |
| 767 | cpuinfo_set_hwcap2(UINT32_C(0x0000001F)); |
| 768 | #elif CPUINFO_ARCH_ARM64 |
| 769 | cpuinfo_set_hwcap(UINT32_C(0x000000FF)); |
| 770 | #endif |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 771 | cpuinfo_mock_filesystem(filesystem); |
Marat Dukhan | d156525 | 2017-09-12 00:29:01 -0700 | [diff] [blame] | 772 | #ifdef __ANDROID__ |
| 773 | cpuinfo_mock_android_properties(properties); |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 774 | cpuinfo_mock_gl_renderer("Mali-T880"); |
Marat Dukhan | d156525 | 2017-09-12 00:29:01 -0700 | [diff] [blame] | 775 | #endif |
Marat Dukhan | f368e1a | 2017-09-08 20:13:59 -0700 | [diff] [blame] | 776 | cpuinfo_initialize(); |
| 777 | ::testing::InitGoogleTest(&argc, argv); |
| 778 | return RUN_ALL_TESTS(); |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 779 | } |