Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 1 | #include <gtest/gtest.h> |
| 2 | |
| 3 | #include <cpuinfo.h> |
| 4 | #include <cpuinfo-mock.h> |
| 5 | |
| 6 | |
| 7 | TEST(PROCESSORS, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 8 | ASSERT_EQ(4, cpuinfo_get_processors_count()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 9 | } |
| 10 | |
| 11 | TEST(PROCESSORS, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 12 | ASSERT_TRUE(cpuinfo_get_processors()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 13 | } |
| 14 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 15 | TEST(PROCESSORS, smt_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 16 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 17 | ASSERT_EQ(0, cpuinfo_get_processor(i)->smt_id); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 18 | } |
| 19 | } |
| 20 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 21 | TEST(PROCESSORS, core) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 22 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 23 | ASSERT_EQ(cpuinfo_get_core(i), cpuinfo_get_processor(i)->core); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 24 | } |
| 25 | } |
| 26 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame] | 27 | TEST(PROCESSORS, cluster) { |
| 28 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 29 | ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_processor(i)->cluster); |
| 30 | } |
| 31 | } |
| 32 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 33 | TEST(PROCESSORS, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 34 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 35 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_processor(i)->package); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 36 | } |
| 37 | } |
| 38 | |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 39 | TEST(PROCESSORS, linux_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 40 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 41 | ASSERT_EQ(i, cpuinfo_get_processor(i)->linux_id); |
Marat Dukhan | 846c178 | 2017-09-13 09:47:26 -0700 | [diff] [blame] | 42 | } |
| 43 | } |
| 44 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 45 | TEST(PROCESSORS, l1i) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 46 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 47 | ASSERT_EQ(cpuinfo_get_l1i_cache(i), cpuinfo_get_processor(i)->cache.l1i); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 48 | } |
| 49 | } |
| 50 | |
| 51 | TEST(PROCESSORS, l1d) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 52 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 53 | ASSERT_EQ(cpuinfo_get_l1d_cache(i), cpuinfo_get_processor(i)->cache.l1d); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 54 | } |
| 55 | } |
| 56 | |
| 57 | TEST(PROCESSORS, l2) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 58 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 59 | ASSERT_EQ(cpuinfo_get_l2_cache(0), cpuinfo_get_processor(i)->cache.l2); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 60 | } |
| 61 | } |
| 62 | |
| 63 | TEST(PROCESSORS, l3) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 64 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 65 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l3); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 66 | } |
| 67 | } |
| 68 | |
| 69 | TEST(PROCESSORS, l4) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 70 | for (uint32_t i = 0; i < cpuinfo_get_processors_count(); i++) { |
| 71 | ASSERT_FALSE(cpuinfo_get_processor(i)->cache.l4); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 72 | } |
| 73 | } |
| 74 | |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 75 | TEST(CORES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 76 | ASSERT_EQ(4, cpuinfo_get_cores_count()); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 77 | } |
| 78 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 79 | TEST(CORES, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 80 | ASSERT_TRUE(cpuinfo_get_cores()); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 81 | } |
| 82 | |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 83 | TEST(CORES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 84 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 85 | ASSERT_EQ(i, cpuinfo_get_core(i)->processor_start); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 86 | } |
| 87 | } |
| 88 | |
| 89 | TEST(CORES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 90 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 91 | ASSERT_EQ(1, cpuinfo_get_core(i)->processor_count); |
Marat Dukhan | 7073e83 | 2017-09-24 22:23:55 -0700 | [diff] [blame] | 92 | } |
| 93 | } |
| 94 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 95 | TEST(CORES, core_id) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 96 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 97 | ASSERT_EQ(i, cpuinfo_get_core(i)->core_id); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 98 | } |
| 99 | } |
| 100 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame] | 101 | TEST(CORES, cluster) { |
| 102 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 103 | ASSERT_EQ(cpuinfo_get_cluster(0), cpuinfo_get_core(i)->cluster); |
| 104 | } |
| 105 | } |
| 106 | |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 107 | TEST(CORES, package) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 108 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 109 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_core(i)->package); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 110 | } |
| 111 | } |
| 112 | |
| 113 | TEST(CORES, vendor) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 114 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 115 | ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_core(i)->vendor); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 116 | } |
| 117 | } |
| 118 | |
| 119 | TEST(CORES, uarch) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 120 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 121 | ASSERT_EQ(cpuinfo_uarch_cortex_a57, cpuinfo_get_core(i)->uarch); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 122 | } |
| 123 | } |
| 124 | |
| 125 | TEST(CORES, midr) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 126 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 127 | ASSERT_EQ(UINT32_C(0x411FD071), cpuinfo_get_core(i)->midr); |
Marat Dukhan | 2d37dc4 | 2017-09-25 01:32:37 -0700 | [diff] [blame] | 128 | } |
| 129 | } |
| 130 | |
Marat Dukhan | 575a630 | 2018-03-10 14:38:49 -0800 | [diff] [blame] | 131 | TEST(CORES, DISABLED_frequency) { |
| 132 | for (uint32_t i = 0; i < cpuinfo_get_cores_count(); i++) { |
| 133 | ASSERT_EQ(UINT64_C(1912500000), cpuinfo_get_core(i)->frequency); |
| 134 | } |
| 135 | } |
| 136 | |
Marat Dukhan | dbc7840 | 2018-03-18 22:49:35 -0700 | [diff] [blame^] | 137 | TEST(CLUSTERS, count) { |
| 138 | ASSERT_EQ(1, cpuinfo_get_clusters_count()); |
| 139 | } |
| 140 | |
| 141 | TEST(CLUSTERS, non_null) { |
| 142 | ASSERT_TRUE(cpuinfo_get_clusters()); |
| 143 | } |
| 144 | |
| 145 | TEST(CLUSTERS, processor_start) { |
| 146 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 147 | ASSERT_EQ(0, cpuinfo_get_cluster(i)->processor_start); |
| 148 | } |
| 149 | } |
| 150 | |
| 151 | TEST(CLUSTERS, processor_count) { |
| 152 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 153 | ASSERT_EQ(4, cpuinfo_get_cluster(i)->processor_count); |
| 154 | } |
| 155 | } |
| 156 | |
| 157 | TEST(CLUSTERS, core_start) { |
| 158 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 159 | ASSERT_EQ(0, cpuinfo_get_cluster(i)->core_start); |
| 160 | } |
| 161 | } |
| 162 | |
| 163 | TEST(CLUSTERS, core_count) { |
| 164 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 165 | ASSERT_EQ(4, cpuinfo_get_cluster(i)->core_count); |
| 166 | } |
| 167 | } |
| 168 | |
| 169 | TEST(CLUSTERS, cluster_id) { |
| 170 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 171 | ASSERT_EQ(i, cpuinfo_get_cluster(i)->cluster_id); |
| 172 | } |
| 173 | } |
| 174 | |
| 175 | TEST(CLUSTERS, package) { |
| 176 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 177 | ASSERT_EQ(cpuinfo_get_package(0), cpuinfo_get_cluster(i)->package); |
| 178 | } |
| 179 | } |
| 180 | |
| 181 | TEST(CLUSTERS, vendor) { |
| 182 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 183 | ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_get_cluster(i)->vendor); |
| 184 | } |
| 185 | } |
| 186 | |
| 187 | TEST(CLUSTERS, uarch) { |
| 188 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 189 | ASSERT_EQ(cpuinfo_uarch_cortex_a57, cpuinfo_get_cluster(i)->uarch); |
| 190 | } |
| 191 | } |
| 192 | |
| 193 | TEST(CLUSTERS, midr) { |
| 194 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 195 | ASSERT_EQ(UINT32_C(0x411FD071), cpuinfo_get_cluster(i)->midr); |
| 196 | } |
| 197 | } |
| 198 | |
| 199 | TEST(CLUSTERS, DISABLED_frequency) { |
| 200 | for (uint32_t i = 0; i < cpuinfo_get_clusters_count(); i++) { |
| 201 | ASSERT_EQ(UINT64_C(1912500000), cpuinfo_get_cluster(i)->frequency); |
| 202 | } |
| 203 | } |
| 204 | |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 205 | TEST(PACKAGES, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 206 | ASSERT_EQ(1, cpuinfo_get_packages_count()); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 207 | } |
| 208 | |
| 209 | TEST(PACKAGES, name) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 210 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
Marat Dukhan | 93982f2 | 2017-10-20 13:10:23 -0700 | [diff] [blame] | 211 | ASSERT_EQ("Nvidia Tegra T210", |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 212 | std::string(cpuinfo_get_package(i)->name, |
| 213 | strnlen(cpuinfo_get_package(i)->name, CPUINFO_PACKAGE_NAME_MAX))); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 214 | } |
| 215 | } |
| 216 | |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 217 | TEST(PACKAGES, gpu_name) { |
| 218 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
Marat Dukhan | 3985cf8 | 2017-12-18 18:58:26 -0800 | [diff] [blame] | 219 | ASSERT_EQ("Nvidia Tegra X1", |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 220 | std::string(cpuinfo_get_package(i)->gpu_name, |
| 221 | strnlen(cpuinfo_get_package(i)->gpu_name, CPUINFO_GPU_NAME_MAX))); |
| 222 | } |
| 223 | } |
| 224 | |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 225 | TEST(PACKAGES, processor_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 226 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 227 | ASSERT_EQ(0, cpuinfo_get_package(i)->processor_start); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 228 | } |
| 229 | } |
| 230 | |
| 231 | TEST(PACKAGES, processor_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 232 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 233 | ASSERT_EQ(4, cpuinfo_get_package(i)->processor_count); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 234 | } |
| 235 | } |
| 236 | |
| 237 | TEST(PACKAGES, core_start) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 238 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 239 | ASSERT_EQ(0, cpuinfo_get_package(i)->core_start); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 240 | } |
| 241 | } |
| 242 | |
| 243 | TEST(PACKAGES, core_count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 244 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 245 | ASSERT_EQ(4, cpuinfo_get_package(i)->core_count); |
Marat Dukhan | fb4fbe0 | 2017-09-13 00:51:05 -0700 | [diff] [blame] | 246 | } |
| 247 | } |
| 248 | |
Marat Dukhan | 2b30793 | 2018-03-18 16:15:36 -0700 | [diff] [blame] | 249 | TEST(PACKAGES, cluster_start) { |
| 250 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 251 | ASSERT_EQ(0, cpuinfo_get_package(i)->cluster_start); |
| 252 | } |
| 253 | } |
| 254 | |
| 255 | TEST(PACKAGES, cluster_count) { |
| 256 | for (uint32_t i = 0; i < cpuinfo_get_packages_count(); i++) { |
| 257 | ASSERT_EQ(1, cpuinfo_get_package(i)->cluster_count); |
| 258 | } |
| 259 | } |
| 260 | |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 261 | TEST(ISA, thumb) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 262 | #if CPUINFO_ARCH_ARM |
| 263 | ASSERT_TRUE(cpuinfo_has_arm_thumb()); |
| 264 | #elif CPUINFO_ARCH_ARM64 |
| 265 | ASSERT_FALSE(cpuinfo_has_arm_thumb()); |
| 266 | #endif |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 267 | } |
| 268 | |
| 269 | TEST(ISA, thumb2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 270 | #if CPUINFO_ARCH_ARM |
| 271 | ASSERT_TRUE(cpuinfo_has_arm_thumb2()); |
| 272 | #elif CPUINFO_ARCH_ARM64 |
| 273 | ASSERT_FALSE(cpuinfo_has_arm_thumb2()); |
| 274 | #endif |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 275 | } |
| 276 | |
| 277 | TEST(ISA, armv5e) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 278 | #if CPUINFO_ARCH_ARM |
| 279 | ASSERT_TRUE(cpuinfo_has_arm_v5e()); |
| 280 | #elif CPUINFO_ARCH_ARM64 |
| 281 | ASSERT_FALSE(cpuinfo_has_arm_v5e()); |
| 282 | #endif |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 283 | } |
| 284 | |
| 285 | TEST(ISA, armv6) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 286 | #if CPUINFO_ARCH_ARM |
| 287 | ASSERT_TRUE(cpuinfo_has_arm_v6()); |
| 288 | #elif CPUINFO_ARCH_ARM64 |
| 289 | ASSERT_FALSE(cpuinfo_has_arm_v6()); |
| 290 | #endif |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 291 | } |
| 292 | |
| 293 | TEST(ISA, armv6k) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 294 | #if CPUINFO_ARCH_ARM |
| 295 | ASSERT_TRUE(cpuinfo_has_arm_v6k()); |
| 296 | #elif CPUINFO_ARCH_ARM64 |
| 297 | ASSERT_FALSE(cpuinfo_has_arm_v6k()); |
| 298 | #endif |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 299 | } |
| 300 | |
| 301 | TEST(ISA, armv7) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 302 | #if CPUINFO_ARCH_ARM |
| 303 | ASSERT_TRUE(cpuinfo_has_arm_v7()); |
| 304 | #elif CPUINFO_ARCH_ARM64 |
| 305 | ASSERT_FALSE(cpuinfo_has_arm_v7()); |
| 306 | #endif |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 307 | } |
| 308 | |
| 309 | TEST(ISA, armv7mp) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 310 | #if CPUINFO_ARCH_ARM |
| 311 | ASSERT_TRUE(cpuinfo_has_arm_v7mp()); |
| 312 | #elif CPUINFO_ARCH_ARM64 |
| 313 | ASSERT_FALSE(cpuinfo_has_arm_v7mp()); |
| 314 | #endif |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 315 | } |
| 316 | |
| 317 | TEST(ISA, idiv) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 318 | ASSERT_TRUE(cpuinfo_has_arm_idiv()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 319 | } |
| 320 | |
| 321 | TEST(ISA, vfpv2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 322 | ASSERT_FALSE(cpuinfo_has_arm_vfpv2()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 323 | } |
| 324 | |
| 325 | TEST(ISA, vfpv3) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 326 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 327 | } |
| 328 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 329 | TEST(ISA, vfpv3_d32) { |
| 330 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 331 | } |
| 332 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 333 | TEST(ISA, vfpv3_fp16) { |
| 334 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 335 | } |
| 336 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 337 | TEST(ISA, vfpv3_fp16_d32) { |
| 338 | ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32()); |
| 339 | } |
| 340 | |
| 341 | TEST(ISA, vfpv4) { |
| 342 | ASSERT_TRUE(cpuinfo_has_arm_vfpv4()); |
| 343 | } |
| 344 | |
| 345 | TEST(ISA, vfpv4_d32) { |
| 346 | ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 347 | } |
| 348 | |
| 349 | TEST(ISA, wmmx) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 350 | ASSERT_FALSE(cpuinfo_has_arm_wmmx()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 351 | } |
| 352 | |
| 353 | TEST(ISA, wmmx2) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 354 | ASSERT_FALSE(cpuinfo_has_arm_wmmx2()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 355 | } |
| 356 | |
| 357 | TEST(ISA, neon) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 358 | ASSERT_TRUE(cpuinfo_has_arm_neon()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 359 | } |
| 360 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 361 | TEST(ISA, neon_fp16) { |
| 362 | ASSERT_TRUE(cpuinfo_has_arm_neon_fp16()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 363 | } |
| 364 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 365 | TEST(ISA, neon_fma) { |
| 366 | ASSERT_TRUE(cpuinfo_has_arm_neon_fma()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 367 | } |
| 368 | |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 369 | TEST(ISA, atomics) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 370 | ASSERT_FALSE(cpuinfo_has_arm_atomics()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 371 | } |
| 372 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 373 | TEST(ISA, neon_rdm) { |
| 374 | ASSERT_FALSE(cpuinfo_has_arm_neon_rdm()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 375 | } |
| 376 | |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 377 | TEST(ISA, fp16_arith) { |
| 378 | ASSERT_FALSE(cpuinfo_has_arm_fp16_arith()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 379 | } |
| 380 | |
| 381 | TEST(ISA, jscvt) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 382 | ASSERT_FALSE(cpuinfo_has_arm_jscvt()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 383 | } |
| 384 | |
| 385 | TEST(ISA, fcma) { |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 386 | ASSERT_FALSE(cpuinfo_has_arm_fcma()); |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 387 | } |
Marat Dukhan | eb3025f | 2017-09-26 12:57:41 -0700 | [diff] [blame] | 388 | |
| 389 | TEST(ISA, aes) { |
| 390 | ASSERT_TRUE(cpuinfo_has_arm_aes()); |
| 391 | } |
| 392 | |
| 393 | TEST(ISA, sha1) { |
| 394 | ASSERT_TRUE(cpuinfo_has_arm_sha1()); |
| 395 | } |
| 396 | |
| 397 | TEST(ISA, sha2) { |
| 398 | ASSERT_TRUE(cpuinfo_has_arm_sha2()); |
| 399 | } |
| 400 | |
| 401 | TEST(ISA, pmull) { |
| 402 | ASSERT_TRUE(cpuinfo_has_arm_pmull()); |
| 403 | } |
| 404 | |
| 405 | TEST(ISA, crc32) { |
| 406 | ASSERT_TRUE(cpuinfo_has_arm_crc32()); |
| 407 | } |
Marat Dukhan | 3e8e1c7 | 2017-09-13 12:15:35 -0700 | [diff] [blame] | 408 | |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 409 | TEST(L1I, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 410 | ASSERT_EQ(4, cpuinfo_get_l1i_caches_count()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 411 | } |
| 412 | |
| 413 | TEST(L1I, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 414 | ASSERT_TRUE(cpuinfo_get_l1i_caches()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 415 | } |
| 416 | |
| 417 | TEST(L1I, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 418 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 419 | ASSERT_EQ(48 * 1024, cpuinfo_get_l1i_cache(i)->size); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 420 | } |
| 421 | } |
| 422 | |
| 423 | TEST(L1I, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 424 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 425 | ASSERT_EQ(3, cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 426 | } |
| 427 | } |
| 428 | |
| 429 | TEST(L1I, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 430 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 431 | ASSERT_EQ(cpuinfo_get_l1i_cache(i)->size, |
| 432 | cpuinfo_get_l1i_cache(i)->sets * cpuinfo_get_l1i_cache(i)->line_size * cpuinfo_get_l1i_cache(i)->partitions * cpuinfo_get_l1i_cache(i)->associativity); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 433 | } |
| 434 | } |
| 435 | |
| 436 | TEST(L1I, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 437 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 438 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->partitions); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 439 | } |
| 440 | } |
| 441 | |
| 442 | TEST(L1I, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 443 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 444 | ASSERT_EQ(64, cpuinfo_get_l1i_cache(i)->line_size); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 445 | } |
| 446 | } |
| 447 | |
| 448 | TEST(L1I, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 449 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 450 | ASSERT_EQ(0, cpuinfo_get_l1i_cache(i)->flags); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 451 | } |
| 452 | } |
| 453 | |
| 454 | TEST(L1I, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 455 | for (uint32_t i = 0; i < cpuinfo_get_l1i_caches_count(); i++) { |
| 456 | ASSERT_EQ(i, cpuinfo_get_l1i_cache(i)->processor_start); |
| 457 | ASSERT_EQ(1, cpuinfo_get_l1i_cache(i)->processor_count); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 458 | } |
| 459 | } |
| 460 | |
| 461 | TEST(L1D, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 462 | ASSERT_EQ(4, cpuinfo_get_l1d_caches_count()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 463 | } |
| 464 | |
| 465 | TEST(L1D, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 466 | ASSERT_TRUE(cpuinfo_get_l1d_caches()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 467 | } |
| 468 | |
| 469 | TEST(L1D, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 470 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 471 | ASSERT_EQ(32 * 1024, cpuinfo_get_l1d_cache(i)->size); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 472 | } |
| 473 | } |
| 474 | |
| 475 | TEST(L1D, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 476 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 477 | ASSERT_EQ(2, cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 478 | } |
| 479 | } |
| 480 | |
| 481 | TEST(L1D, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 482 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 483 | ASSERT_EQ(cpuinfo_get_l1d_cache(i)->size, |
| 484 | cpuinfo_get_l1d_cache(i)->sets * cpuinfo_get_l1d_cache(i)->line_size * cpuinfo_get_l1d_cache(i)->partitions * cpuinfo_get_l1d_cache(i)->associativity); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 485 | } |
| 486 | } |
| 487 | |
| 488 | TEST(L1D, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 489 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 490 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->partitions); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 491 | } |
| 492 | } |
| 493 | |
| 494 | TEST(L1D, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 495 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 496 | ASSERT_EQ(64, cpuinfo_get_l1d_cache(i)->line_size); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 497 | } |
| 498 | } |
| 499 | |
| 500 | TEST(L1D, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 501 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 502 | ASSERT_EQ(0, cpuinfo_get_l1d_cache(i)->flags); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 503 | } |
| 504 | } |
| 505 | |
| 506 | TEST(L1D, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 507 | for (uint32_t i = 0; i < cpuinfo_get_l1d_caches_count(); i++) { |
| 508 | ASSERT_EQ(i, cpuinfo_get_l1d_cache(i)->processor_start); |
| 509 | ASSERT_EQ(1, cpuinfo_get_l1d_cache(i)->processor_count); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 510 | } |
| 511 | } |
| 512 | |
| 513 | TEST(L2, count) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 514 | ASSERT_EQ(1, cpuinfo_get_l2_caches_count()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 515 | } |
| 516 | |
| 517 | TEST(L2, non_null) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 518 | ASSERT_TRUE(cpuinfo_get_l2_caches()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 519 | } |
| 520 | |
| 521 | TEST(L2, size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 522 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 523 | ASSERT_EQ(2 * 1024 * 1024, cpuinfo_get_l2_cache(i)->size); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 524 | } |
| 525 | } |
| 526 | |
| 527 | TEST(L2, associativity) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 528 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 529 | ASSERT_EQ(16, cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 530 | } |
| 531 | } |
| 532 | |
| 533 | TEST(L2, sets) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 534 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 535 | ASSERT_EQ(cpuinfo_get_l2_cache(i)->size, |
| 536 | cpuinfo_get_l2_cache(i)->sets * cpuinfo_get_l2_cache(i)->line_size * cpuinfo_get_l2_cache(i)->partitions * cpuinfo_get_l2_cache(i)->associativity); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 537 | } |
| 538 | } |
| 539 | |
| 540 | TEST(L2, partitions) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 541 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 542 | ASSERT_EQ(1, cpuinfo_get_l2_cache(i)->partitions); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 543 | } |
| 544 | } |
| 545 | |
| 546 | TEST(L2, line_size) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 547 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 548 | ASSERT_EQ(64, cpuinfo_get_l2_cache(i)->line_size); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 549 | } |
| 550 | } |
| 551 | |
| 552 | TEST(L2, flags) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 553 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 554 | ASSERT_EQ(CPUINFO_CACHE_INCLUSIVE, cpuinfo_get_l2_cache(i)->flags); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 555 | } |
| 556 | } |
| 557 | |
| 558 | TEST(L2, processors) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 559 | for (uint32_t i = 0; i < cpuinfo_get_l2_caches_count(); i++) { |
| 560 | ASSERT_EQ(0, cpuinfo_get_l2_cache(i)->processor_start); |
| 561 | ASSERT_EQ(4, cpuinfo_get_l2_cache(i)->processor_count); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 562 | } |
| 563 | } |
| 564 | |
| 565 | TEST(L3, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 566 | ASSERT_EQ(0, cpuinfo_get_l3_caches_count()); |
| 567 | ASSERT_FALSE(cpuinfo_get_l3_caches()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 568 | } |
| 569 | |
| 570 | TEST(L4, none) { |
Marat Dukhan | 3040197 | 2017-09-26 18:35:52 -0700 | [diff] [blame] | 571 | ASSERT_EQ(0, cpuinfo_get_l4_caches_count()); |
| 572 | ASSERT_FALSE(cpuinfo_get_l4_caches()); |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 573 | } |
| 574 | |
| 575 | #include <pixel-c.h> |
| 576 | |
| 577 | int main(int argc, char* argv[]) { |
Marat Dukhan | 63a7a6b | 2017-11-29 15:11:56 -0800 | [diff] [blame] | 578 | #if CPUINFO_ARCH_ARM |
| 579 | cpuinfo_set_hwcap(UINT32_C(0x0027B0D6)); |
| 580 | cpuinfo_set_hwcap2(UINT32_C(0x0000001F)); |
| 581 | #elif CPUINFO_ARCH_ARM64 |
| 582 | cpuinfo_set_hwcap(UINT32_C(0x000000FF)); |
| 583 | #endif |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 584 | cpuinfo_mock_filesystem(filesystem); |
Marat Dukhan | 5659d29 | 2017-09-12 23:21:03 -0700 | [diff] [blame] | 585 | #ifdef __ANDROID__ |
| 586 | cpuinfo_mock_android_properties(properties); |
Marat Dukhan | fd0f3ef | 2017-12-18 17:45:18 -0800 | [diff] [blame] | 587 | cpuinfo_mock_gl_renderer("NVIDIA Tegra"); |
Marat Dukhan | 5659d29 | 2017-09-12 23:21:03 -0700 | [diff] [blame] | 588 | #endif |
Marat Dukhan | 6e5dcda | 2017-09-08 17:23:37 -0700 | [diff] [blame] | 589 | cpuinfo_initialize(); |
| 590 | ::testing::InitGoogleTest(&argc, argv); |
| 591 | return RUN_ALL_TESTS(); |
Marat Dukhan | 93982f2 | 2017-10-20 13:10:23 -0700 | [diff] [blame] | 592 | } |