blob: c5d970451a65e7403acc512720f0cde0545b95e5 [file] [log] [blame]
Marat Dukhan955c3db2017-09-14 13:13:46 -07001#include <gtest/gtest.h>
2
3#include <cpuinfo.h>
4#include <cpuinfo-mock.h>
5
6
7TEST(PROCESSORS, count) {
8 ASSERT_EQ(4, cpuinfo_processors_count);
9}
10
11TEST(PROCESSORS, non_null) {
12 ASSERT_TRUE(cpuinfo_processors);
13}
14
Marat Dukhan2d37dc42017-09-25 01:32:37 -070015TEST(PROCESSORS, smt_id) {
Marat Dukhan955c3db2017-09-14 13:13:46 -070016 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
Marat Dukhan2d37dc42017-09-25 01:32:37 -070017 ASSERT_EQ(0, cpuinfo_processors[i].smt_id);
Marat Dukhan955c3db2017-09-14 13:13:46 -070018 }
19}
20
Marat Dukhan2d37dc42017-09-25 01:32:37 -070021TEST(PROCESSORS, core) {
Marat Dukhan955c3db2017-09-14 13:13:46 -070022 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
Marat Dukhan2d37dc42017-09-25 01:32:37 -070023 ASSERT_EQ(&cpuinfo_cores[i], cpuinfo_processors[i].core);
24 }
25}
26
27TEST(PROCESSORS, package) {
28 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
29 ASSERT_EQ(&cpuinfo_packages[0], cpuinfo_processors[i].package);
Marat Dukhan955c3db2017-09-14 13:13:46 -070030 }
31}
32
33TEST(PROCESSORS, linux_id) {
34 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
35 ASSERT_EQ(i, cpuinfo_processors[i].linux_id);
36 }
37}
38
Marat Dukhan2d37dc42017-09-25 01:32:37 -070039TEST(PROCESSORS, l1i) {
40 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
41 ASSERT_EQ(&cpuinfo_get_l1i_cache().instances[i], cpuinfo_processors[i].cache.l1i);
42 }
43}
44
45TEST(PROCESSORS, l1d) {
46 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
47 ASSERT_EQ(&cpuinfo_get_l1d_cache().instances[i], cpuinfo_processors[i].cache.l1d);
48 }
49}
50
51TEST(PROCESSORS, l2) {
52 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
53 ASSERT_EQ(&cpuinfo_get_l2_cache().instances[0], cpuinfo_processors[i].cache.l2);
54 }
55}
56
57TEST(PROCESSORS, l3) {
58 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
59 ASSERT_FALSE(cpuinfo_processors[i].cache.l3);
60 }
61}
62
63TEST(PROCESSORS, l4) {
64 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
65 ASSERT_FALSE(cpuinfo_processors[i].cache.l4);
66 }
67}
68
Marat Dukhan7073e832017-09-24 22:23:55 -070069TEST(CORES, count) {
70 ASSERT_EQ(4, cpuinfo_cores_count);
71}
72
Marat Dukhan2d37dc42017-09-25 01:32:37 -070073TEST(CORES, non_null) {
74 ASSERT_TRUE(cpuinfo_cores);
75}
76
Marat Dukhan7073e832017-09-24 22:23:55 -070077TEST(CORES, processor_start) {
78 for (uint32_t i = 0; i < cpuinfo_cores_count; i++) {
79 ASSERT_EQ(i, cpuinfo_cores[i].processor_start);
80 }
81}
82
83TEST(CORES, processor_count) {
84 for (uint32_t i = 0; i < cpuinfo_cores_count; i++) {
85 ASSERT_EQ(1, cpuinfo_cores[i].processor_count);
86 }
87}
88
Marat Dukhan2d37dc42017-09-25 01:32:37 -070089TEST(CORES, core_id) {
90 for (uint32_t i = 0; i < cpuinfo_cores_count; i++) {
91 ASSERT_EQ(i, cpuinfo_cores[i].core_id);
92 }
93}
94
95TEST(CORES, package) {
96 for (uint32_t i = 0; i < cpuinfo_cores_count; i++) {
97 ASSERT_EQ(&cpuinfo_packages[0], cpuinfo_cores[i].package);
98 }
99}
100
101TEST(CORES, vendor) {
102 for (uint32_t i = 0; i < cpuinfo_cores_count; i++) {
103 ASSERT_EQ(cpuinfo_vendor_arm, cpuinfo_cores[i].vendor);
104 }
105}
106
107TEST(CORES, uarch) {
108 for (uint32_t i = 0; i < cpuinfo_cores_count; i++) {
109 ASSERT_EQ(cpuinfo_uarch_cortex_a5, cpuinfo_cores[i].uarch);
110 }
111}
112
113TEST(CORES, midr) {
114 for (uint32_t i = 0; i < cpuinfo_cores_count; i++) {
115 ASSERT_EQ(UINT32_C(0x410FC051), cpuinfo_cores[i].midr);
116 }
117}
118
Marat Dukhan955c3db2017-09-14 13:13:46 -0700119TEST(PACKAGES, count) {
120 ASSERT_EQ(1, cpuinfo_packages_count);
121}
122
123TEST(PACKAGES, name) {
124 for (uint32_t i = 0; i < cpuinfo_packages_count; i++) {
125 ASSERT_EQ("Qualcomm MSM8625Q",
126 std::string(cpuinfo_packages[i].name,
127 strnlen(cpuinfo_packages[i].name, CPUINFO_PACKAGE_NAME_MAX)));
128 }
129}
130
131TEST(PACKAGES, processor_start) {
132 for (uint32_t i = 0; i < cpuinfo_packages_count; i++) {
133 ASSERT_EQ(0, cpuinfo_packages[i].processor_start);
134 }
135}
136
137TEST(PACKAGES, processor_count) {
138 for (uint32_t i = 0; i < cpuinfo_packages_count; i++) {
139 ASSERT_EQ(4, cpuinfo_packages[i].processor_count);
140 }
141}
142
143TEST(PACKAGES, core_start) {
144 for (uint32_t i = 0; i < cpuinfo_packages_count; i++) {
145 ASSERT_EQ(0, cpuinfo_packages[i].core_start);
146 }
147}
148
149TEST(PACKAGES, core_count) {
150 for (uint32_t i = 0; i < cpuinfo_packages_count; i++) {
151 ASSERT_EQ(4, cpuinfo_packages[i].core_count);
152 }
153}
154
155TEST(ISA, thumb) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700156 ASSERT_TRUE(cpuinfo_has_arm_thumb());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700157}
158
159TEST(ISA, thumb2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700160 ASSERT_TRUE(cpuinfo_has_arm_thumb2());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700161}
162
163TEST(ISA, armv5e) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700164 ASSERT_TRUE(cpuinfo_has_arm_v5e());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700165}
166
167TEST(ISA, armv6) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700168 ASSERT_TRUE(cpuinfo_has_arm_v6());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700169}
170
171TEST(ISA, armv6k) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700172 ASSERT_TRUE(cpuinfo_has_arm_v6k());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700173}
174
175TEST(ISA, armv7) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700176 ASSERT_TRUE(cpuinfo_has_arm_v7());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700177}
178
179TEST(ISA, armv7mp) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700180 ASSERT_TRUE(cpuinfo_has_arm_v7mp());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700181}
182
183TEST(ISA, idiv) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700184 ASSERT_FALSE(cpuinfo_has_arm_idiv());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700185}
186
187TEST(ISA, vfpv2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700188 ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700189}
190
191TEST(ISA, vfpv3) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700192 ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700193}
194
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700195TEST(ISA, vfpv3_d32) {
196 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700197}
198
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700199TEST(ISA, vfpv3_fp16) {
200 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700201}
202
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700203TEST(ISA, vfpv3_fp16_d32) {
204 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32());
205}
206
207TEST(ISA, vfpv4) {
208 ASSERT_TRUE(cpuinfo_has_arm_vfpv4());
209}
210
211TEST(ISA, vfpv4_d32) {
212 ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700213}
214
215TEST(ISA, wmmx) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700216 ASSERT_FALSE(cpuinfo_has_arm_wmmx());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700217}
218
219TEST(ISA, wmmx2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700220 ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700221}
222
223TEST(ISA, neon) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700224 ASSERT_TRUE(cpuinfo_has_arm_neon());
225}
226
227TEST(ISA, neon_fp16) {
228 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16());
229}
230
231TEST(ISA, neon_fma) {
232 ASSERT_TRUE(cpuinfo_has_arm_neon_fma());
233}
234
235TEST(ISA, atomics) {
236 ASSERT_FALSE(cpuinfo_has_arm_atomics());
237}
238
239TEST(ISA, neon_rdm) {
240 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
241}
242
243TEST(ISA, fp16_arith) {
244 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
245}
246
247TEST(ISA, jscvt) {
248 ASSERT_FALSE(cpuinfo_has_arm_jscvt());
249}
250
251TEST(ISA, fcma) {
252 ASSERT_FALSE(cpuinfo_has_arm_fcma());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700253}
254
255TEST(ISA, aes) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700256 ASSERT_FALSE(cpuinfo_has_arm_aes());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700257}
258
259TEST(ISA, sha1) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700260 ASSERT_FALSE(cpuinfo_has_arm_sha1());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700261}
262
263TEST(ISA, sha2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700264 ASSERT_FALSE(cpuinfo_has_arm_sha2());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700265}
266
267TEST(ISA, pmull) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700268 ASSERT_FALSE(cpuinfo_has_arm_pmull());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700269}
270
271TEST(ISA, crc32) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700272 ASSERT_FALSE(cpuinfo_has_arm_crc32());
Marat Dukhan955c3db2017-09-14 13:13:46 -0700273}
274
275TEST(L1I, count) {
276 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
277 ASSERT_EQ(4, l1i.count);
278}
279
280TEST(L1I, non_null) {
281 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
282 ASSERT_TRUE(l1i.instances);
283}
284
285TEST(L1I, size) {
286 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
287 for (uint32_t k = 0; k < l1i.count; k++) {
288 ASSERT_EQ(32 * 1024, l1i.instances[k].size);
289 }
290}
291
292TEST(L1I, associativity) {
293 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
294 for (uint32_t k = 0; k < l1i.count; k++) {
295 ASSERT_EQ(2, l1i.instances[k].associativity);
296 }
297}
298
299TEST(L1I, sets) {
300 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
301 for (uint32_t k = 0; k < l1i.count; k++) {
302 ASSERT_EQ(l1i.instances[k].size,
303 l1i.instances[k].sets * l1i.instances[k].line_size * l1i.instances[k].partitions * l1i.instances[k].associativity);
304 }
305}
306
307TEST(L1I, partitions) {
308 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
309 for (uint32_t k = 0; k < l1i.count; k++) {
310 ASSERT_EQ(1, l1i.instances[k].partitions);
311 }
312}
313
314TEST(L1I, line_size) {
315 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
316 for (uint32_t k = 0; k < l1i.count; k++) {
317 ASSERT_EQ(32, l1i.instances[k].line_size);
318 }
319}
320
321TEST(L1I, flags) {
322 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
323 for (uint32_t k = 0; k < l1i.count; k++) {
324 ASSERT_EQ(0, l1i.instances[k].flags);
325 }
326}
327
328TEST(L1I, processors) {
329 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
330 for (uint32_t k = 0; k < l1i.count; k++) {
331 ASSERT_EQ(k, l1i.instances[k].processor_start);
332 ASSERT_EQ(1, l1i.instances[k].processor_count);
333 }
334}
335
336TEST(L1D, count) {
337 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
338 ASSERT_EQ(4, l1d.count);
339}
340
341TEST(L1D, non_null) {
342 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
343 ASSERT_TRUE(l1d.instances);
344}
345
346TEST(L1D, size) {
347 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
348 for (uint32_t k = 0; k < l1d.count; k++) {
349 ASSERT_EQ(32 * 1024, l1d.instances[k].size);
350 }
351}
352
353TEST(L1D, associativity) {
354 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
355 for (uint32_t k = 0; k < l1d.count; k++) {
356 ASSERT_EQ(4, l1d.instances[k].associativity);
357 }
358}
359
360TEST(L1D, sets) {
361 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
362 for (uint32_t k = 0; k < l1d.count; k++) {
363 ASSERT_EQ(l1d.instances[k].size,
364 l1d.instances[k].sets * l1d.instances[k].line_size * l1d.instances[k].partitions * l1d.instances[k].associativity);
365 }
366}
367
368TEST(L1D, partitions) {
369 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
370 for (uint32_t k = 0; k < l1d.count; k++) {
371 ASSERT_EQ(1, l1d.instances[k].partitions);
372 }
373}
374
375TEST(L1D, line_size) {
376 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
377 for (uint32_t k = 0; k < l1d.count; k++) {
378 ASSERT_EQ(32, l1d.instances[k].line_size);
379 }
380}
381
382TEST(L1D, flags) {
383 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
384 for (uint32_t k = 0; k < l1d.count; k++) {
385 ASSERT_EQ(0, l1d.instances[k].flags);
386 }
387}
388
389TEST(L1D, processors) {
390 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
391 for (uint32_t k = 0; k < l1d.count; k++) {
392 ASSERT_EQ(k, l1d.instances[k].processor_start);
393 ASSERT_EQ(1, l1d.instances[k].processor_count);
394 }
395}
396
397TEST(L2, count) {
398 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
399 ASSERT_EQ(1, l2.count);
400}
401
402TEST(L2, non_null) {
403 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
404 ASSERT_TRUE(l2.instances);
405}
406
407TEST(L2, size) {
408 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
409 for (uint32_t k = 0; k < l2.count; k++) {
410 ASSERT_EQ(256 * 1024, l2.instances[k].size);
411 }
412}
413
414TEST(L2, associativity) {
415 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
416 for (uint32_t k = 0; k < l2.count; k++) {
417 ASSERT_EQ(8, l2.instances[k].associativity);
418 }
419}
420
421TEST(L2, sets) {
422 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
423 for (uint32_t k = 0; k < l2.count; k++) {
424 ASSERT_EQ(l2.instances[k].size,
425 l2.instances[k].sets * l2.instances[k].line_size * l2.instances[k].partitions * l2.instances[k].associativity);
426 }
427}
428
429TEST(L2, partitions) {
430 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
431 for (uint32_t k = 0; k < l2.count; k++) {
432 ASSERT_EQ(1, l2.instances[k].partitions);
433 }
434}
435
436TEST(L2, line_size) {
437 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
438 for (uint32_t k = 0; k < l2.count; k++) {
439 ASSERT_EQ(32, l2.instances[k].line_size);
440 }
441}
442
443TEST(L2, flags) {
444 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
445 for (uint32_t k = 0; k < l2.count; k++) {
446 ASSERT_EQ(0, l2.instances[k].flags);
447 }
448}
449
450TEST(L2, processors) {
451 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
452 for (uint32_t k = 0; k < l2.count; k++) {
453 ASSERT_EQ(0, l2.instances[k].processor_start);
454 ASSERT_EQ(4, l2.instances[k].processor_count);
455 }
456}
457
458TEST(L3, none) {
459 cpuinfo_caches l3 = cpuinfo_get_l3_cache();
460 ASSERT_EQ(0, l3.count);
461 ASSERT_FALSE(l3.instances);
462}
463
464TEST(L4, none) {
465 cpuinfo_caches l4 = cpuinfo_get_l4_cache();
466 ASSERT_EQ(0, l4.count);
467 ASSERT_FALSE(l4.instances);
468}
469
470#include <galaxy-win-duos.h>
471
472int main(int argc, char* argv[]) {
473 cpuinfo_mock_filesystem(filesystem);
474#ifdef __ANDROID__
475 cpuinfo_mock_android_properties(properties);
476#endif
477 cpuinfo_initialize();
478 ::testing::InitGoogleTest(&argc, argv);
479 return RUN_ALL_TESTS();
480}