blob: 5b8dce3f9e992aeec5b0ab17807d707cc66f8c02 [file] [log] [blame]
Marat Dukhancf149942017-09-08 17:39:01 -07001#include <gtest/gtest.h>
2
3#include <cpuinfo.h>
4#include <cpuinfo-mock.h>
5
6
7TEST(PROCESSORS, count) {
8 ASSERT_EQ(4, cpuinfo_processors_count);
9}
10
11TEST(PROCESSORS, non_null) {
12 ASSERT_TRUE(cpuinfo_processors);
13}
14
Marat Dukhan2d37dc42017-09-25 01:32:37 -070015TEST(PROCESSORS, smt_id) {
Marat Dukhancf149942017-09-08 17:39:01 -070016 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
Marat Dukhan2d37dc42017-09-25 01:32:37 -070017 ASSERT_EQ(0, cpuinfo_processors[i].smt_id);
Marat Dukhancf149942017-09-08 17:39:01 -070018 }
19}
20
Marat Dukhan2d37dc42017-09-25 01:32:37 -070021TEST(PROCESSORS, core) {
Marat Dukhancf149942017-09-08 17:39:01 -070022 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
Marat Dukhan2d37dc42017-09-25 01:32:37 -070023 ASSERT_EQ(&cpuinfo_cores[i], cpuinfo_processors[i].core);
24 }
25}
26
27TEST(PROCESSORS, package) {
28 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
29 ASSERT_EQ(&cpuinfo_packages[0], cpuinfo_processors[i].package);
Marat Dukhancf149942017-09-08 17:39:01 -070030 }
31}
32
Marat Dukhan846c1782017-09-13 09:47:26 -070033TEST(PROCESSORS, linux_id) {
34 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
35 switch (i) {
36 case 0:
37 case 1:
Marat Dukhan15e1df92017-09-13 11:10:10 -070038 ASSERT_EQ(i + 2, cpuinfo_processors[i].linux_id);
Marat Dukhan846c1782017-09-13 09:47:26 -070039 break;
40 case 2:
41 case 3:
Marat Dukhan15e1df92017-09-13 11:10:10 -070042 ASSERT_EQ(i - 2, cpuinfo_processors[i].linux_id);
Marat Dukhan846c1782017-09-13 09:47:26 -070043 break;
44 }
45 }
46}
47
Marat Dukhan2d37dc42017-09-25 01:32:37 -070048TEST(PROCESSORS, l1i) {
49 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
50 ASSERT_EQ(&cpuinfo_get_l1i_cache().instances[i], cpuinfo_processors[i].cache.l1i);
51 }
52}
53
54TEST(PROCESSORS, l1d) {
55 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
56 ASSERT_EQ(&cpuinfo_get_l1d_cache().instances[i], cpuinfo_processors[i].cache.l1d);
57 }
58}
59
60TEST(PROCESSORS, l2) {
61 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
62 switch (i) {
63 case 0:
64 case 1:
65 ASSERT_EQ(&cpuinfo_get_l2_cache().instances[0], cpuinfo_processors[i].cache.l2);
66 break;
67 case 2:
68 case 3:
69 ASSERT_EQ(&cpuinfo_get_l2_cache().instances[1], cpuinfo_processors[i].cache.l2);
70 break;
71 }
72 }
73}
74
75TEST(PROCESSORS, l3) {
76 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
77 ASSERT_FALSE(cpuinfo_processors[i].cache.l3);
78 }
79}
80
81TEST(PROCESSORS, l4) {
82 for (uint32_t i = 0; i < cpuinfo_processors_count; i++) {
83 ASSERT_FALSE(cpuinfo_processors[i].cache.l4);
84 }
85}
86
Marat Dukhan7073e832017-09-24 22:23:55 -070087TEST(CORES, count) {
88 ASSERT_EQ(4, cpuinfo_cores_count);
89}
90
Marat Dukhan2d37dc42017-09-25 01:32:37 -070091TEST(CORES, non_null) {
92 ASSERT_TRUE(cpuinfo_cores);
93}
94
Marat Dukhan7073e832017-09-24 22:23:55 -070095TEST(CORES, processor_start) {
96 for (uint32_t i = 0; i < cpuinfo_cores_count; i++) {
97 ASSERT_EQ(i, cpuinfo_cores[i].processor_start);
98 }
99}
100
101TEST(CORES, processor_count) {
102 for (uint32_t i = 0; i < cpuinfo_cores_count; i++) {
103 ASSERT_EQ(1, cpuinfo_cores[i].processor_count);
104 }
105}
106
Marat Dukhan2d37dc42017-09-25 01:32:37 -0700107TEST(CORES, core_id) {
108 for (uint32_t i = 0; i < cpuinfo_cores_count; i++) {
109 ASSERT_EQ(i, cpuinfo_cores[i].core_id);
110 }
111}
112
113TEST(CORES, package) {
114 for (uint32_t i = 0; i < cpuinfo_cores_count; i++) {
115 ASSERT_EQ(&cpuinfo_packages[0], cpuinfo_cores[i].package);
116 }
117}
118
119TEST(CORES, vendor) {
120 for (uint32_t i = 0; i < cpuinfo_cores_count; i++) {
121 ASSERT_EQ(cpuinfo_vendor_qualcomm, cpuinfo_cores[i].vendor);
122 }
123}
124
125TEST(CORES, uarch) {
126 for (uint32_t i = 0; i < cpuinfo_cores_count; i++) {
127 ASSERT_EQ(cpuinfo_uarch_kryo, cpuinfo_cores[i].uarch);
128 }
129}
130
131TEST(CORES, midr) {
132 for (uint32_t i = 0; i < cpuinfo_cores_count; i++) {
133 switch (i) {
134 case 0:
135 case 1:
136 ASSERT_EQ(UINT32_C(0x512F2051), cpuinfo_cores[i].midr);
137 break;
138 case 2:
139 case 3:
140 ASSERT_EQ(UINT32_C(0x512F2011), cpuinfo_cores[i].midr);
141 break;
142 }
143 }
144}
145
Marat Dukhanfb4fbe02017-09-13 00:51:05 -0700146TEST(PACKAGES, count) {
147 ASSERT_EQ(1, cpuinfo_packages_count);
148}
149
150TEST(PACKAGES, name) {
151 for (uint32_t i = 0; i < cpuinfo_packages_count; i++) {
152 ASSERT_EQ("Qualcomm MSM8996PRO-AB",
153 std::string(cpuinfo_packages[i].name,
154 strnlen(cpuinfo_packages[i].name, CPUINFO_PACKAGE_NAME_MAX)));
155 }
156}
157
158TEST(PACKAGES, processor_start) {
159 for (uint32_t i = 0; i < cpuinfo_packages_count; i++) {
160 ASSERT_EQ(0, cpuinfo_packages[i].processor_start);
161 }
162}
163
164TEST(PACKAGES, processor_count) {
165 for (uint32_t i = 0; i < cpuinfo_packages_count; i++) {
166 ASSERT_EQ(4, cpuinfo_packages[i].processor_count);
167 }
168}
169
170TEST(PACKAGES, core_start) {
171 for (uint32_t i = 0; i < cpuinfo_packages_count; i++) {
172 ASSERT_EQ(0, cpuinfo_packages[i].core_start);
173 }
174}
175
176TEST(PACKAGES, core_count) {
177 for (uint32_t i = 0; i < cpuinfo_packages_count; i++) {
178 ASSERT_EQ(4, cpuinfo_packages[i].core_count);
179 }
180}
181
Marat Dukhancf149942017-09-08 17:39:01 -0700182TEST(ISA, thumb) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700183 #if CPUINFO_ARCH_ARM
184 ASSERT_TRUE(cpuinfo_has_arm_thumb());
185 #elif CPUINFO_ARCH_ARM64
186 ASSERT_FALSE(cpuinfo_has_arm_thumb());
187 #endif
Marat Dukhancf149942017-09-08 17:39:01 -0700188}
189
190TEST(ISA, thumb2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700191 #if CPUINFO_ARCH_ARM
192 ASSERT_TRUE(cpuinfo_has_arm_thumb2());
193 #elif CPUINFO_ARCH_ARM64
194 ASSERT_FALSE(cpuinfo_has_arm_thumb2());
195 #endif
Marat Dukhancf149942017-09-08 17:39:01 -0700196}
197
198TEST(ISA, armv5e) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700199 #if CPUINFO_ARCH_ARM
200 ASSERT_TRUE(cpuinfo_has_arm_v5e());
201 #elif CPUINFO_ARCH_ARM64
202 ASSERT_FALSE(cpuinfo_has_arm_v5e());
203 #endif
Marat Dukhancf149942017-09-08 17:39:01 -0700204}
205
206TEST(ISA, armv6) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700207 #if CPUINFO_ARCH_ARM
208 ASSERT_TRUE(cpuinfo_has_arm_v6());
209 #elif CPUINFO_ARCH_ARM64
210 ASSERT_FALSE(cpuinfo_has_arm_v6());
211 #endif
Marat Dukhancf149942017-09-08 17:39:01 -0700212}
213
214TEST(ISA, armv6k) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700215 #if CPUINFO_ARCH_ARM
216 ASSERT_TRUE(cpuinfo_has_arm_v6k());
217 #elif CPUINFO_ARCH_ARM64
218 ASSERT_FALSE(cpuinfo_has_arm_v6k());
219 #endif
Marat Dukhancf149942017-09-08 17:39:01 -0700220}
221
222TEST(ISA, armv7) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700223 #if CPUINFO_ARCH_ARM
224 ASSERT_TRUE(cpuinfo_has_arm_v7());
225 #elif CPUINFO_ARCH_ARM64
226 ASSERT_FALSE(cpuinfo_has_arm_v7());
227 #endif
Marat Dukhancf149942017-09-08 17:39:01 -0700228}
229
230TEST(ISA, armv7mp) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700231 #if CPUINFO_ARCH_ARM
232 ASSERT_TRUE(cpuinfo_has_arm_v7mp());
233 #elif CPUINFO_ARCH_ARM64
234 ASSERT_FALSE(cpuinfo_has_arm_v7mp());
235 #endif
Marat Dukhancf149942017-09-08 17:39:01 -0700236}
237
238TEST(ISA, idiv) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700239 ASSERT_TRUE(cpuinfo_has_arm_idiv());
Marat Dukhancf149942017-09-08 17:39:01 -0700240}
241
242TEST(ISA, vfpv2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700243 ASSERT_FALSE(cpuinfo_has_arm_vfpv2());
Marat Dukhancf149942017-09-08 17:39:01 -0700244}
245
246TEST(ISA, vfpv3) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700247 ASSERT_TRUE(cpuinfo_has_arm_vfpv3());
Marat Dukhancf149942017-09-08 17:39:01 -0700248}
249
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700250TEST(ISA, vfpv3_d32) {
251 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_d32());
Marat Dukhancf149942017-09-08 17:39:01 -0700252}
253
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700254TEST(ISA, vfpv3_fp16) {
255 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16());
Marat Dukhancf149942017-09-08 17:39:01 -0700256}
257
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700258TEST(ISA, vfpv3_fp16_d32) {
259 ASSERT_TRUE(cpuinfo_has_arm_vfpv3_fp16_d32());
260}
261
262TEST(ISA, vfpv4) {
263 ASSERT_TRUE(cpuinfo_has_arm_vfpv4());
264}
265
266TEST(ISA, vfpv4_d32) {
267 ASSERT_TRUE(cpuinfo_has_arm_vfpv4_d32());
Marat Dukhancf149942017-09-08 17:39:01 -0700268}
269
270TEST(ISA, wmmx) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700271 ASSERT_FALSE(cpuinfo_has_arm_wmmx());
Marat Dukhancf149942017-09-08 17:39:01 -0700272}
273
274TEST(ISA, wmmx2) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700275 ASSERT_FALSE(cpuinfo_has_arm_wmmx2());
Marat Dukhancf149942017-09-08 17:39:01 -0700276}
277
278TEST(ISA, neon) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700279 ASSERT_TRUE(cpuinfo_has_arm_neon());
Marat Dukhancf149942017-09-08 17:39:01 -0700280}
281
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700282TEST(ISA, neon_fp16) {
283 ASSERT_TRUE(cpuinfo_has_arm_neon_fp16());
Marat Dukhancf149942017-09-08 17:39:01 -0700284}
285
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700286TEST(ISA, neon_fma) {
287 ASSERT_TRUE(cpuinfo_has_arm_neon_fma());
Marat Dukhancf149942017-09-08 17:39:01 -0700288}
289
Marat Dukhan3e8e1c72017-09-13 12:15:35 -0700290TEST(ISA, atomics) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700291 ASSERT_FALSE(cpuinfo_has_arm_atomics());
Marat Dukhan3e8e1c72017-09-13 12:15:35 -0700292}
293
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700294TEST(ISA, neon_rdm) {
295 ASSERT_FALSE(cpuinfo_has_arm_neon_rdm());
Marat Dukhan3e8e1c72017-09-13 12:15:35 -0700296}
297
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700298TEST(ISA, fp16_arith) {
299 ASSERT_FALSE(cpuinfo_has_arm_fp16_arith());
Marat Dukhan3e8e1c72017-09-13 12:15:35 -0700300}
301
302TEST(ISA, jscvt) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700303 ASSERT_FALSE(cpuinfo_has_arm_jscvt());
Marat Dukhan3e8e1c72017-09-13 12:15:35 -0700304}
305
306TEST(ISA, fcma) {
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700307 ASSERT_FALSE(cpuinfo_has_arm_fcma());
Marat Dukhan3e8e1c72017-09-13 12:15:35 -0700308}
Marat Dukhaneb3025f2017-09-26 12:57:41 -0700309
310TEST(ISA, aes) {
311 ASSERT_TRUE(cpuinfo_has_arm_aes());
312}
313
314TEST(ISA, sha1) {
315 ASSERT_TRUE(cpuinfo_has_arm_sha1());
316}
317
318TEST(ISA, sha2) {
319 ASSERT_TRUE(cpuinfo_has_arm_sha2());
320}
321
322TEST(ISA, pmull) {
323 ASSERT_TRUE(cpuinfo_has_arm_pmull());
324}
325
326TEST(ISA, crc32) {
327 ASSERT_TRUE(cpuinfo_has_arm_crc32());
328}
Marat Dukhan3e8e1c72017-09-13 12:15:35 -0700329
Marat Dukhancf149942017-09-08 17:39:01 -0700330TEST(L1I, count) {
331 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
332 ASSERT_EQ(4, l1i.count);
333}
334
335TEST(L1I, non_null) {
336 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
337 ASSERT_TRUE(l1i.instances);
338}
339
340TEST(L1I, size) {
341 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
342 for (uint32_t k = 0; k < l1i.count; k++) {
343 ASSERT_EQ(32 * 1024, l1i.instances[k].size);
344 }
345}
346
347TEST(L1I, associativity) {
348 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
349 for (uint32_t k = 0; k < l1i.count; k++) {
350 ASSERT_EQ(4, l1i.instances[k].associativity);
351 }
352}
353
354TEST(L1I, sets) {
355 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
356 for (uint32_t k = 0; k < l1i.count; k++) {
357 ASSERT_EQ(l1i.instances[k].size,
358 l1i.instances[k].sets * l1i.instances[k].line_size * l1i.instances[k].partitions * l1i.instances[k].associativity);
359 }
360}
361
362TEST(L1I, partitions) {
363 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
364 for (uint32_t k = 0; k < l1i.count; k++) {
365 ASSERT_EQ(1, l1i.instances[k].partitions);
366 }
367}
368
369TEST(L1I, line_size) {
370 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
371 for (uint32_t k = 0; k < l1i.count; k++) {
372 ASSERT_EQ(64, l1i.instances[k].line_size);
373 }
374}
375
376TEST(L1I, flags) {
377 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
378 for (uint32_t k = 0; k < l1i.count; k++) {
379 ASSERT_EQ(0, l1i.instances[k].flags);
380 }
381}
382
383TEST(L1I, processors) {
384 cpuinfo_caches l1i = cpuinfo_get_l1i_cache();
385 for (uint32_t k = 0; k < l1i.count; k++) {
386 ASSERT_EQ(k, l1i.instances[k].processor_start);
387 ASSERT_EQ(1, l1i.instances[k].processor_count);
388 }
389}
390
391TEST(L1D, count) {
392 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
393 ASSERT_EQ(4, l1d.count);
394}
395
396TEST(L1D, non_null) {
397 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
398 ASSERT_TRUE(l1d.instances);
399}
400
401TEST(L1D, size) {
402 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
403 for (uint32_t k = 0; k < l1d.count; k++) {
404 ASSERT_EQ(24 * 1024, l1d.instances[k].size);
405 }
406}
407
408TEST(L1D, associativity) {
409 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
410 for (uint32_t k = 0; k < l1d.count; k++) {
411 ASSERT_EQ(3, l1d.instances[k].associativity);
412 }
413}
414
415TEST(L1D, sets) {
416 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
417 for (uint32_t k = 0; k < l1d.count; k++) {
418 ASSERT_EQ(l1d.instances[k].size,
419 l1d.instances[k].sets * l1d.instances[k].line_size * l1d.instances[k].partitions * l1d.instances[k].associativity);
420 }
421}
422
423TEST(L1D, partitions) {
424 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
425 for (uint32_t k = 0; k < l1d.count; k++) {
426 ASSERT_EQ(1, l1d.instances[k].partitions);
427 }
428}
429
430TEST(L1D, line_size) {
431 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
432 for (uint32_t k = 0; k < l1d.count; k++) {
433 ASSERT_EQ(64, l1d.instances[k].line_size);
434 }
435}
436
437TEST(L1D, flags) {
438 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
439 for (uint32_t k = 0; k < l1d.count; k++) {
440 ASSERT_EQ(0, l1d.instances[k].flags);
441 }
442}
443
444TEST(L1D, processors) {
445 cpuinfo_caches l1d = cpuinfo_get_l1d_cache();
446 for (uint32_t k = 0; k < l1d.count; k++) {
447 ASSERT_EQ(k, l1d.instances[k].processor_start);
448 ASSERT_EQ(1, l1d.instances[k].processor_count);
449 }
450}
451
452TEST(L2, count) {
453 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
454 ASSERT_EQ(2, l2.count);
455}
456
457TEST(L2, non_null) {
458 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
459 ASSERT_TRUE(l2.instances);
460}
461
462TEST(L2, size) {
463 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
464 for (uint32_t k = 0; k < l2.count; k++) {
465 switch (k) {
466 case 0:
467 ASSERT_EQ(1 * 1024 * 1024, l2.instances[k].size);
468 break;
469 case 1:
470 ASSERT_EQ(512 * 1024, l2.instances[k].size);
471 break;
472 }
473 }
474}
475
476TEST(L2, associativity) {
477 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
478 for (uint32_t k = 0; k < l2.count; k++) {
479 ASSERT_EQ(8, l2.instances[k].associativity);
480 }
481}
482
483TEST(L2, sets) {
484 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
485 for (uint32_t k = 0; k < l2.count; k++) {
486 ASSERT_EQ(l2.instances[k].size,
487 l2.instances[k].sets * l2.instances[k].line_size * l2.instances[k].partitions * l2.instances[k].associativity);
488 }
489}
490
491TEST(L2, partitions) {
492 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
493 for (uint32_t k = 0; k < l2.count; k++) {
494 ASSERT_EQ(1, l2.instances[k].partitions);
495 }
496}
497
498TEST(L2, line_size) {
499 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
500 for (uint32_t k = 0; k < l2.count; k++) {
501 ASSERT_EQ(128, l2.instances[k].line_size);
502 }
503}
504
505TEST(L2, flags) {
506 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
507 for (uint32_t k = 0; k < l2.count; k++) {
508 ASSERT_EQ(0, l2.instances[k].flags);
509 }
510}
511
512TEST(L2, processors) {
513 cpuinfo_caches l2 = cpuinfo_get_l2_cache();
514 for (uint32_t k = 0; k < l2.count; k++) {
515 switch (k) {
516 case 0:
517 ASSERT_EQ(0, l2.instances[k].processor_start);
518 ASSERT_EQ(2, l2.instances[k].processor_count);
519 break;
520 case 1:
521 ASSERT_EQ(2, l2.instances[k].processor_start);
522 ASSERT_EQ(2, l2.instances[k].processor_count);
523 break;
524 }
525 }
526}
527
528TEST(L3, none) {
529 cpuinfo_caches l3 = cpuinfo_get_l3_cache();
530 ASSERT_EQ(0, l3.count);
531 ASSERT_FALSE(l3.instances);
532}
533
534TEST(L4, none) {
535 cpuinfo_caches l4 = cpuinfo_get_l4_cache();
536 ASSERT_EQ(0, l4.count);
537 ASSERT_FALSE(l4.instances);
538}
539
540#include <pixel.h>
541
542int main(int argc, char* argv[]) {
543 cpuinfo_mock_filesystem(filesystem);
Marat Dukhan5659d292017-09-12 23:21:03 -0700544#ifdef __ANDROID__
545 cpuinfo_mock_android_properties(properties);
546#endif
Marat Dukhancf149942017-09-08 17:39:01 -0700547 cpuinfo_initialize();
548 ::testing::InitGoogleTest(&argc, argv);
549 return RUN_ALL_TESTS();
550}