Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 1 | spv.atomicInt64.comp |
John Kessenich | cc14f2d | 2018-08-22 17:17:07 -0600 | [diff] [blame^] | 2 | error: SPIRV-Tools Validation Errors |
| 3 | error: Capability Int64Atomics is not allowed by Vulkan 1.0 specification (or requires extension) |
| 4 | OpCapability Int64Atomics |
| 5 | |
John Kessenich | 2b5ea9f | 2018-01-31 18:35:56 -0700 | [diff] [blame] | 6 | // Module Version 10000 |
John Kessenich | d6c9755 | 2018-06-04 15:33:31 -0600 | [diff] [blame] | 7 | // Generated by (magic number): 80007 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 8 | // Id's are bound by 149 |
| 9 | |
| 10 | Capability Shader |
| 11 | Capability Int64 |
| 12 | Capability Int64Atomics |
| 13 | 1: ExtInstImport "GLSL.std.450" |
| 14 | MemoryModel Logical GLSL450 |
| 15 | EntryPoint GLCompute 4 "main" |
| 16 | ExecutionMode 4 LocalSize 16 16 1 |
| 17 | Source GLSL 450 |
| 18 | SourceExtension "GL_ARB_gpu_shader_int64" |
| 19 | SourceExtension "GL_NV_shader_atomic_int64" |
| 20 | Name 4 "main" |
| 21 | Name 8 "i64" |
| 22 | Name 12 "u64" |
| 23 | Name 14 "Buffer" |
| 24 | MemberName 14(Buffer) 0 "i64" |
| 25 | MemberName 14(Buffer) 1 "u64" |
| 26 | Name 16 "buf" |
| 27 | Name 84 "Struct" |
| 28 | MemberName 84(Struct) 0 "i64" |
| 29 | MemberName 84(Struct) 1 "u64" |
| 30 | Name 86 "s" |
| 31 | MemberDecorate 14(Buffer) 0 Offset 0 |
| 32 | MemberDecorate 14(Buffer) 1 Offset 8 |
| 33 | Decorate 14(Buffer) BufferBlock |
| 34 | Decorate 16(buf) DescriptorSet 0 |
| 35 | Decorate 16(buf) Binding 0 |
| 36 | Decorate 148 BuiltIn WorkgroupSize |
| 37 | 2: TypeVoid |
| 38 | 3: TypeFunction 2 |
| 39 | 6: TypeInt 64 1 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 40 | 7: TypePointer Function 6(int64_t) |
| 41 | 9: 6(int64_t) Constant 0 0 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 42 | 10: TypeInt 64 0 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 43 | 11: TypePointer Function 10(int64_t) |
| 44 | 13: 10(int64_t) Constant 0 0 |
| 45 | 14(Buffer): TypeStruct 6(int64_t) 10(int64_t) |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 46 | 15: TypePointer Uniform 14(Buffer) |
| 47 | 16(buf): 15(ptr) Variable Uniform |
| 48 | 17: TypeInt 32 1 |
| 49 | 18: 17(int) Constant 0 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 50 | 19: TypePointer Uniform 6(int64_t) |
| 51 | 21: 6(int64_t) Constant 4294967272 4294967295 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 52 | 22: TypeInt 32 0 |
| 53 | 23: 22(int) Constant 1 |
| 54 | 24: 22(int) Constant 0 |
| 55 | 28: 17(int) Constant 1 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 56 | 29: TypePointer Uniform 10(int64_t) |
| 57 | 31: 10(int64_t) Constant 15 240 |
| 58 | 84(Struct): TypeStruct 6(int64_t) 10(int64_t) |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 59 | 85: TypePointer Workgroup 84(Struct) |
| 60 | 86(s): 85(ptr) Variable Workgroup |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 61 | 87: TypePointer Workgroup 6(int64_t) |
| 62 | 92: TypePointer Workgroup 10(int64_t) |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 63 | 146: TypeVector 22(int) 3 |
| 64 | 147: 22(int) Constant 16 |
| 65 | 148: 146(ivec3) ConstantComposite 147 147 23 |
| 66 | 4(main): 2 Function None 3 |
| 67 | 5: Label |
| 68 | 8(i64): 7(ptr) Variable Function |
| 69 | 12(u64): 11(ptr) Variable Function |
| 70 | Store 8(i64) 9 |
| 71 | Store 12(u64) 13 |
| 72 | 20: 19(ptr) AccessChain 16(buf) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 73 | 25: 6(int64_t) AtomicSMin 20 23 24 21 |
| 74 | 26: 6(int64_t) Load 8(i64) |
| 75 | 27: 6(int64_t) IAdd 26 25 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 76 | Store 8(i64) 27 |
| 77 | 30: 29(ptr) AccessChain 16(buf) 28 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 78 | 32: 10(int64_t) AtomicUMin 30 23 24 31 |
| 79 | 33: 10(int64_t) Load 12(u64) |
| 80 | 34: 10(int64_t) IAdd 33 32 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 81 | Store 12(u64) 34 |
| 82 | 35: 19(ptr) AccessChain 16(buf) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 83 | 36: 6(int64_t) AtomicSMax 35 23 24 21 |
| 84 | 37: 6(int64_t) Load 8(i64) |
| 85 | 38: 6(int64_t) IAdd 37 36 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 86 | Store 8(i64) 38 |
| 87 | 39: 29(ptr) AccessChain 16(buf) 28 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 88 | 40: 10(int64_t) AtomicUMax 39 23 24 31 |
| 89 | 41: 10(int64_t) Load 12(u64) |
| 90 | 42: 10(int64_t) IAdd 41 40 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 91 | Store 12(u64) 42 |
| 92 | 43: 19(ptr) AccessChain 16(buf) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 93 | 44: 6(int64_t) AtomicAnd 43 23 24 21 |
| 94 | 45: 6(int64_t) Load 8(i64) |
| 95 | 46: 6(int64_t) IAdd 45 44 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 96 | Store 8(i64) 46 |
| 97 | 47: 29(ptr) AccessChain 16(buf) 28 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 98 | 48: 10(int64_t) AtomicAnd 47 23 24 31 |
| 99 | 49: 10(int64_t) Load 12(u64) |
| 100 | 50: 10(int64_t) IAdd 49 48 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 101 | Store 12(u64) 50 |
| 102 | 51: 19(ptr) AccessChain 16(buf) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 103 | 52: 6(int64_t) AtomicOr 51 23 24 21 |
| 104 | 53: 6(int64_t) Load 8(i64) |
| 105 | 54: 6(int64_t) IAdd 53 52 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 106 | Store 8(i64) 54 |
| 107 | 55: 29(ptr) AccessChain 16(buf) 28 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 108 | 56: 10(int64_t) AtomicOr 55 23 24 31 |
| 109 | 57: 10(int64_t) Load 12(u64) |
| 110 | 58: 10(int64_t) IAdd 57 56 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 111 | Store 12(u64) 58 |
| 112 | 59: 19(ptr) AccessChain 16(buf) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 113 | 60: 6(int64_t) AtomicXor 59 23 24 21 |
| 114 | 61: 6(int64_t) Load 8(i64) |
| 115 | 62: 6(int64_t) IAdd 61 60 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 116 | Store 8(i64) 62 |
| 117 | 63: 29(ptr) AccessChain 16(buf) 28 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 118 | 64: 10(int64_t) AtomicXor 63 23 24 31 |
| 119 | 65: 10(int64_t) Load 12(u64) |
| 120 | 66: 10(int64_t) IAdd 65 64 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 121 | Store 12(u64) 66 |
| 122 | 67: 19(ptr) AccessChain 16(buf) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 123 | 68: 6(int64_t) AtomicIAdd 67 23 24 21 |
| 124 | 69: 6(int64_t) Load 8(i64) |
| 125 | 70: 6(int64_t) IAdd 69 68 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 126 | Store 8(i64) 70 |
| 127 | 71: 19(ptr) AccessChain 16(buf) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 128 | 72: 6(int64_t) AtomicExchange 71 23 24 21 |
| 129 | 73: 6(int64_t) Load 8(i64) |
| 130 | 74: 6(int64_t) IAdd 73 72 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 131 | Store 8(i64) 74 |
| 132 | 75: 19(ptr) AccessChain 16(buf) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 133 | 76: 6(int64_t) Load 8(i64) |
| 134 | 77: 6(int64_t) AtomicCompareExchange 75 23 24 24 76 21 |
| 135 | 78: 6(int64_t) Load 8(i64) |
| 136 | 79: 6(int64_t) IAdd 78 77 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 137 | Store 8(i64) 79 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 138 | 80: 6(int64_t) Load 8(i64) |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 139 | 81: 19(ptr) AccessChain 16(buf) 18 |
| 140 | Store 81 80 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 141 | 82: 10(int64_t) Load 12(u64) |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 142 | 83: 29(ptr) AccessChain 16(buf) 28 |
| 143 | Store 83 82 |
| 144 | Store 8(i64) 9 |
| 145 | Store 12(u64) 13 |
| 146 | 88: 87(ptr) AccessChain 86(s) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 147 | 89: 6(int64_t) AtomicSMin 88 23 24 21 |
| 148 | 90: 6(int64_t) Load 8(i64) |
| 149 | 91: 6(int64_t) IAdd 90 89 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 150 | Store 8(i64) 91 |
| 151 | 93: 92(ptr) AccessChain 86(s) 28 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 152 | 94: 10(int64_t) AtomicUMin 93 23 24 31 |
| 153 | 95: 10(int64_t) Load 12(u64) |
| 154 | 96: 10(int64_t) IAdd 95 94 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 155 | Store 12(u64) 96 |
| 156 | 97: 87(ptr) AccessChain 86(s) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 157 | 98: 6(int64_t) AtomicSMax 97 23 24 21 |
| 158 | 99: 6(int64_t) Load 8(i64) |
| 159 | 100: 6(int64_t) IAdd 99 98 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 160 | Store 8(i64) 100 |
| 161 | 101: 92(ptr) AccessChain 86(s) 28 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 162 | 102: 10(int64_t) AtomicUMax 101 23 24 31 |
| 163 | 103: 10(int64_t) Load 12(u64) |
| 164 | 104: 10(int64_t) IAdd 103 102 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 165 | Store 12(u64) 104 |
| 166 | 105: 87(ptr) AccessChain 86(s) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 167 | 106: 6(int64_t) AtomicAnd 105 23 24 21 |
| 168 | 107: 6(int64_t) Load 8(i64) |
| 169 | 108: 6(int64_t) IAdd 107 106 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 170 | Store 8(i64) 108 |
| 171 | 109: 92(ptr) AccessChain 86(s) 28 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 172 | 110: 10(int64_t) AtomicAnd 109 23 24 31 |
| 173 | 111: 10(int64_t) Load 12(u64) |
| 174 | 112: 10(int64_t) IAdd 111 110 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 175 | Store 12(u64) 112 |
| 176 | 113: 87(ptr) AccessChain 86(s) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 177 | 114: 6(int64_t) AtomicOr 113 23 24 21 |
| 178 | 115: 6(int64_t) Load 8(i64) |
| 179 | 116: 6(int64_t) IAdd 115 114 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 180 | Store 8(i64) 116 |
| 181 | 117: 92(ptr) AccessChain 86(s) 28 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 182 | 118: 10(int64_t) AtomicOr 117 23 24 31 |
| 183 | 119: 10(int64_t) Load 12(u64) |
| 184 | 120: 10(int64_t) IAdd 119 118 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 185 | Store 12(u64) 120 |
| 186 | 121: 87(ptr) AccessChain 86(s) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 187 | 122: 6(int64_t) AtomicXor 121 23 24 21 |
| 188 | 123: 6(int64_t) Load 8(i64) |
| 189 | 124: 6(int64_t) IAdd 123 122 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 190 | Store 8(i64) 124 |
| 191 | 125: 92(ptr) AccessChain 86(s) 28 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 192 | 126: 10(int64_t) AtomicXor 125 23 24 31 |
| 193 | 127: 10(int64_t) Load 12(u64) |
| 194 | 128: 10(int64_t) IAdd 127 126 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 195 | Store 12(u64) 128 |
| 196 | 129: 87(ptr) AccessChain 86(s) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 197 | 130: 6(int64_t) AtomicIAdd 129 23 24 21 |
| 198 | 131: 6(int64_t) Load 8(i64) |
| 199 | 132: 6(int64_t) IAdd 131 130 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 200 | Store 8(i64) 132 |
| 201 | 133: 87(ptr) AccessChain 86(s) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 202 | 134: 6(int64_t) AtomicExchange 133 23 24 21 |
| 203 | 135: 6(int64_t) Load 8(i64) |
| 204 | 136: 6(int64_t) IAdd 135 134 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 205 | Store 8(i64) 136 |
| 206 | 137: 87(ptr) AccessChain 86(s) 18 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 207 | 138: 6(int64_t) Load 8(i64) |
| 208 | 139: 6(int64_t) AtomicCompareExchange 137 23 24 24 138 21 |
| 209 | 140: 6(int64_t) Load 8(i64) |
| 210 | 141: 6(int64_t) IAdd 140 139 |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 211 | Store 8(i64) 141 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 212 | 142: 6(int64_t) Load 8(i64) |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 213 | 143: 87(ptr) AccessChain 86(s) 18 |
| 214 | Store 143 142 |
Jeff Bolz | af7a948 | 2018-05-22 23:13:30 -0500 | [diff] [blame] | 215 | 144: 10(int64_t) Load 12(u64) |
Rex Xu | e8fe8b0 | 2017-09-26 15:42:56 +0800 | [diff] [blame] | 216 | 145: 92(ptr) AccessChain 86(s) 28 |
| 217 | Store 145 144 |
| 218 | Return |
| 219 | FunctionEnd |