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gerrit-public.fairphone.software / platform / external / ethtool / 7f1cc44e84cdd9f3ad7024f466bdeb3243620b07 / . / smsc911x.c
blob: c55b97bbd84d57e6bc206d74d3795b7543c26087 [file] [log] [blame]
Steve Glendinninga5f8ce22007-07-16 20:04:40 +0100[diff] [blame]1#include <stdio.h>
2#include <string.h>
Ben Hutchings5ba70c02011-11-01 16:48:31 +0000[diff] [blame]3#include "internal.h"
Steve Glendinninga5f8ce22007-07-16 20:04:40 +0100[diff] [blame]4
5int smsc911x_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs)
6{
7 unsigned int *smsc_reg = (unsigned int *)regs->data;
8
9 fprintf(stdout, "LAN911x Registers\n");
10 fprintf(stdout, "offset 0x50, ID_REV = 0x%08X\n",*smsc_reg++);
11 fprintf(stdout, "offset 0x54, INT_CFG = 0x%08X\n",*smsc_reg++);
12 fprintf(stdout, "offset 0x58, INT_STS = 0x%08X\n",*smsc_reg++);
13 fprintf(stdout, "offset 0x5C, INT_EN = 0x%08X\n",*smsc_reg++);
14 fprintf(stdout, "offset 0x60, RESERVED = 0x%08X\n",*smsc_reg++);
15 fprintf(stdout, "offset 0x64, BYTE_TEST = 0x%08X\n",*smsc_reg++);
16 fprintf(stdout, "offset 0x68, FIFO_INT = 0x%08X\n",*smsc_reg++);
17 fprintf(stdout, "offset 0x6C, RX_CFG = 0x%08X\n",*smsc_reg++);
18 fprintf(stdout, "offset 0x70, TX_CFG = 0x%08X\n",*smsc_reg++);
19 fprintf(stdout, "offset 0x74, HW_CFG = 0x%08X\n",*smsc_reg++);
20 fprintf(stdout, "offset 0x78, RX_DP_CTRL = 0x%08X\n",*smsc_reg++);
21 fprintf(stdout, "offset 0x7C, RX_FIFO_INF = 0x%08X\n",*smsc_reg++);
22 fprintf(stdout, "offset 0x80, TX_FIFO_INF = 0x%08X\n",*smsc_reg++);
23 fprintf(stdout, "offset 0x84, PMT_CTRL = 0x%08X\n",*smsc_reg++);
24 fprintf(stdout, "offset 0x88, GPIO_CFG = 0x%08X\n",*smsc_reg++);
25 fprintf(stdout, "offset 0x8C, GPT_CFG = 0x%08X\n",*smsc_reg++);
26 fprintf(stdout, "offset 0x90, GPT_CNT = 0x%08X\n",*smsc_reg++);
27 fprintf(stdout, "offset 0x94, FPGA_REV = 0x%08X\n",*smsc_reg++);
28 fprintf(stdout, "offset 0x98, ENDIAN = 0x%08X\n",*smsc_reg++);
29 fprintf(stdout, "offset 0x9C, FREE_RUN = 0x%08X\n",*smsc_reg++);
30 fprintf(stdout, "offset 0xA0, RX_DROP = 0x%08X\n",*smsc_reg++);
31 fprintf(stdout, "offset 0xA4, MAC_CSR_CMD = 0x%08X\n",*smsc_reg++);
32 fprintf(stdout, "offset 0xA8, MAC_CSR_DATA = 0x%08X\n",*smsc_reg++);
33 fprintf(stdout, "offset 0xAC, AFC_CFG = 0x%08X\n",*smsc_reg++);
34 fprintf(stdout, "offset 0xB0, E2P_CMD = 0x%08X\n",*smsc_reg++);
35 fprintf(stdout, "offset 0xB4, E2P_DATA = 0x%08X\n",*smsc_reg++);
36 fprintf(stdout, "\n");
37
38 fprintf(stdout, "MAC Registers\n");
39 fprintf(stdout, "index 1, MAC_CR = 0x%08X\n",*smsc_reg++);
40 fprintf(stdout, "index 2, ADDRH = 0x%08X\n",*smsc_reg++);
41 fprintf(stdout, "index 3, ADDRL = 0x%08X\n",*smsc_reg++);
42 fprintf(stdout, "index 4, HASHH = 0x%08X\n",*smsc_reg++);
43 fprintf(stdout, "index 5, HASHL = 0x%08X\n",*smsc_reg++);
44 fprintf(stdout, "index 6, MII_ACC = 0x%08X\n",*smsc_reg++);
45 fprintf(stdout, "index 7, MII_DATA = 0x%08X\n",*smsc_reg++);
46 fprintf(stdout, "index 8, FLOW = 0x%08X\n",*smsc_reg++);
47 fprintf(stdout, "index 9, VLAN1 = 0x%08X\n",*smsc_reg++);
48 fprintf(stdout, "index A, VLAN2 = 0x%08X\n",*smsc_reg++);
49 fprintf(stdout, "index B, WUFF = 0x%08X\n",*smsc_reg++);
50 fprintf(stdout, "index C, WUCSR = 0x%08X\n",*smsc_reg++);
51 fprintf(stdout, "\n");
52
53 fprintf(stdout, "PHY Registers\n");
54 fprintf(stdout, "index 0, Basic Control Reg = 0x%04X\n",*smsc_reg++);
55 fprintf(stdout, "index 1, Basic Status Reg = 0x%04X\n",*smsc_reg++);
56 fprintf(stdout, "index 2, PHY identifier 1 = 0x%04X\n",*smsc_reg++);
57 fprintf(stdout, "index 3, PHY identifier 2 = 0x%04X\n",*smsc_reg++);
58 fprintf(stdout, "index 4, Auto Negotiation Advertisement Reg = 0x%04X\n",*smsc_reg++);
59 fprintf(stdout, "index 5, Auto Negotiation Link Partner Ability Reg = 0x%04X\n",*smsc_reg++);
60 fprintf(stdout, "index 6, Auto Negotiation Expansion Register = 0x%04X\n",*smsc_reg++);
61 fprintf(stdout, "index 7, Reserved = 0x%04X\n",*smsc_reg++);
62 fprintf(stdout, "index 8, Reserved = 0x%04X\n",*smsc_reg++);
63 fprintf(stdout, "index 9, Reserved = 0x%04X\n",*smsc_reg++);
64 fprintf(stdout, "index 10, Reserved = 0x%04X\n",*smsc_reg++);
65 fprintf(stdout, "index 11, Reserved = 0x%04X\n",*smsc_reg++);
66 fprintf(stdout, "index 12, Reserved = 0x%04X\n",*smsc_reg++);
67 fprintf(stdout, "index 13, Reserved = 0x%04X\n",*smsc_reg++);
68 fprintf(stdout, "index 14, Reserved = 0x%04X\n",*smsc_reg++);
69 fprintf(stdout, "index 15, Reserved = 0x%04X\n",*smsc_reg++);
70 fprintf(stdout, "index 16, Silicon Revision Reg = 0x%04X\n",*smsc_reg++);
71 fprintf(stdout, "index 17, Mode Control/Status Reg = 0x%04X\n",*smsc_reg++);
72 fprintf(stdout, "index 18, Special Modes = 0x%04X\n",*smsc_reg++);
73 fprintf(stdout, "index 19, Reserved = 0x%04X\n",*smsc_reg++);
74 fprintf(stdout, "index 20, TSTCNTL = 0x%04X\n",*smsc_reg++);
75 fprintf(stdout, "index 21, TSTREAD1 = 0x%04X\n",*smsc_reg++);
76 fprintf(stdout, "index 22, TSTREAD2 = 0x%04X\n",*smsc_reg++);
77 fprintf(stdout, "index 23, TSTWRITE = 0x%04X\n",*smsc_reg++);
78 fprintf(stdout, "index 24, Reserved = 0x%04X\n",*smsc_reg++);
79 fprintf(stdout, "index 25, Reserved = 0x%04X\n",*smsc_reg++);
80 fprintf(stdout, "index 26, Reserved = 0x%04X\n",*smsc_reg++);
81 fprintf(stdout, "index 27, Control/Status Indication = 0x%04X\n",*smsc_reg++);
82 fprintf(stdout, "index 28, Special internal testability = 0x%04X\n",*smsc_reg++);
83 fprintf(stdout, "index 29, Interrupt Source Register = 0x%04X\n",*smsc_reg++);
84 fprintf(stdout, "index 30, Interrupt Mask Register = 0x%04X\n",*smsc_reg++);
85 fprintf(stdout, "index 31, PHY Special Control/Status Register = 0x%04X\n",*smsc_reg++);
86 fprintf(stdout, "\n");
Jeff Garzikba2f54b2007-07-26 13:24:59 -0400[diff] [blame]87
Steve Glendinninga5f8ce22007-07-16 20:04:40 +0100[diff] [blame]88 return 0;
89}
90