| Taku Izumi | acc3d3a | 2016-11-16 09:55:32 +0900 | [diff] [blame] | 1 | /* Copyright (c) 2016 FUJITSU LIMITED */ |
| 2 | #include <stdio.h> |
| 3 | #include "internal.h" |
| 4 | |
| Maciej Żenczykowski | 5e814f2 | 2019-10-17 11:21:20 -0700 | [diff] [blame] | 5 | int fjes_dump_regs(struct ethtool_drvinfo *info maybe_unused, |
| 6 | struct ethtool_regs *regs) |
| Taku Izumi | acc3d3a | 2016-11-16 09:55:32 +0900 | [diff] [blame] | 7 | { |
| 8 | u32 *regs_buff = (u32 *)regs->data; |
| 9 | |
| 10 | if (regs->version != 1) |
| 11 | return -1; |
| 12 | |
| 13 | /* Information registers */ |
| 14 | fprintf(stdout, |
| 15 | "0x0000: OWNER_EPID (Owner EPID) 0x%08X\n", |
| 16 | regs_buff[0]); |
| 17 | |
| 18 | fprintf(stdout, |
| 19 | "0x0004: MAX_EP (Maximum EP) 0x%08X\n", |
| 20 | regs_buff[1]); |
| 21 | |
| 22 | /* Device Control registers */ |
| 23 | fprintf(stdout, |
| 24 | "0x0010: DCTL (Device Control) 0x%08X\n", |
| 25 | regs_buff[4]); |
| 26 | |
| 27 | /* Command Control registers */ |
| 28 | fprintf(stdout, |
| 29 | "0x0020: CR (Command request) 0x%08X\n", |
| 30 | regs_buff[8]); |
| 31 | |
| 32 | fprintf(stdout, |
| 33 | "0x0024: CS (Command status) 0x%08X\n", |
| 34 | regs_buff[9]); |
| 35 | |
| 36 | fprintf(stdout, |
| 37 | "0x0028: SHSTSAL (Share status address Low) 0x%08X\n", |
| 38 | regs_buff[10]); |
| 39 | |
| 40 | fprintf(stdout, |
| 41 | "0x002C: SHSTSAH (Share status address High) 0x%08X\n", |
| 42 | regs_buff[11]); |
| 43 | |
| 44 | fprintf(stdout, |
| 45 | "0x0034: REQBL (Request Buffer length) 0x%08X\n", |
| 46 | regs_buff[13]); |
| 47 | |
| 48 | fprintf(stdout, |
| 49 | "0x0038: REQBAL (Request Buffer Address Low) 0x%08X\n", |
| 50 | regs_buff[14]); |
| 51 | |
| 52 | fprintf(stdout, |
| 53 | "0x003C: REQBAH (Request Buffer Address High) 0x%08X\n", |
| 54 | regs_buff[15]); |
| 55 | |
| 56 | fprintf(stdout, |
| 57 | "0x0044: RESPBL (Response Buffer Length) 0x%08X\n", |
| 58 | regs_buff[17]); |
| 59 | |
| 60 | fprintf(stdout, |
| 61 | "0x0048: RESPBAL (Response Buffer Address Low) 0x%08X\n", |
| 62 | regs_buff[18]); |
| 63 | |
| 64 | fprintf(stdout, |
| 65 | "0x004C: RESPBAH (Response Buffer Address High) 0x%08X\n", |
| 66 | regs_buff[19]); |
| 67 | |
| 68 | /* Interrupt Control registers */ |
| 69 | fprintf(stdout, |
| 70 | "0x0080: IS (Interrupt status) 0x%08X\n", |
| 71 | regs_buff[32]); |
| 72 | |
| 73 | fprintf(stdout, |
| 74 | "0x0084: IMS (Interrupt mask set) 0x%08X\n", |
| 75 | regs_buff[33]); |
| 76 | |
| 77 | fprintf(stdout, |
| 78 | "0x0088: IMC (Interrupt mask clear) 0x%08X\n", |
| 79 | regs_buff[34]); |
| 80 | |
| 81 | fprintf(stdout, |
| 82 | "0x008C: IG (Interrupt generator) 0x%08X\n", |
| 83 | regs_buff[35]); |
| 84 | |
| 85 | fprintf(stdout, |
| 86 | "0x0090: ICTL (Interrupt control) 0x%08X\n", |
| 87 | regs_buff[36]); |
| 88 | |
| 89 | return 0; |
| 90 | } |