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gerrit-public.fairphone.software / platform / external / ethtool / refs/heads/odm/rc/qssi/13/fp4 / . / et131x.c
blob: 1b0607177e6d9f3ec06d80d442e9c6966bb06108 [file] [log] [blame]
Mark Einon08f7d492012-10-30 21:57:23 +0000[diff] [blame]1#include <stdio.h>
2#include <string.h>
3#include "internal.h"
4
Maciej Żenczykowski1c301192019-10-17 11:21:17 -0700[diff] [blame]5int et131x_dump_regs(struct ethtool_drvinfo *info maybe_unused,
6 struct ethtool_regs *regs)
Mark Einon08f7d492012-10-30 21:57:23 +0000[diff] [blame]7{
Mark Einonff83cec2013-01-05 09:57:31 +0000[diff] [blame]8 u8 version = (u8)(regs->version >> 24);
Mark Einon08f7d492012-10-30 21:57:23 +0000[diff] [blame]9 u32 *reg = (u32 *)regs->data;
10
Mark Einonfd215652013-01-22 21:04:50 +0000[diff] [blame]11 if (version != 1)
Mark Einonff83cec2013-01-05 09:57:31 +0000[diff] [blame]12 return -1;
13
Mark Einon08f7d492012-10-30 21:57:23 +0000[diff] [blame]14 fprintf(stdout, "PHY Registers\n");
15 fprintf(stdout, "0x0, Basic Control Reg = 0x%04X\n", *reg++);
16 fprintf(stdout, "0x1, Basic Status Reg = 0x%04X\n", *reg++);
17 fprintf(stdout, "0x2, PHY identifier 1 = 0x%04X\n", *reg++);
18 fprintf(stdout, "0x3, PHY identifier 2 = 0x%04X\n", *reg++);
19 fprintf(stdout, "0x4, Auto Neg Advertisement = 0x%04X\n", *reg++);
20 fprintf(stdout, "0x5, Auto Neg L Partner Ability = 0x%04X\n", *reg++);
21 fprintf(stdout, "0x6, Auto Neg Expansion = 0x%04X\n", *reg++);
22 fprintf(stdout, "0x7, Reserved = 0x%04X\n", *reg++);
23 fprintf(stdout, "0x8, Reserved = 0x%04X\n", *reg++);
24 fprintf(stdout, "0x9, 1000T Control = 0x%04X\n", *reg++);
25 fprintf(stdout, "0xA, 1000T Status = 0x%04X\n", *reg++);
26 fprintf(stdout, "0xB, Reserved = 0x%04X\n", *reg++);
27 fprintf(stdout, "0xC, Reserved = 0x%04X\n", *reg++);
28 fprintf(stdout, "0xD, MMD Access Control = 0x%04X\n", *reg++);
29 fprintf(stdout, "0xE, MMD access Data = 0x%04X\n", *reg++);
30 fprintf(stdout, "0xF, Extended Status = 0x%04X\n", *reg++);
31 fprintf(stdout, "0x10, Phy Index = 0x%04X\n", *reg++);
32 fprintf(stdout, "0x11, Phy Data = 0x%04X\n", *reg++);
33 fprintf(stdout, "0x12, MPhy Control = 0x%04X\n", *reg++);
34 fprintf(stdout, "0x13, Phy Loopback Control1 = 0x%04X\n", *reg++);
35 fprintf(stdout, "0x14, Phy Loopback Control2 = 0x%04X\n", *reg++);
36 fprintf(stdout, "0x15, Register Management = 0x%04X\n", *reg++);
37 fprintf(stdout, "0x16, Phy Config = 0x%04X\n", *reg++);
38 fprintf(stdout, "0x17, Phy Phy Control = 0x%04X\n", *reg++);
39 fprintf(stdout, "0x18, Phy Interrupt Mask = 0x%04X\n", *reg++);
40 fprintf(stdout, "0x19, Phy Interrupt Status = 0x%04X\n", *reg++);
41 fprintf(stdout, "0x1A, Phy Phy Status = 0x%04X\n", *reg++);
42 fprintf(stdout, "0x1B, Phy LED1 = 0x%04X\n", *reg++);
43 fprintf(stdout, "0x1C, Phy LED2 = 0x%04X\n", *reg++);
44 fprintf(stdout, "\n");
45
46 fprintf(stdout, "JAGCore Global Registers\n");
47 fprintf(stdout, "0x0, TXQ Start Address = 0x%04X\n", *reg++);
48 fprintf(stdout, "0x1, TXQ End Address = 0x%04X\n", *reg++);
49 fprintf(stdout, "0x2, RXQ Start Address = 0x%04X\n", *reg++);
50 fprintf(stdout, "0x3, RXQ End Address = 0x%04X\n", *reg++);
51 fprintf(stdout, "0x4, Power Management Status = 0x%04X\n", *reg++);
52 fprintf(stdout, "0x5, Interrupt Status = 0x%04X\n", *reg++);
53 fprintf(stdout, "0x6, Interrupt Mask = 0x%04X\n", *reg++);
54 fprintf(stdout, "0x7, Int Alias Clear Mask = 0x%04X\n", *reg++);
55 fprintf(stdout, "0x8, Int Status Alias = 0x%04X\n", *reg++);
56 fprintf(stdout, "0x9, Software Reset = 0x%04X\n", *reg++);
57 fprintf(stdout, "0xA, SLV Timer = 0x%04X\n", *reg++);
58 fprintf(stdout, "0xB, MSI Config = 0x%04X\n", *reg++);
59 fprintf(stdout, "0xC, Loopback = 0x%04X\n", *reg++);
60 fprintf(stdout, "0xD, Watchdog Timer = 0x%04X\n", *reg++);
61 fprintf(stdout, "\n");
62
63 fprintf(stdout, "TXDMA Registers\n");
64 fprintf(stdout, "0x0, Control Status = 0x%04X\n", *reg++);
65 fprintf(stdout, "0x1, Packet Ring Base Addr (Hi) = 0x%04X\n", *reg++);
66 fprintf(stdout, "0x2, Packet Ring Base Addr (Lo) = 0x%04X\n", *reg++);
67 fprintf(stdout, "0x3, Packet Ring Num Descrs = 0x%04X\n", *reg++);
68 fprintf(stdout, "0x4, TX Queue Write Address = 0x%04X\n", *reg++);
69 fprintf(stdout, "0x5, TX Queue Write Address Ext = 0x%04X\n", *reg++);
70 fprintf(stdout, "0x6, TX Queue Read Address = 0x%04X\n", *reg++);
71 fprintf(stdout, "0x7, Status Writeback Addr (Hi) = 0x%04X\n", *reg++);
72 fprintf(stdout, "0x8, Status Writeback Addr (Lo) = 0x%04X\n", *reg++);
73 fprintf(stdout, "0x9, Service Request = 0x%04X\n", *reg++);
74 fprintf(stdout, "0xA, Service Complete = 0x%04X\n", *reg++);
75 fprintf(stdout, "0xB, Cache Read Index = 0x%04X\n", *reg++);
76 fprintf(stdout, "0xC, Cache Write Index = 0x%04X\n", *reg++);
77 fprintf(stdout, "0xD, TXDMA Error = 0x%04X\n", *reg++);
78 fprintf(stdout, "0xE, Descriptor Abort Count = 0x%04X\n", *reg++);
79 fprintf(stdout, "0xF, Payload Abort Count = 0x%04X\n", *reg++);
80 fprintf(stdout, "0x10, Writeback Abort Count = 0x%04X\n", *reg++);
81 fprintf(stdout, "0x11, Descriptor Timeout Count = 0x%04X\n", *reg++);
82 fprintf(stdout, "0x12, Payload Timeout Count = 0x%04X\n", *reg++);
83 fprintf(stdout, "0x13, Writeback Timeout Count = 0x%04X\n", *reg++);
84 fprintf(stdout, "0x14, Descriptor Error Count = 0x%04X\n", *reg++);
85 fprintf(stdout, "0x15, Payload Error Count = 0x%04X\n", *reg++);
86 fprintf(stdout, "0x16, Writeback Error Count = 0x%04X\n", *reg++);
87 fprintf(stdout, "0x17, Dropped TLP Count = 0x%04X\n", *reg++);
88 fprintf(stdout, "0x18, New service Complete = 0x%04X\n", *reg++);
89 fprintf(stdout, "0x1A, Ethernet Packet Count = 0x%04X\n", *reg++);
90 fprintf(stdout, "\n");
91
92 fprintf(stdout, "RXDMA Registers\n");
93 fprintf(stdout, "0x0, Control Status = 0x%04X\n", *reg++);
94 fprintf(stdout, "0x1, Writeback Addr (Hi) = 0x%04X\n", *reg++);
95 fprintf(stdout, "0x2, Writeback Addr (Lo) = 0x%04X\n", *reg++);
96 fprintf(stdout, "0x3, Num Packets Done = 0x%04X\n", *reg++);
97 fprintf(stdout, "0x4, Max Packet Time = 0x%04X\n", *reg++);
98 fprintf(stdout, "0x5, RX Queue Read Addr = 0x%04X\n", *reg++);
99 fprintf(stdout, "0x6, RX Queue Read Address Ext = 0x%04X\n", *reg++);
100 fprintf(stdout, "0x7, RX Queue Write Addr = 0x%04X\n", *reg++);
101 fprintf(stdout, "0x8, Packet Ring Base Addr (Hi) = 0x%04X\n", *reg++);
102 fprintf(stdout, "0x9, Packet Ring Base Addr (Lo) = 0x%04X\n", *reg++);
103 fprintf(stdout, "0xA, Packet Ring Num Descrs = 0x%04X\n", *reg++);
104 fprintf(stdout, "0xE, Packet Ring Avail Offset = 0x%04X\n", *reg++);
105 fprintf(stdout, "0xF, Packet Ring Full Offset = 0x%04X\n", *reg++);
106 fprintf(stdout, "0x10, Packet Ring Access Index = 0x%04X\n", *reg++);
107 fprintf(stdout, "0x11, Packet Ring Min Descrip = 0x%04X\n", *reg++);
108 fprintf(stdout, "0x12, FBR0 Address (Lo) = 0x%04X\n", *reg++);
109 fprintf(stdout, "0x13, FBR0 Address (Hi) = 0x%04X\n", *reg++);
110 fprintf(stdout, "0x14, FBR0 Num Descriptors = 0x%04X\n", *reg++);
111 fprintf(stdout, "0x15, FBR0 Available Offset = 0x%04X\n", *reg++);
112 fprintf(stdout, "0x16, FBR0 Full Offset = 0x%04X\n", *reg++);
113 fprintf(stdout, "0x17, FBR0 Read Index = 0x%04X\n", *reg++);
114 fprintf(stdout, "0x18, FBR0 Minimum Descriptors = 0x%04X\n", *reg++);
115 fprintf(stdout, "0x19, FBR1 Address (Lo) = 0x%04X\n", *reg++);
116 fprintf(stdout, "0x1A, FBR1 Address (Hi) = 0x%04X\n", *reg++);
117 fprintf(stdout, "0x1B, FBR1 Num Descriptors = 0x%04X\n", *reg++);
118 fprintf(stdout, "0x1C, FBR1 Available Offset = 0x%04X\n", *reg++);
119 fprintf(stdout, "0x1D, FBR1 Full Offset = 0x%04X\n", *reg++);
120 fprintf(stdout, "0x1E, FBR1 Read Index = 0x%04X\n", *reg++);
121 fprintf(stdout, "0x1F, FBR1 Minimum Descriptors = 0x%04X\n", *reg++);
122 fprintf(stdout, "\n");
123 return 0;
124}