Jesse Barnes | bbafc3d | 2009-06-18 18:07:47 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2009 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
| 21 | * IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Eric Anholt <eric@anholt.net> |
| 25 | * |
| 26 | */ |
| 27 | |
| 28 | /** @file gem_tiled_blits.c |
| 29 | * |
| 30 | * This is a test of doing many tiled blits, with a working set |
| 31 | * larger than the aperture size. |
| 32 | * |
| 33 | * The goal is to catch a couple types of failure; |
| 34 | * - Fence management problems on pre-965. |
| 35 | * - A17 or L-shaped memory tiling workaround problems in acceleration. |
| 36 | * |
| 37 | * The model is to fill a collection of 1MB objects in a way that can't trip |
| 38 | * over A6 swizzling -- upload data to a non-tiled object, blit to the tiled |
| 39 | * object. Then, copy the 1MB objects randomly between each other for a while. |
| 40 | * Finally, download their data through linear objects again and see what |
| 41 | * resulted. |
| 42 | */ |
| 43 | |
| 44 | #include <stdlib.h> |
| 45 | #include <stdio.h> |
| 46 | #include <string.h> |
Jesse Barnes | bbafc3d | 2009-06-18 18:07:47 -0700 | [diff] [blame] | 47 | #include <fcntl.h> |
| 48 | #include <inttypes.h> |
| 49 | #include <errno.h> |
| 50 | #include <sys/stat.h> |
| 51 | #include <sys/time.h> |
| 52 | #include "drm.h" |
Daniel Vetter | e49ceb8 | 2014-03-22 21:07:37 +0100 | [diff] [blame] | 53 | #include "ioctl_wrappers.h" |
Jesse Barnes | bbafc3d | 2009-06-18 18:07:47 -0700 | [diff] [blame] | 54 | #include "drmtest.h" |
| 55 | #include "intel_bufmgr.h" |
| 56 | #include "intel_batchbuffer.h" |
Daniel Vetter | e49ceb8 | 2014-03-22 21:07:37 +0100 | [diff] [blame] | 57 | #include "intel_chipset.h" |
Daniel Vetter | c03c6ce | 2014-03-22 21:34:29 +0100 | [diff] [blame] | 58 | #include "intel_io.h" |
Jesse Barnes | bbafc3d | 2009-06-18 18:07:47 -0700 | [diff] [blame] | 59 | |
| 60 | static drm_intel_bufmgr *bufmgr; |
| 61 | struct intel_batchbuffer *batch; |
| 62 | |
| 63 | #define BAD_GTT_DEST ((256*1024*1024)) /* past end of aperture */ |
| 64 | |
| 65 | static void |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 66 | bad_blit(drm_intel_bo *src_bo, uint32_t devid) |
Jesse Barnes | bbafc3d | 2009-06-18 18:07:47 -0700 | [diff] [blame] | 67 | { |
| 68 | uint32_t src_pitch = 512, dst_pitch = 512; |
| 69 | uint32_t cmd_bits = 0; |
| 70 | |
| 71 | if (IS_965(devid)) { |
| 72 | src_pitch /= 4; |
| 73 | cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED; |
| 74 | } |
| 75 | |
| 76 | if (IS_965(devid)) { |
| 77 | dst_pitch /= 4; |
| 78 | cmd_bits |= XY_SRC_COPY_BLT_DST_TILED; |
| 79 | } |
| 80 | |
Chris Wilson | 10552b5 | 2014-08-30 11:44:51 +0100 | [diff] [blame^] | 81 | BLIT_COPY_BATCH_START(cmd_bits); |
Jesse Barnes | bbafc3d | 2009-06-18 18:07:47 -0700 | [diff] [blame] | 82 | OUT_BATCH((3 << 24) | /* 32 bits */ |
| 83 | (0xcc << 16) | /* copy ROP */ |
| 84 | dst_pitch); |
| 85 | OUT_BATCH(0); /* dst x1,y1 */ |
| 86 | OUT_BATCH((64 << 16) | 64); /* 64x64 blit */ |
| 87 | OUT_BATCH(BAD_GTT_DEST); |
| 88 | OUT_BATCH(0); /* src x1,y1 */ |
| 89 | OUT_BATCH(src_pitch); |
Chris Wilson | 982f7eb | 2014-08-29 15:19:57 +0100 | [diff] [blame] | 90 | OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); |
Jesse Barnes | bbafc3d | 2009-06-18 18:07:47 -0700 | [diff] [blame] | 91 | ADVANCE_BATCH(); |
| 92 | |
| 93 | intel_batchbuffer_flush(batch); |
| 94 | } |
| 95 | |
Tim Gore | 8abca6f | 2014-06-20 11:28:12 +0100 | [diff] [blame] | 96 | igt_simple_main |
Jesse Barnes | bbafc3d | 2009-06-18 18:07:47 -0700 | [diff] [blame] | 97 | { |
| 98 | drm_intel_bo *src; |
| 99 | int fd; |
| 100 | |
| 101 | fd = drm_open_any(); |
Jesse Barnes | bbafc3d | 2009-06-18 18:07:47 -0700 | [diff] [blame] | 102 | |
| 103 | bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); |
| 104 | drm_intel_bufmgr_gem_enable_reuse(bufmgr); |
Chris Wilson | d4d769a | 2010-10-26 10:59:18 +0100 | [diff] [blame] | 105 | batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); |
Jesse Barnes | bbafc3d | 2009-06-18 18:07:47 -0700 | [diff] [blame] | 106 | |
| 107 | src = drm_intel_bo_alloc(bufmgr, "src", 128 * 128, 4096); |
| 108 | |
Chris Wilson | d4d769a | 2010-10-26 10:59:18 +0100 | [diff] [blame] | 109 | bad_blit(src, batch->devid); |
Jesse Barnes | bbafc3d | 2009-06-18 18:07:47 -0700 | [diff] [blame] | 110 | |
| 111 | intel_batchbuffer_free(batch); |
| 112 | drm_intel_bufmgr_destroy(bufmgr); |
| 113 | |
| 114 | close(fd); |
Jesse Barnes | bbafc3d | 2009-06-18 18:07:47 -0700 | [diff] [blame] | 115 | } |