Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2011 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
| 21 | * IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Daniel Vetter <daniel.vetter@ffwll.ch> |
| 25 | * |
| 26 | */ |
| 27 | |
Thomas Wood | 804e11f | 2015-08-17 17:57:43 +0100 | [diff] [blame] | 28 | #include "igt.h" |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 29 | #include <stdlib.h> |
| 30 | #include <stdio.h> |
| 31 | #include <string.h> |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 32 | #include <fcntl.h> |
| 33 | #include <inttypes.h> |
| 34 | #include <errno.h> |
| 35 | #include <sys/stat.h> |
| 36 | #include <sys/time.h> |
Daniel Vetter | f5daeec | 2014-03-23 13:35:09 +0100 | [diff] [blame] | 37 | |
| 38 | #include <drm.h> |
| 39 | |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 40 | |
Thomas Wood | b2ac264 | 2014-11-28 11:02:44 +0000 | [diff] [blame] | 41 | IGT_TEST_DESCRIPTION("Test pwrite/pread consistency when touching partial" |
| 42 | " cachelines."); |
| 43 | |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 44 | /* |
| 45 | * Testcase: pwrite/pread consistency when touching partial cachelines |
| 46 | * |
| 47 | * Some fancy new pwrite/pread optimizations clflush in-line while |
| 48 | * reading/writing. Check whether all required clflushes happen. |
| 49 | * |
| 50 | */ |
| 51 | |
| 52 | static drm_intel_bufmgr *bufmgr; |
| 53 | struct intel_batchbuffer *batch; |
| 54 | |
| 55 | drm_intel_bo *scratch_bo; |
| 56 | drm_intel_bo *staging_bo; |
| 57 | #define BO_SIZE (4*4096) |
| 58 | uint32_t devid; |
Daniel Vetter | d75d69d | 2012-01-15 18:32:11 +0100 | [diff] [blame] | 59 | uint64_t mappable_gtt_limit; |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 60 | int fd; |
| 61 | |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 62 | static void |
| 63 | copy_bo(drm_intel_bo *src, drm_intel_bo *dst) |
| 64 | { |
Chris Wilson | 10552b5 | 2014-08-30 11:44:51 +0100 | [diff] [blame] | 65 | BLIT_COPY_BATCH_START(0); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 66 | OUT_BATCH((3 << 24) | /* 32 bits */ |
| 67 | (0xcc << 16) | /* copy ROP */ |
| 68 | 4096); |
| 69 | OUT_BATCH(0 << 16 | 0); |
| 70 | OUT_BATCH((BO_SIZE/4096) << 16 | 1024); |
| 71 | OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); |
| 72 | OUT_BATCH(0 << 16 | 0); |
| 73 | OUT_BATCH(4096); |
| 74 | OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0); |
| 75 | ADVANCE_BATCH(); |
| 76 | |
| 77 | intel_batchbuffer_flush(batch); |
| 78 | } |
| 79 | |
| 80 | static void |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 81 | blt_bo_fill(drm_intel_bo *tmp_bo, drm_intel_bo *bo, uint8_t val) |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 82 | { |
| 83 | uint8_t *gtt_ptr; |
| 84 | int i; |
| 85 | |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 86 | do_or_die(drm_intel_gem_bo_map_gtt(tmp_bo)); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 87 | gtt_ptr = tmp_bo->virtual; |
| 88 | |
| 89 | for (i = 0; i < BO_SIZE; i++) |
| 90 | gtt_ptr[i] = val; |
| 91 | |
| 92 | drm_intel_gem_bo_unmap_gtt(tmp_bo); |
| 93 | |
Daniel Vetter | d75d69d | 2012-01-15 18:32:11 +0100 | [diff] [blame] | 94 | if (bo->offset < mappable_gtt_limit && |
Daniel Vetter | ff409c5 | 2011-12-06 16:57:53 +0100 | [diff] [blame] | 95 | (IS_G33(devid) || intel_gen(devid) >= 4)) |
Daniel Vetter | 1caaf0a | 2013-08-12 12:17:35 +0200 | [diff] [blame] | 96 | igt_trash_aperture(); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 97 | |
| 98 | copy_bo(tmp_bo, bo); |
| 99 | } |
| 100 | |
| 101 | #define MAX_BLT_SIZE 128 |
Daniel Vetter | 36a40a5 | 2012-01-31 13:52:59 +0100 | [diff] [blame] | 102 | #define ROUNDS 1000 |
Daniel Vetter | 1a55ca7 | 2012-11-28 12:47:26 +0100 | [diff] [blame] | 103 | uint8_t tmp[BO_SIZE]; |
| 104 | |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 105 | static void get_range(int *start, int *len) |
| 106 | { |
| 107 | *start = random() % (BO_SIZE - 1); |
| 108 | *len = random() % (BO_SIZE - *start - 1) + 1; |
| 109 | } |
| 110 | |
Daniel Vetter | 1a55ca7 | 2012-11-28 12:47:26 +0100 | [diff] [blame] | 111 | static void test_partial_reads(void) |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 112 | { |
| 113 | int i, j; |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 114 | |
Daniel Vetter | e624fa8 | 2014-05-14 00:36:04 +0200 | [diff] [blame] | 115 | igt_info("checking partial reads\n"); |
Daniel Vetter | 36a40a5 | 2012-01-31 13:52:59 +0100 | [diff] [blame] | 116 | for (i = 0; i < ROUNDS; i++) { |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 117 | uint8_t val = i; |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 118 | int start, len; |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 119 | |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 120 | blt_bo_fill(staging_bo, scratch_bo, val); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 121 | |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 122 | get_range(&start, &len); |
| 123 | do_or_die(drm_intel_bo_get_subdata(scratch_bo, start, len, tmp)); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 124 | for (j = 0; j < len; j++) { |
Daniel Vetter | f3c54d0 | 2013-09-25 14:36:59 +0200 | [diff] [blame] | 125 | igt_assert_f(tmp[j] == val, |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 126 | "mismatch at %i [%i + %i], got: %i, expected: %i\n", |
| 127 | j, start, len, tmp[j], val); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 128 | } |
Daniel Vetter | 36a40a5 | 2012-01-31 13:52:59 +0100 | [diff] [blame] | 129 | |
Daniel Vetter | 1caaf0a | 2013-08-12 12:17:35 +0200 | [diff] [blame] | 130 | igt_progress("partial reads test: ", i, ROUNDS); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 131 | } |
Daniel Vetter | 1a55ca7 | 2012-11-28 12:47:26 +0100 | [diff] [blame] | 132 | } |
| 133 | |
| 134 | static void test_partial_writes(void) |
| 135 | { |
| 136 | int i, j; |
| 137 | uint8_t *gtt_ptr; |
| 138 | |
Daniel Vetter | e624fa8 | 2014-05-14 00:36:04 +0200 | [diff] [blame] | 139 | igt_info("checking partial writes\n"); |
Daniel Vetter | 36a40a5 | 2012-01-31 13:52:59 +0100 | [diff] [blame] | 140 | for (i = 0; i < ROUNDS; i++) { |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 141 | uint8_t val = i; |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 142 | int start, len; |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 143 | |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 144 | blt_bo_fill(staging_bo, scratch_bo, val); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 145 | |
| 146 | memset(tmp, i + 63, BO_SIZE); |
| 147 | |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 148 | get_range(&start, &len); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 149 | drm_intel_bo_subdata(scratch_bo, start, len, tmp); |
| 150 | |
| 151 | copy_bo(scratch_bo, staging_bo); |
| 152 | drm_intel_gem_bo_map_gtt(staging_bo); |
| 153 | gtt_ptr = staging_bo->virtual; |
| 154 | |
| 155 | for (j = 0; j < start; j++) { |
Daniel Vetter | f3c54d0 | 2013-09-25 14:36:59 +0200 | [diff] [blame] | 156 | igt_assert_f(gtt_ptr[j] == val, |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 157 | "mismatch at %i (start=%i), got: %i, expected: %i\n", |
| 158 | j, start, tmp[j], val); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 159 | } |
| 160 | for (; j < start + len; j++) { |
Daniel Vetter | f3c54d0 | 2013-09-25 14:36:59 +0200 | [diff] [blame] | 161 | igt_assert_f(gtt_ptr[j] == tmp[0], |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 162 | "mismatch at %i (%i/%i), got: %i, expected: %i\n", |
| 163 | j, j-start, len, tmp[j], i); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 164 | } |
| 165 | for (; j < BO_SIZE; j++) { |
Daniel Vetter | f3c54d0 | 2013-09-25 14:36:59 +0200 | [diff] [blame] | 166 | igt_assert_f(gtt_ptr[j] == val, |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 167 | "mismatch at %i (end=%i), got: %i, expected: %i\n", |
| 168 | j, start+len, tmp[j], val); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 169 | } |
| 170 | drm_intel_gem_bo_unmap_gtt(staging_bo); |
Daniel Vetter | 36a40a5 | 2012-01-31 13:52:59 +0100 | [diff] [blame] | 171 | |
Daniel Vetter | 1caaf0a | 2013-08-12 12:17:35 +0200 | [diff] [blame] | 172 | igt_progress("partial writes test: ", i, ROUNDS); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 173 | } |
Daniel Vetter | 1a55ca7 | 2012-11-28 12:47:26 +0100 | [diff] [blame] | 174 | } |
| 175 | |
| 176 | static void test_partial_read_writes(void) |
| 177 | { |
| 178 | int i, j; |
| 179 | uint8_t *gtt_ptr; |
| 180 | |
Daniel Vetter | e624fa8 | 2014-05-14 00:36:04 +0200 | [diff] [blame] | 181 | igt_info("checking partial writes after partial reads\n"); |
Daniel Vetter | 36a40a5 | 2012-01-31 13:52:59 +0100 | [diff] [blame] | 182 | for (i = 0; i < ROUNDS; i++) { |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 183 | uint8_t val = i; |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 184 | int start, len; |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 185 | |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 186 | blt_bo_fill(staging_bo, scratch_bo, val); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 187 | |
| 188 | /* partial read */ |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 189 | get_range(&start, &len); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 190 | drm_intel_bo_get_subdata(scratch_bo, start, len, tmp); |
| 191 | for (j = 0; j < len; j++) { |
Daniel Vetter | f3c54d0 | 2013-09-25 14:36:59 +0200 | [diff] [blame] | 192 | igt_assert_f(tmp[j] == val, |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 193 | "mismatch in read at %i [%i + %i], got: %i, expected: %i\n", |
| 194 | j, start, len, tmp[j], val); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 195 | } |
| 196 | |
| 197 | /* Change contents through gtt to make the pread cachelines |
| 198 | * stale. */ |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 199 | val += 17; |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 200 | blt_bo_fill(staging_bo, scratch_bo, val); |
| 201 | |
| 202 | /* partial write */ |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 203 | memset(tmp, i + 63, BO_SIZE); |
| 204 | |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 205 | get_range(&start, &len); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 206 | drm_intel_bo_subdata(scratch_bo, start, len, tmp); |
| 207 | |
| 208 | copy_bo(scratch_bo, staging_bo); |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 209 | do_or_die(drm_intel_gem_bo_map_gtt(staging_bo)); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 210 | gtt_ptr = staging_bo->virtual; |
| 211 | |
| 212 | for (j = 0; j < start; j++) { |
Daniel Vetter | f3c54d0 | 2013-09-25 14:36:59 +0200 | [diff] [blame] | 213 | igt_assert_f(gtt_ptr[j] == val, |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 214 | "mismatch at %i (start=%i), got: %i, expected: %i\n", |
| 215 | j, start, tmp[j], val); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 216 | } |
| 217 | for (; j < start + len; j++) { |
Daniel Vetter | f3c54d0 | 2013-09-25 14:36:59 +0200 | [diff] [blame] | 218 | igt_assert_f(gtt_ptr[j] == tmp[0], |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 219 | "mismatch at %i (%i/%i), got: %i, expected: %i\n", |
| 220 | j, j - start, len, tmp[j], tmp[0]); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 221 | } |
| 222 | for (; j < BO_SIZE; j++) { |
Daniel Vetter | f3c54d0 | 2013-09-25 14:36:59 +0200 | [diff] [blame] | 223 | igt_assert_f(gtt_ptr[j] == val, |
Chris Wilson | 47b6137 | 2016-01-08 10:40:33 +0000 | [diff] [blame] | 224 | "mismatch at %i (end=%i), got: %i, expected: %i\n", |
| 225 | j, start + len, tmp[j], val); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 226 | } |
| 227 | drm_intel_gem_bo_unmap_gtt(staging_bo); |
Daniel Vetter | 36a40a5 | 2012-01-31 13:52:59 +0100 | [diff] [blame] | 228 | |
Daniel Vetter | 1caaf0a | 2013-08-12 12:17:35 +0200 | [diff] [blame] | 229 | igt_progress("partial read/writes test: ", i, ROUNDS); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 230 | } |
Daniel Vetter | 1a55ca7 | 2012-11-28 12:47:26 +0100 | [diff] [blame] | 231 | } |
| 232 | |
Chris Wilson | a661c09 | 2013-08-06 15:09:50 +0100 | [diff] [blame] | 233 | static void do_tests(int cache_level, const char *suffix) |
| 234 | { |
Daniel Vetter | b3880d3 | 2013-08-14 18:02:46 +0200 | [diff] [blame] | 235 | igt_fixture { |
| 236 | if (cache_level != -1) |
| 237 | gem_set_caching(fd, scratch_bo->handle, cache_level); |
| 238 | } |
Chris Wilson | a661c09 | 2013-08-06 15:09:50 +0100 | [diff] [blame] | 239 | |
Daniel Vetter | 6234658 | 2013-08-14 13:47:47 +0200 | [diff] [blame] | 240 | igt_subtest_f("reads%s", suffix) |
Chris Wilson | a661c09 | 2013-08-06 15:09:50 +0100 | [diff] [blame] | 241 | test_partial_reads(); |
| 242 | |
Daniel Vetter | 6234658 | 2013-08-14 13:47:47 +0200 | [diff] [blame] | 243 | igt_subtest_f("write%s", suffix) |
Chris Wilson | a661c09 | 2013-08-06 15:09:50 +0100 | [diff] [blame] | 244 | test_partial_writes(); |
| 245 | |
Daniel Vetter | 6234658 | 2013-08-14 13:47:47 +0200 | [diff] [blame] | 246 | igt_subtest_f("writes-after-reads%s", suffix) |
Chris Wilson | a661c09 | 2013-08-06 15:09:50 +0100 | [diff] [blame] | 247 | test_partial_read_writes(); |
| 248 | } |
| 249 | |
Daniel Vetter | 071e9ca | 2013-10-31 16:23:26 +0100 | [diff] [blame] | 250 | igt_main |
Daniel Vetter | 1a55ca7 | 2012-11-28 12:47:26 +0100 | [diff] [blame] | 251 | { |
| 252 | srandom(0xdeadbeef); |
| 253 | |
Daniel Vetter | 1caaf0a | 2013-08-12 12:17:35 +0200 | [diff] [blame] | 254 | igt_skip_on_simulation(); |
Daniel Vetter | 046b149 | 2012-11-28 13:08:07 +0100 | [diff] [blame] | 255 | |
Daniel Vetter | b3880d3 | 2013-08-14 18:02:46 +0200 | [diff] [blame] | 256 | igt_fixture { |
Micah Fedke | c81d293 | 2015-07-22 21:54:02 +0000 | [diff] [blame] | 257 | fd = drm_open_driver(DRIVER_INTEL); |
Daniel Vetter | 1a55ca7 | 2012-11-28 12:47:26 +0100 | [diff] [blame] | 258 | |
Daniel Vetter | b3880d3 | 2013-08-14 18:02:46 +0200 | [diff] [blame] | 259 | bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); |
| 260 | //drm_intel_bufmgr_gem_enable_reuse(bufmgr); |
| 261 | devid = intel_get_drm_devid(fd); |
| 262 | batch = intel_batchbuffer_alloc(bufmgr, devid); |
Daniel Vetter | 1a55ca7 | 2012-11-28 12:47:26 +0100 | [diff] [blame] | 263 | |
Daniel Vetter | b3880d3 | 2013-08-14 18:02:46 +0200 | [diff] [blame] | 264 | /* overallocate the buffers we're actually using because */ |
| 265 | scratch_bo = drm_intel_bo_alloc(bufmgr, "scratch bo", BO_SIZE, 4096); |
| 266 | staging_bo = drm_intel_bo_alloc(bufmgr, "staging bo", BO_SIZE, 4096); |
Daniel Vetter | 1a55ca7 | 2012-11-28 12:47:26 +0100 | [diff] [blame] | 267 | |
Daniel Vetter | b3880d3 | 2013-08-14 18:02:46 +0200 | [diff] [blame] | 268 | igt_init_aperture_trashers(bufmgr); |
| 269 | mappable_gtt_limit = gem_mappable_aperture_size(); |
| 270 | } |
Daniel Vetter | 1a55ca7 | 2012-11-28 12:47:26 +0100 | [diff] [blame] | 271 | |
Chris Wilson | a661c09 | 2013-08-06 15:09:50 +0100 | [diff] [blame] | 272 | do_tests(-1, ""); |
Daniel Vetter | 1a55ca7 | 2012-11-28 12:47:26 +0100 | [diff] [blame] | 273 | |
Chris Wilson | a661c09 | 2013-08-06 15:09:50 +0100 | [diff] [blame] | 274 | /* Repeat the tests using different levels of snooping */ |
| 275 | do_tests(0, "-uncached"); |
| 276 | do_tests(1, "-snoop"); |
Chris Wilson | 467796a | 2013-08-10 15:49:33 +0100 | [diff] [blame] | 277 | do_tests(2, "-display"); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 278 | |
Daniel Vetter | b3880d3 | 2013-08-14 18:02:46 +0200 | [diff] [blame] | 279 | igt_fixture { |
| 280 | igt_cleanup_aperture_trashers(); |
| 281 | drm_intel_bufmgr_destroy(bufmgr); |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 282 | |
Daniel Vetter | b3880d3 | 2013-08-14 18:02:46 +0200 | [diff] [blame] | 283 | close(fd); |
| 284 | } |
Daniel Vetter | 5a851b1 | 2011-12-04 21:42:31 +0100 | [diff] [blame] | 285 | } |