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Damien Lespiau4ca1a042013-01-19 00:30:18 +00001/*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
Damien Lespiau3ee58082013-01-19 11:51:08 +00005
Damien Lespiau4ca1a042013-01-19 00:30:18 +00006 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
Damien Lespiau3ee58082013-01-19 11:51:08 +000013
Damien Lespiau4ca1a042013-01-19 00:30:18 +000014 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
Damien Lespiau3ee58082013-01-19 11:51:08 +000017
Damien Lespiau4ca1a042013-01-19 00:30:18 +000018 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Damien Lespiau3ee58082013-01-19 11:51:08 +000025
Damien Lespiau4ca1a042013-01-19 00:30:18 +000026 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
Damien Lespiau3ee58082013-01-19 11:51:08 +000031
Damien Lespiau4ca1a042013-01-19 00:30:18 +000032
33#ifndef BRW_EU_H
34#define BRW_EU_H
35
36#include <stdbool.h>
Damien Lespiau609a8452013-01-19 17:05:48 +000037#include "brw_context.h"
Damien Lespiau4ca1a042013-01-19 00:30:18 +000038#include "brw_structs.h"
39#include "brw_defines.h"
40#include "brw_reg.h"
41
42#ifdef __cplusplus
43extern "C" {
44#endif
45
46#define BRW_EU_MAX_INSN_STACK 5
47
48struct brw_compile {
49 struct brw_instruction *store;
50 int store_size;
51 GLuint nr_insn;
52 unsigned int next_insn_offset;
53
54 void *mem_ctx;
55
56 /* Allow clients to push/pop instruction state:
57 */
58 struct brw_instruction stack[BRW_EU_MAX_INSN_STACK];
59 bool compressed_stack[BRW_EU_MAX_INSN_STACK];
60 struct brw_instruction *current;
61
62 GLuint flag_value;
63 bool single_program_flow;
64 bool compressed;
65 struct brw_context *brw;
66
67 /* Control flow stacks:
68 * - if_stack contains IF and ELSE instructions which must be patched
69 * (and popped) once the matching ENDIF instruction is encountered.
70 *
71 * Just store the instruction pointer(an index).
72 */
73 int *if_stack;
74 int if_stack_depth;
75 int if_stack_array_size;
76
77 /**
78 * loop_stack contains the instruction pointers of the starts of loops which
79 * must be patched (and popped) once the matching WHILE instruction is
80 * encountered.
81 */
82 int *loop_stack;
83 /**
84 * pre-gen6, the BREAK and CONT instructions had to tell how many IF/ENDIF
85 * blocks they were popping out of, to fix up the mask stack. This tracks
86 * the IF/ENDIF nesting in each current nested loop level.
87 */
88 int *if_depth_in_loop;
89 int loop_stack_depth;
90 int loop_stack_array_size;
91};
92
93static inline struct brw_instruction *current_insn( struct brw_compile *p)
94{
95 return &p->store[p->nr_insn];
96}
97
98void brw_pop_insn_state( struct brw_compile *p );
99void brw_push_insn_state( struct brw_compile *p );
100void brw_set_mask_control( struct brw_compile *p, GLuint value );
101void brw_set_saturate( struct brw_compile *p, bool enable );
102void brw_set_access_mode( struct brw_compile *p, GLuint access_mode );
103void brw_set_compression_control(struct brw_compile *p, enum brw_compression c);
104void brw_set_predicate_control_flag_value( struct brw_compile *p, GLuint value );
105void brw_set_predicate_control( struct brw_compile *p, GLuint pc );
106void brw_set_predicate_inverse(struct brw_compile *p, bool predicate_inverse);
107void brw_set_conditionalmod( struct brw_compile *p, GLuint conditional );
108void brw_set_flag_reg(struct brw_compile *p, int reg, int subreg);
109void brw_set_acc_write_control(struct brw_compile *p, GLuint value);
110
111void brw_init_compile(struct brw_context *, struct brw_compile *p,
112 void *mem_ctx);
113void brw_dump_compile(struct brw_compile *p, FILE *out, int start, int end);
114const GLuint *brw_get_program( struct brw_compile *p, GLuint *sz );
115
116struct brw_instruction *brw_next_insn(struct brw_compile *p, GLuint opcode);
117void brw_set_dest(struct brw_compile *p, struct brw_instruction *insn,
118 struct brw_reg dest);
119void brw_set_src0(struct brw_compile *p, struct brw_instruction *insn,
120 struct brw_reg reg);
121
122void gen6_resolve_implied_move(struct brw_compile *p,
123 struct brw_reg *src,
124 GLuint msg_reg_nr);
125
126/* Helpers for regular instructions:
127 */
128#define ALU1(OP) \
129struct brw_instruction *brw_##OP(struct brw_compile *p, \
130 struct brw_reg dest, \
131 struct brw_reg src0);
132
133#define ALU2(OP) \
134struct brw_instruction *brw_##OP(struct brw_compile *p, \
135 struct brw_reg dest, \
136 struct brw_reg src0, \
137 struct brw_reg src1);
138
139#define ALU3(OP) \
140struct brw_instruction *brw_##OP(struct brw_compile *p, \
141 struct brw_reg dest, \
142 struct brw_reg src0, \
143 struct brw_reg src1, \
144 struct brw_reg src2);
145
146#define ROUND(OP) \
147void brw_##OP(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0);
148
149ALU1(MOV)
150ALU2(SEL)
151ALU1(NOT)
152ALU2(AND)
153ALU2(OR)
154ALU2(XOR)
155ALU2(SHR)
156ALU2(SHL)
157ALU2(RSR)
158ALU2(RSL)
159ALU2(ASR)
160ALU2(JMPI)
161ALU2(ADD)
162ALU2(AVG)
163ALU2(MUL)
164ALU1(FRC)
165ALU1(RNDD)
166ALU2(MAC)
167ALU2(MACH)
168ALU1(LZD)
169ALU2(DP4)
170ALU2(DPH)
171ALU2(DP3)
172ALU2(DP2)
173ALU2(LINE)
174ALU2(PLN)
175ALU3(MAD)
176
177ROUND(RNDZ)
178ROUND(RNDE)
179
180#undef ALU1
181#undef ALU2
182#undef ALU3
183#undef ROUND
184
185
186/* Helpers for SEND instruction:
187 */
188void brw_set_sampler_message(struct brw_compile *p,
189 struct brw_instruction *insn,
190 GLuint binding_table_index,
191 GLuint sampler,
192 GLuint msg_type,
193 GLuint response_length,
194 GLuint msg_length,
195 GLuint header_present,
196 GLuint simd_mode,
197 GLuint return_format);
198
199void brw_set_dp_read_message(struct brw_compile *p,
200 struct brw_instruction *insn,
201 GLuint binding_table_index,
202 GLuint msg_control,
203 GLuint msg_type,
204 GLuint target_cache,
205 GLuint msg_length,
206 bool header_present,
207 GLuint response_length);
208
209void brw_set_dp_write_message(struct brw_compile *p,
210 struct brw_instruction *insn,
211 GLuint binding_table_index,
212 GLuint msg_control,
213 GLuint msg_type,
214 GLuint msg_length,
215 bool header_present,
216 GLuint last_render_target,
217 GLuint response_length,
218 GLuint end_of_thread,
219 GLuint send_commit_msg);
220
221void brw_urb_WRITE(struct brw_compile *p,
222 struct brw_reg dest,
223 GLuint msg_reg_nr,
224 struct brw_reg src0,
225 bool allocate,
226 bool used,
227 GLuint msg_length,
228 GLuint response_length,
229 bool eot,
230 bool writes_complete,
231 GLuint offset,
232 GLuint swizzle);
233
234void brw_ff_sync(struct brw_compile *p,
235 struct brw_reg dest,
236 GLuint msg_reg_nr,
237 struct brw_reg src0,
238 bool allocate,
239 GLuint response_length,
240 bool eot);
241
242void brw_svb_write(struct brw_compile *p,
243 struct brw_reg dest,
244 GLuint msg_reg_nr,
245 struct brw_reg src0,
246 GLuint binding_table_index,
247 bool send_commit_msg);
248
249void brw_fb_WRITE(struct brw_compile *p,
250 int dispatch_width,
251 GLuint msg_reg_nr,
252 struct brw_reg src0,
253 GLuint msg_control,
254 GLuint binding_table_index,
255 GLuint msg_length,
256 GLuint response_length,
257 bool eot,
258 bool header_present);
259
260void brw_SAMPLE(struct brw_compile *p,
261 struct brw_reg dest,
262 GLuint msg_reg_nr,
263 struct brw_reg src0,
264 GLuint binding_table_index,
265 GLuint sampler,
266 GLuint writemask,
267 GLuint msg_type,
268 GLuint response_length,
269 GLuint msg_length,
270 GLuint header_present,
271 GLuint simd_mode,
272 GLuint return_format);
273
274void brw_math( struct brw_compile *p,
275 struct brw_reg dest,
276 GLuint function,
277 GLuint msg_reg_nr,
278 struct brw_reg src,
279 GLuint data_type,
280 GLuint precision );
281
282void brw_math2(struct brw_compile *p,
283 struct brw_reg dest,
284 GLuint function,
285 struct brw_reg src0,
286 struct brw_reg src1);
287
288void brw_oword_block_read(struct brw_compile *p,
289 struct brw_reg dest,
290 struct brw_reg mrf,
291 uint32_t offset,
292 uint32_t bind_table_index);
293
294void brw_oword_block_read_scratch(struct brw_compile *p,
295 struct brw_reg dest,
296 struct brw_reg mrf,
297 int num_regs,
298 GLuint offset);
299
300void brw_oword_block_write_scratch(struct brw_compile *p,
301 struct brw_reg mrf,
302 int num_regs,
303 GLuint offset);
304
305void brw_shader_time_add(struct brw_compile *p,
306 int mrf,
307 uint32_t surf_index);
308
309/* If/else/endif. Works by manipulating the execution flags on each
310 * channel.
311 */
Damien Lespiau3ee58082013-01-19 11:51:08 +0000312struct brw_instruction *brw_IF(struct brw_compile *p,
Damien Lespiau4ca1a042013-01-19 00:30:18 +0000313 GLuint execute_size);
314struct brw_instruction *gen6_IF(struct brw_compile *p, uint32_t conditional,
315 struct brw_reg src0, struct brw_reg src1);
316
317void brw_ELSE(struct brw_compile *p);
318void brw_ENDIF(struct brw_compile *p);
319
320/* DO/WHILE loops:
321 */
322struct brw_instruction *brw_DO(struct brw_compile *p,
323 GLuint execute_size);
324
325struct brw_instruction *brw_WHILE(struct brw_compile *p);
326
327struct brw_instruction *brw_BREAK(struct brw_compile *p);
328struct brw_instruction *brw_CONT(struct brw_compile *p);
329struct brw_instruction *gen6_CONT(struct brw_compile *p);
330struct brw_instruction *gen6_HALT(struct brw_compile *p);
331/* Forward jumps:
332 */
333void brw_land_fwd_jump(struct brw_compile *p, int jmp_insn_idx);
334
335
336
337void brw_NOP(struct brw_compile *p);
338
339void brw_WAIT(struct brw_compile *p);
340
341/* Special case: there is never a destination, execution size will be
342 * taken from src0:
343 */
344void brw_CMP(struct brw_compile *p,
345 struct brw_reg dest,
346 GLuint conditional,
347 struct brw_reg src0,
348 struct brw_reg src1);
349
Damien Lespiau3ee58082013-01-19 11:51:08 +0000350/***********************************************************************
Damien Lespiau4ca1a042013-01-19 00:30:18 +0000351 * brw_eu_util.c:
352 */
353
354void brw_copy_indirect_to_indirect(struct brw_compile *p,
355 struct brw_indirect dst_ptr,
356 struct brw_indirect src_ptr,
357 GLuint count);
358
359void brw_copy_from_indirect(struct brw_compile *p,
360 struct brw_reg dst,
361 struct brw_indirect ptr,
362 GLuint count);
363
364void brw_copy4(struct brw_compile *p,
365 struct brw_reg dst,
366 struct brw_reg src,
367 GLuint count);
368
369void brw_copy8(struct brw_compile *p,
370 struct brw_reg dst,
371 struct brw_reg src,
372 GLuint count);
373
Damien Lespiau3ee58082013-01-19 11:51:08 +0000374void brw_math_invert( struct brw_compile *p,
Damien Lespiau4ca1a042013-01-19 00:30:18 +0000375 struct brw_reg dst,
376 struct brw_reg src);
377
378void brw_set_src1(struct brw_compile *p,
379 struct brw_instruction *insn,
380 struct brw_reg reg);
381
382void brw_set_uip_jip(struct brw_compile *p);
383
384uint32_t brw_swap_cmod(uint32_t cmod);
385
386/* brw_optimize.c */
387void brw_optimize(struct brw_compile *p);
388void brw_remove_duplicate_mrf_moves(struct brw_compile *p);
389void brw_remove_grf_to_mrf_moves(struct brw_compile *p);
390
391/* brw_disasm.c */
392struct opcode_desc {
393 char *name;
394 int nsrc;
395 int ndst;
396};
397
398extern const struct opcode_desc opcode_descs[128];
399
400int brw_disasm (FILE *file, struct brw_instruction *inst, int gen);
401
402#ifdef __cplusplus
403}
404#endif
405
406#endif