blob: 0e96e79783367bc91ef09ac708f1474e19460277 [file] [log] [blame]
Chris Wilson20b69032011-06-05 11:20:34 +01001/*
2 * Copyright © 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Chris Wilson <chris@chris-wilson.co.uk>
25 *
26 */
27
28/** @file gen3_linear_render_blits.c
29 *
30 * This is a test of doing many blits, with a working set
31 * larger than the aperture size.
32 *
33 * The goal is to simply ensure the basics work.
34 */
35
36#include <stdlib.h>
37#include <stdio.h>
38#include <string.h>
39#include <assert.h>
40#include <fcntl.h>
41#include <inttypes.h>
42#include <errno.h>
43#include <sys/stat.h>
44#include <sys/time.h>
45#include <sys/mman.h>
46#include <sys/ioctl.h>
47#include "drm.h"
48#include "i915_drm.h"
49#include "drmtest.h"
50#include "intel_gpu_tools.h"
51
52#include "i915_reg.h"
53#include "i915_3d.h"
54
55#define WIDTH 512
56#define HEIGHT 512
57
58static inline uint32_t pack_float(float f)
59{
60 union {
61 uint32_t dw;
62 float f;
63 } u;
64 u.f = f;
65 return u.dw;
66}
67
Chris Wilson20b69032011-06-05 11:20:34 +010068static uint32_t fill_reloc(struct drm_i915_gem_relocation_entry *reloc,
69 uint32_t offset,
70 uint32_t handle,
71 uint32_t read_domain,
72 uint32_t write_domain)
73{
74 reloc->target_handle = handle;
75 reloc->delta = 0;
76 reloc->offset = offset * sizeof(uint32_t);
77 reloc->presumed_offset = 0;
78 reloc->read_domains = read_domain;
79 reloc->write_domain = write_domain;
80
81 return reloc->presumed_offset + reloc->delta;
82}
83
84static void
85copy(int fd, uint32_t dst, uint32_t src)
86{
87 uint32_t batch[1024], *b = batch;
88 struct drm_i915_gem_relocation_entry reloc[2], *r = reloc;
89 struct drm_i915_gem_exec_object2 obj[3];
90 struct drm_i915_gem_execbuffer2 exec;
91 uint32_t handle;
92 int ret;
93
94 /* invariant state */
95 *b++ = (_3DSTATE_AA_CMD |
96 AA_LINE_ECAAR_WIDTH_ENABLE |
97 AA_LINE_ECAAR_WIDTH_1_0 |
98 AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0);
99 *b++ = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
100 IAB_MODIFY_ENABLE |
101 IAB_MODIFY_FUNC | (BLENDFUNC_ADD << IAB_FUNC_SHIFT) |
102 IAB_MODIFY_SRC_FACTOR | (BLENDFACT_ONE <<
103 IAB_SRC_FACTOR_SHIFT) |
104 IAB_MODIFY_DST_FACTOR | (BLENDFACT_ZERO <<
105 IAB_DST_FACTOR_SHIFT));
106 *b++ = (_3DSTATE_DFLT_DIFFUSE_CMD);
107 *b++ = (0);
108 *b++ = (_3DSTATE_DFLT_SPEC_CMD);
109 *b++ = (0);
110 *b++ = (_3DSTATE_DFLT_Z_CMD);
111 *b++ = (0);
112 *b++ = (_3DSTATE_COORD_SET_BINDINGS |
113 CSB_TCB(0, 0) |
114 CSB_TCB(1, 1) |
115 CSB_TCB(2, 2) |
116 CSB_TCB(3, 3) |
117 CSB_TCB(4, 4) |
118 CSB_TCB(5, 5) | CSB_TCB(6, 6) | CSB_TCB(7, 7));
119 *b++ = (_3DSTATE_RASTER_RULES_CMD |
120 ENABLE_POINT_RASTER_RULE |
121 OGL_POINT_RASTER_RULE |
122 ENABLE_LINE_STRIP_PROVOKE_VRTX |
123 ENABLE_TRI_FAN_PROVOKE_VRTX |
124 LINE_STRIP_PROVOKE_VRTX(1) |
125 TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D);
126 *b++ = (_3DSTATE_MODES_4_CMD |
127 ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) |
128 ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) |
129 ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff));
130 *b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) | I1_LOAD_S(5) | 2);
131 *b++ = (0x00000000); /* Disable texture coordinate wrap-shortest */
132 *b++ = ((1 << S4_POINT_WIDTH_SHIFT) |
133 S4_LINE_WIDTH_ONE |
134 S4_CULLMODE_NONE |
135 S4_VFMT_XY);
136 *b++ = (0x00000000); /* Stencil. */
137 *b++ = (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
138 *b++ = (_3DSTATE_SCISSOR_RECT_0_CMD);
139 *b++ = (0);
140 *b++ = (0);
141 *b++ = (_3DSTATE_DEPTH_SUBRECT_DISABLE);
142 *b++ = (_3DSTATE_LOAD_INDIRECT | 0); /* disable indirect state */
143 *b++ = (0);
144 *b++ = (_3DSTATE_STIPPLE);
145 *b++ = (0x00000000);
146 *b++ = (_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0);
147
148 /* samler state */
149#define TEX_COUNT 1
150 *b++ = (_3DSTATE_MAP_STATE | (3 * TEX_COUNT));
151 *b++ = ((1 << TEX_COUNT) - 1);
152 *b = fill_reloc(r++, b-batch, src, I915_GEM_DOMAIN_SAMPLER, 0); b++;
153 *b++ = (MAPSURF_32BIT | MT_32BIT_ARGB8888 |
154 MS3_TILED_SURFACE |
155 (HEIGHT - 1) << MS3_HEIGHT_SHIFT |
156 (WIDTH - 1) << MS3_WIDTH_SHIFT);
157 *b++ = ((WIDTH-1) << MS4_PITCH_SHIFT);
158
159 *b++ = (_3DSTATE_SAMPLER_STATE | (3 * TEX_COUNT));
160 *b++ = ((1 << TEX_COUNT) - 1);
161 *b++ = (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT |
162 FILTER_NEAREST << SS2_MAG_FILTER_SHIFT |
163 FILTER_NEAREST << SS2_MIN_FILTER_SHIFT);
164 *b++ = (TEXCOORDMODE_WRAP << SS3_TCX_ADDR_MODE_SHIFT |
165 TEXCOORDMODE_WRAP << SS3_TCY_ADDR_MODE_SHIFT |
166 0 << SS3_TEXTUREMAP_INDEX_SHIFT);
167 *b++ = (0x00000000);
168
169 /* render target state */
170 *b++ = (_3DSTATE_BUF_INFO_CMD);
171 *b++ = (BUF_3D_ID_COLOR_BACK | BUF_3D_TILED_SURFACE | WIDTH*4);
172 *b = fill_reloc(r++, b-batch, dst,
173 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER);
174 b++;
175
176 *b++ = (_3DSTATE_DST_BUF_VARS_CMD);
177 *b++ = (COLR_BUF_ARGB8888 |
178 DSTORG_HORT_BIAS(0x8) |
179 DSTORG_VERT_BIAS(0x8));
180
181 /* draw rect is unconditional */
182 *b++ = (_3DSTATE_DRAW_RECT_CMD);
183 *b++ = (0x00000000);
184 *b++ = (0x00000000); /* ymin, xmin */
185 *b++ = (DRAW_YMAX(HEIGHT - 1) |
186 DRAW_XMAX(WIDTH - 1));
187 /* yorig, xorig (relate to color buffer?) */
188 *b++ = (0x00000000);
189
190 /* texfmt */
191 *b++ = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(1) | I1_LOAD_S(2) | I1_LOAD_S(6) | 2);
192 *b++ = ((4 << S1_VERTEX_WIDTH_SHIFT) | (4 << S1_VERTEX_PITCH_SHIFT));
193 *b++ = (~S2_TEXCOORD_FMT(0, TEXCOORDFMT_NOT_PRESENT) |
194 S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D));
195 *b++ = (S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE |
196 BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT |
197 BLENDFACT_ONE << S6_CBUF_SRC_BLEND_FACT_SHIFT |
198 BLENDFACT_ZERO << S6_CBUF_DST_BLEND_FACT_SHIFT);
199
200 /* pixel shader */
201 *b++ = (_3DSTATE_PIXEL_SHADER_PROGRAM | (1 + 3*3 - 2));
202 /* decl FS_T0 */
203 *b++ = (D0_DCL |
204 REG_TYPE(FS_T0) << D0_TYPE_SHIFT |
205 REG_NR(FS_T0) << D0_NR_SHIFT |
206 ((REG_TYPE(FS_T0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0));
207 *b++ = (0);
208 *b++ = (0);
209 /* decl FS_S0 */
210 *b++ = (D0_DCL |
211 (REG_TYPE(FS_S0) << D0_TYPE_SHIFT) |
212 (REG_NR(FS_S0) << D0_NR_SHIFT) |
213 ((REG_TYPE(FS_S0) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0));
214 *b++ = (0);
215 *b++ = (0);
216 /* texld(FS_OC, FS_S0, FS_T0 */
217 *b++ = (T0_TEXLD |
218 (REG_TYPE(FS_OC) << T0_DEST_TYPE_SHIFT) |
219 (REG_NR(FS_OC) << T0_DEST_NR_SHIFT) |
220 (REG_NR(FS_S0) << T0_SAMPLER_NR_SHIFT));
221 *b++ = ((REG_TYPE(FS_T0) << T1_ADDRESS_REG_TYPE_SHIFT) |
222 (REG_NR(FS_T0) << T1_ADDRESS_REG_NR_SHIFT));
223 *b++ = (0);
224
225 *b++ = (PRIM3D_RECTLIST | (3*4 - 1));
226 *b++ = pack_float(WIDTH);
227 *b++ = pack_float(HEIGHT);
228 *b++ = pack_float(WIDTH);
229 *b++ = pack_float(HEIGHT);
230
231 *b++ = pack_float(0);
232 *b++ = pack_float(HEIGHT);
233 *b++ = pack_float(0);
234 *b++ = pack_float(HEIGHT);
235
236 *b++ = pack_float(0);
237 *b++ = pack_float(0);
238 *b++ = pack_float(0);
239 *b++ = pack_float(0);
240
241 *b++ = MI_BATCH_BUFFER_END;
242 if ((b - batch) & 1)
243 *b++ = 0;
244
245 assert(b - batch <= 1024);
246 handle = gem_create(fd, 4096);
Daniel Vetter319638b2012-01-10 15:31:11 +0100247 gem_write(fd, handle, 0, batch, (b-batch)*sizeof(batch[0]));
Chris Wilson20b69032011-06-05 11:20:34 +0100248
249 assert(r-reloc == 2);
250
251 obj[0].handle = dst;
252 obj[0].relocation_count = 0;
253 obj[0].relocs_ptr = 0;
254 obj[0].alignment = 0;
255 obj[0].offset = 0;
256 obj[0].flags = 0;
257 obj[0].rsvd1 = 0;
258 obj[0].rsvd2 = 0;
259
260 obj[1].handle = src;
261 obj[1].relocation_count = 0;
262 obj[1].relocs_ptr = 0;
263 obj[1].alignment = 0;
264 obj[1].offset = 0;
265 obj[1].flags = 0;
266 obj[1].rsvd1 = 0;
267 obj[1].rsvd2 = 0;
268
269 obj[2].handle = handle;
270 obj[2].relocation_count = 2;
271 obj[2].relocs_ptr = (uintptr_t)reloc;
272 obj[2].alignment = 0;
273 obj[2].offset = 0;
274 obj[2].flags = 0;
275 obj[2].rsvd1 = obj[2].rsvd2 = 0;
276
277 exec.buffers_ptr = (uintptr_t)obj;
278 exec.buffer_count = 3;
279 exec.batch_start_offset = 0;
280 exec.batch_len = (b-batch)*sizeof(batch[0]);
281 exec.DR1 = exec.DR4 = 0;
282 exec.num_cliprects = 0;
283 exec.cliprects_ptr = 0;
284 exec.flags = 0;
Ben Widawsky5a28ef82012-03-18 18:42:44 -0700285 i915_execbuffer2_set_context_id(exec, 0);
286 exec.rsvd2 = 0;
Chris Wilson20b69032011-06-05 11:20:34 +0100287
288 ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
289 while (ret && errno == EBUSY) {
290 drmCommandNone(fd, DRM_I915_GEM_THROTTLE);
291 ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);
292 }
293 assert(ret == 0);
294
295 gem_close(fd, handle);
296}
297
Chris Wilson20b69032011-06-05 11:20:34 +0100298static uint32_t
299create_bo(int fd, uint32_t val)
300{
301 uint32_t handle;
302 uint32_t *v;
303 int i;
304
305 handle = gem_create(fd, WIDTH*HEIGHT*4);
306 gem_set_tiling(fd, handle, I915_TILING_X, WIDTH*4);
307
308 /* Fill the BO with dwords starting at val */
309 v = gem_mmap(fd, handle, WIDTH*HEIGHT*4, PROT_READ | PROT_WRITE);
Daniel Vetter527cad12012-01-10 18:41:46 +0100310 assert(v);
Chris Wilson20b69032011-06-05 11:20:34 +0100311 for (i = 0; i < WIDTH*HEIGHT; i++)
312 v[i] = val++;
313 munmap(v, WIDTH*HEIGHT*4);
314
315 return handle;
316}
317
318static void
319check_bo(int fd, uint32_t handle, uint32_t val)
320{
321 uint32_t *v;
322 int i;
323
324 v = gem_mmap(fd, handle, WIDTH*HEIGHT*4, PROT_READ);
Daniel Vetter527cad12012-01-10 18:41:46 +0100325 assert(v);
Chris Wilson20b69032011-06-05 11:20:34 +0100326 for (i = 0; i < WIDTH*HEIGHT; i++) {
327 if (v[i] != val) {
328 fprintf(stderr, "Expected 0x%08x, found 0x%08x "
329 "at offset 0x%08x\n",
330 val, v[i], i * 4);
331 abort();
332 }
333 val++;
334 }
335 munmap(v, WIDTH*HEIGHT*4);
336}
337
338int main(int argc, char **argv)
339{
340 uint32_t *handle, *start_val;
341 uint32_t start = 0;
342 int i, fd, count;
343
344 fd = drm_open_any();
345
Daniel Vetter21ec8c72011-09-12 20:56:13 +0200346 if (!IS_GEN3(intel_get_drm_devid(fd))) {
347 printf("gen3-only test, doing nothing\n");
Daniel Vetter19d69952011-09-13 11:05:13 +0200348 return 77;
Daniel Vetter21ec8c72011-09-12 20:56:13 +0200349 }
350
Chris Wilson20b69032011-06-05 11:20:34 +0100351 count = 0;
352 if (argc > 1)
353 count = atoi(argv[1]);
354 if (count == 0)
355 count = 3 * gem_aperture_size(fd) / (1024*1024) / 2;
356 printf("Using %d 1MiB buffers\n", count);
357
358 handle = malloc(sizeof(uint32_t)*count*2);
359 start_val = handle + count;
360
361 for (i = 0; i < count; i++) {
362 handle[i] = create_bo(fd, start);
363 start_val[i] = start;
364 start += 1024 * 1024 / 4;
365 }
366
367 printf("Verifying initialisation...\n");
368 for (i = 0; i < count; i++)
369 check_bo(fd, handle[i], start_val[i]);
370
371 printf("Cyclic blits, forward...\n");
372 for (i = 0; i < count * 4; i++) {
373 int src = i % count;
374 int dst = (i + 1) % count;
375
376 copy(fd, handle[dst], handle[src]);
377 start_val[dst] = start_val[src];
378 }
379 for (i = 0; i < count; i++)
380 check_bo(fd, handle[i], start_val[i]);
381
382 printf("Cyclic blits, backward...\n");
383 for (i = 0; i < count * 4; i++) {
384 int src = (i + 1) % count;
385 int dst = i % count;
386
387 copy(fd, handle[dst], handle[src]);
388 start_val[dst] = start_val[src];
389 }
390 for (i = 0; i < count; i++)
391 check_bo(fd, handle[i], start_val[i]);
392
393 printf("Random blits...\n");
394 for (i = 0; i < count * 4; i++) {
395 int src = random() % count;
396 int dst = random() % count;
397
398 if (src == dst)
399 continue;
400
401 copy(fd, handle[dst], handle[src]);
402 start_val[dst] = start_val[src];
403 }
404 for (i = 0; i < count; i++)
405 check_bo(fd, handle[i], start_val[i]);
406
407 return 0;
408}