Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2011 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
| 21 | * IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Chris Wilson <chris@chris-wilson.co.uk> |
| 25 | * |
| 26 | */ |
| 27 | |
| 28 | /** @file gem_linear_render_blits.c |
| 29 | * |
| 30 | * This is a test of doing many blits, with a working set |
| 31 | * larger than the aperture size. |
| 32 | * |
| 33 | * The goal is to simply ensure the basics work. |
| 34 | */ |
| 35 | |
Thomas Wood | 804e11f | 2015-08-17 17:57:43 +0100 | [diff] [blame] | 36 | #include "igt.h" |
Daniel Vetter | 7dc0001 | 2014-03-22 15:31:15 +0100 | [diff] [blame] | 37 | #include <stdlib.h> |
| 38 | #include <sys/ioctl.h> |
| 39 | #include <stdio.h> |
| 40 | #include <string.h> |
Daniel Vetter | 7dc0001 | 2014-03-22 15:31:15 +0100 | [diff] [blame] | 41 | #include <fcntl.h> |
| 42 | #include <inttypes.h> |
| 43 | #include <errno.h> |
| 44 | #include <sys/stat.h> |
| 45 | #include <sys/time.h> |
Daniel Vetter | f5daeec | 2014-03-23 13:35:09 +0100 | [diff] [blame] | 46 | |
| 47 | #include <drm.h> |
| 48 | |
Daniel Vetter | 7dc0001 | 2014-03-22 15:31:15 +0100 | [diff] [blame] | 49 | #include "intel_bufmgr.h" |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 50 | |
| 51 | #define WIDTH 512 |
| 52 | #define STRIDE (WIDTH*4) |
| 53 | #define HEIGHT 512 |
| 54 | #define SIZE (HEIGHT*STRIDE) |
| 55 | |
Daniel Vetter | 53a4d9e | 2014-03-22 15:49:02 +0100 | [diff] [blame] | 56 | static igt_render_copyfunc_t render_copy; |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 57 | static drm_intel_bo *linear; |
| 58 | static uint32_t data[WIDTH*HEIGHT]; |
| 59 | static int snoop; |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 60 | |
| 61 | static void |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 62 | check_bo(struct intel_batchbuffer *batch, struct igt_buf *buf, uint32_t val) |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 63 | { |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 64 | struct igt_buf tmp; |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 65 | uint32_t *ptr; |
| 66 | int i; |
| 67 | |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 68 | tmp.bo = linear; |
| 69 | tmp.stride = STRIDE; |
| 70 | tmp.tiling = I915_TILING_NONE; |
| 71 | tmp.size = SIZE; |
| 72 | |
| 73 | render_copy(batch, NULL, buf, 0, 0, WIDTH, HEIGHT, &tmp, 0, 0); |
| 74 | if (snoop) { |
Robert Foss | e4e18dd | 2016-05-20 18:59:30 -0400 | [diff] [blame] | 75 | do_or_die(drm_intel_bo_map(linear, 0)); |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 76 | ptr = linear->virtual; |
| 77 | } else { |
| 78 | do_or_die(drm_intel_bo_get_subdata(linear, 0, sizeof(data), data)); |
| 79 | ptr = data; |
| 80 | } |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 81 | for (i = 0; i < WIDTH*HEIGHT; i++) { |
Daniel Vetter | 0b7ce4a | 2014-05-14 09:56:53 +0200 | [diff] [blame] | 82 | igt_assert_f(ptr[i] == val, |
Tim Gore | ee5c119 | 2015-03-03 10:43:43 +0000 | [diff] [blame] | 83 | "Expected 0x%08x, found 0x%08x " |
| 84 | "at offset 0x%08x\n", |
| 85 | val, ptr[i], i * 4); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 86 | val++; |
| 87 | } |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 88 | if (ptr != data) |
Robert Foss | e4e18dd | 2016-05-20 18:59:30 -0400 | [diff] [blame] | 89 | drm_intel_bo_unmap(linear); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 90 | } |
| 91 | |
Tim Gore | ee5c119 | 2015-03-03 10:43:43 +0000 | [diff] [blame] | 92 | static void run_test (int fd, int count) |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 93 | { |
| 94 | drm_intel_bufmgr *bufmgr; |
| 95 | struct intel_batchbuffer *batch; |
| 96 | uint32_t *start_val; |
Daniel Vetter | 83a4c7d | 2014-03-22 15:44:48 +0100 | [diff] [blame] | 97 | struct igt_buf *buf; |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 98 | uint32_t start = 0; |
Tim Gore | ee5c119 | 2015-03-03 10:43:43 +0000 | [diff] [blame] | 99 | int i, j; |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 100 | uint32_t devid; |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 101 | |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 102 | devid = intel_get_drm_devid(fd); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 103 | |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 104 | render_copy = igt_get_render_copyfunc(devid); |
Daniel Vetter | 0b7ce4a | 2014-05-14 09:56:53 +0200 | [diff] [blame] | 105 | igt_require(render_copy); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 106 | |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 107 | snoop = 1; |
| 108 | if (IS_GEN2(devid)) /* chipset only handles cached -> uncached */ |
| 109 | snoop = 0; |
| 110 | if (IS_BROADWATER(devid) || IS_CRESTLINE(devid)) /* snafu */ |
| 111 | snoop = 0; |
| 112 | |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 113 | bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); |
Chris Wilson | e0ce231 | 2012-12-12 14:33:17 +0000 | [diff] [blame] | 114 | drm_intel_bufmgr_gem_set_vma_cache_size(bufmgr, 32); |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 115 | batch = intel_batchbuffer_alloc(bufmgr, devid); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 116 | |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 117 | linear = drm_intel_bo_alloc(bufmgr, "linear", WIDTH*HEIGHT*4, 0); |
| 118 | if (snoop) { |
| 119 | gem_set_caching(fd, linear->handle, 1); |
Daniel Vetter | e624fa8 | 2014-05-14 00:36:04 +0200 | [diff] [blame] | 120 | igt_info("Using a snoop linear buffer for comparisons\n"); |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 121 | } |
| 122 | |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 123 | buf = malloc(sizeof(*buf)*count); |
| 124 | start_val = malloc(sizeof(*start_val)*count); |
| 125 | |
| 126 | for (i = 0; i < count; i++) { |
| 127 | uint32_t tiling = I915_TILING_X + (random() & 1); |
| 128 | unsigned long pitch = STRIDE; |
| 129 | uint32_t *ptr; |
| 130 | |
| 131 | buf[i].bo = drm_intel_bo_alloc_tiled(bufmgr, "", |
| 132 | WIDTH, HEIGHT, 4, |
| 133 | &tiling, &pitch, 0); |
| 134 | buf[i].stride = pitch; |
| 135 | buf[i].tiling = tiling; |
| 136 | buf[i].size = SIZE; |
| 137 | |
| 138 | start_val[i] = start; |
| 139 | |
| 140 | do_or_die(drm_intel_gem_bo_map_gtt(buf[i].bo)); |
| 141 | ptr = buf[i].bo->virtual; |
| 142 | for (j = 0; j < WIDTH*HEIGHT; j++) |
| 143 | ptr[j] = start++; |
| 144 | drm_intel_gem_bo_unmap_gtt(buf[i].bo); |
| 145 | } |
| 146 | |
Daniel Vetter | e624fa8 | 2014-05-14 00:36:04 +0200 | [diff] [blame] | 147 | igt_info("Verifying initialisation...\n"); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 148 | for (i = 0; i < count; i++) |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 149 | check_bo(batch, &buf[i], start_val[i]); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 150 | |
Daniel Vetter | e624fa8 | 2014-05-14 00:36:04 +0200 | [diff] [blame] | 151 | igt_info("Cyclic blits, forward...\n"); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 152 | for (i = 0; i < count * 4; i++) { |
| 153 | int src = i % count; |
| 154 | int dst = (i + 1) % count; |
| 155 | |
Ville Syrjälä | 725da6e | 2013-11-21 19:05:17 +0200 | [diff] [blame] | 156 | render_copy(batch, NULL, buf+src, 0, 0, WIDTH, HEIGHT, buf+dst, 0, 0); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 157 | start_val[dst] = start_val[src]; |
| 158 | } |
| 159 | for (i = 0; i < count; i++) |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 160 | check_bo(batch, &buf[i], start_val[i]); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 161 | |
Daniel Vetter | e624fa8 | 2014-05-14 00:36:04 +0200 | [diff] [blame] | 162 | igt_info("Cyclic blits, backward...\n"); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 163 | for (i = 0; i < count * 4; i++) { |
| 164 | int src = (i + 1) % count; |
| 165 | int dst = i % count; |
| 166 | |
Ville Syrjälä | 725da6e | 2013-11-21 19:05:17 +0200 | [diff] [blame] | 167 | render_copy(batch, NULL, buf+src, 0, 0, WIDTH, HEIGHT, buf+dst, 0, 0); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 168 | start_val[dst] = start_val[src]; |
| 169 | } |
| 170 | for (i = 0; i < count; i++) |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 171 | check_bo(batch, &buf[i], start_val[i]); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 172 | |
Daniel Vetter | e624fa8 | 2014-05-14 00:36:04 +0200 | [diff] [blame] | 173 | igt_info("Random blits...\n"); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 174 | for (i = 0; i < count * 4; i++) { |
| 175 | int src = random() % count; |
| 176 | int dst = random() % count; |
| 177 | |
| 178 | if (src == dst) |
| 179 | continue; |
| 180 | |
Ville Syrjälä | 725da6e | 2013-11-21 19:05:17 +0200 | [diff] [blame] | 181 | render_copy(batch, NULL, buf+src, 0, 0, WIDTH, HEIGHT, buf+dst, 0, 0); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 182 | start_val[dst] = start_val[src]; |
| 183 | } |
| 184 | for (i = 0; i < count; i++) |
Chris Wilson | 66d5f09 | 2014-05-08 11:56:56 +0100 | [diff] [blame] | 185 | check_bo(batch, &buf[i], start_val[i]); |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 186 | |
Tim Gore | ee5c119 | 2015-03-03 10:43:43 +0000 | [diff] [blame] | 187 | /* release resources */ |
| 188 | drm_intel_bo_unreference(linear); |
| 189 | for (i = 0; i < count; i++) { |
| 190 | drm_intel_bo_unreference(buf[i].bo); |
| 191 | } |
| 192 | intel_batchbuffer_free(batch); |
| 193 | drm_intel_bufmgr_destroy(bufmgr); |
| 194 | } |
| 195 | |
| 196 | |
| 197 | igt_main |
| 198 | { |
| 199 | int fd = 0; |
| 200 | int count = 0; |
| 201 | |
| 202 | igt_fixture { |
Micah Fedke | c81d293 | 2015-07-22 21:54:02 +0000 | [diff] [blame] | 203 | fd = drm_open_driver(DRIVER_INTEL); |
Tim Gore | ee5c119 | 2015-03-03 10:43:43 +0000 | [diff] [blame] | 204 | } |
| 205 | |
Daniel Vetter | 6672da5 | 2015-12-10 12:29:14 +0100 | [diff] [blame] | 206 | igt_subtest("basic") { |
Tim Gore | ee5c119 | 2015-03-03 10:43:43 +0000 | [diff] [blame] | 207 | run_test(fd, 2); |
| 208 | } |
| 209 | |
| 210 | /* the rest of the tests are too long for simulation */ |
| 211 | igt_skip_on_simulation(); |
| 212 | |
| 213 | igt_subtest("apperture-thrash") { |
| 214 | count = 3 * gem_aperture_size(fd) / SIZE / 2; |
| 215 | intel_require_memory(count, SIZE, CHECK_RAM); |
| 216 | run_test(fd, count); |
| 217 | } |
| 218 | |
| 219 | igt_subtest("swap-thrash") { |
| 220 | uint64_t swap_mb = intel_get_total_swap_mb(); |
| 221 | igt_require(swap_mb > 0); |
| 222 | count = ((intel_get_avail_ram_mb() + (swap_mb / 2)) * 1024*1024) / SIZE; |
| 223 | intel_require_memory(count, SIZE, CHECK_RAM | CHECK_SWAP); |
| 224 | run_test(fd, count); |
| 225 | } |
Chris Wilson | c0dbf04 | 2012-12-06 20:36:24 +0000 | [diff] [blame] | 226 | } |