Daniel Vetter | 924115b | 2014-03-22 20:18:51 +0100 | [diff] [blame] | 1 | #include <intel_bufmgr.h> |
| 2 | #include <i915_drm.h> |
| 3 | |
Xiang, Haihao | bd384c2 | 2013-12-02 12:36:15 +0800 | [diff] [blame] | 4 | #include "media_fill.h" |
| 5 | #include "gen8_media.h" |
Daniel Vetter | 6cfcd71 | 2014-03-22 20:07:35 +0100 | [diff] [blame] | 6 | #include "intel_reg.h" |
Tvrtko Ursulin | dc14bf4 | 2014-04-23 16:07:55 +0100 | [diff] [blame] | 7 | #include "drmtest.h" |
Katarzyna Dec | 081f771 | 2018-04-11 10:14:58 +0200 | [diff] [blame] | 8 | #include "gpu_fill.h" |
Xiang, Haihao | bd384c2 | 2013-12-02 12:36:15 +0800 | [diff] [blame] | 9 | #include <assert.h> |
| 10 | |
Xiang, Haihao | bd384c2 | 2013-12-02 12:36:15 +0800 | [diff] [blame] | 11 | |
| 12 | static const uint32_t media_kernel[][4] = { |
| 13 | { 0x00400001, 0x20202288, 0x00000020, 0x00000000 }, |
| 14 | { 0x00600001, 0x20800208, 0x008d0000, 0x00000000 }, |
| 15 | { 0x00200001, 0x20800208, 0x00450040, 0x00000000 }, |
| 16 | { 0x00000001, 0x20880608, 0x00000000, 0x000f000f }, |
| 17 | { 0x00800001, 0x20a00208, 0x00000020, 0x00000000 }, |
| 18 | { 0x00800001, 0x20e00208, 0x00000020, 0x00000000 }, |
| 19 | { 0x00800001, 0x21200208, 0x00000020, 0x00000000 }, |
| 20 | { 0x00800001, 0x21600208, 0x00000020, 0x00000000 }, |
| 21 | { 0x0c800031, 0x24000a40, 0x0e000080, 0x120a8000 }, |
| 22 | { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, |
| 23 | { 0x07800031, 0x20000a40, 0x0e000e00, 0x82000010 }, |
| 24 | }; |
| 25 | |
Xiang, Haihao | bd384c2 | 2013-12-02 12:36:15 +0800 | [diff] [blame] | 26 | |
Xiang, Haihao | bd384c2 | 2013-12-02 12:36:15 +0800 | [diff] [blame] | 27 | |
| 28 | /* |
| 29 | * This sets up the media pipeline, |
| 30 | * |
| 31 | * +---------------+ <---- 4096 |
| 32 | * | ^ | |
| 33 | * | | | |
| 34 | * | various | |
| 35 | * | state | |
| 36 | * | | | |
| 37 | * |_______|_______| <---- 2048 + ? |
| 38 | * | ^ | |
| 39 | * | | | |
| 40 | * | batch | |
| 41 | * | commands | |
| 42 | * | | | |
| 43 | * | | | |
| 44 | * +---------------+ <---- 0 + ? |
| 45 | * |
| 46 | */ |
| 47 | |
| 48 | #define BATCH_STATE_SPLIT 2048 |
| 49 | |
| 50 | void |
| 51 | gen8_media_fillfunc(struct intel_batchbuffer *batch, |
Daniel Vetter | 83a4c7d | 2014-03-22 15:44:48 +0100 | [diff] [blame] | 52 | struct igt_buf *dst, |
Katarzyna Dec | 80e4910 | 2018-04-11 10:15:01 +0200 | [diff] [blame^] | 53 | unsigned int x, unsigned int y, |
| 54 | unsigned int width, unsigned int height, |
Xiang, Haihao | bd384c2 | 2013-12-02 12:36:15 +0800 | [diff] [blame] | 55 | uint8_t color) |
| 56 | { |
| 57 | uint32_t curbe_buffer, interface_descriptor; |
| 58 | uint32_t batch_end; |
| 59 | |
| 60 | intel_batchbuffer_flush(batch); |
| 61 | |
| 62 | /* setup states */ |
| 63 | batch->ptr = &batch->buffer[BATCH_STATE_SPLIT]; |
| 64 | |
Katarzyna Dec | 8099614 | 2018-04-11 10:14:59 +0200 | [diff] [blame] | 65 | curbe_buffer = gen7_fill_curbe_buffer_data(batch, color); |
Katarzyna Dec | 80e4910 | 2018-04-11 10:15:01 +0200 | [diff] [blame^] | 66 | interface_descriptor = gen8_fill_interface_descriptor(batch, dst, |
| 67 | media_kernel, sizeof(media_kernel)); |
Daniel Vetter | baa6f8b | 2014-08-26 15:03:40 +0200 | [diff] [blame] | 68 | igt_assert(batch->ptr < &batch->buffer[4095]); |
Xiang, Haihao | bd384c2 | 2013-12-02 12:36:15 +0800 | [diff] [blame] | 69 | |
| 70 | /* media pipeline */ |
| 71 | batch->ptr = batch->buffer; |
| 72 | OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); |
| 73 | gen8_emit_state_base_address(batch); |
| 74 | |
| 75 | gen8_emit_vfe_state(batch); |
| 76 | |
Katarzyna Dec | 8099614 | 2018-04-11 10:14:59 +0200 | [diff] [blame] | 77 | gen7_emit_curbe_load(batch, curbe_buffer); |
Xiang, Haihao | bd384c2 | 2013-12-02 12:36:15 +0800 | [diff] [blame] | 78 | |
Katarzyna Dec | 8099614 | 2018-04-11 10:14:59 +0200 | [diff] [blame] | 79 | gen7_emit_interface_descriptor_load(batch, interface_descriptor); |
Xiang, Haihao | bd384c2 | 2013-12-02 12:36:15 +0800 | [diff] [blame] | 80 | |
Katarzyna Dec | 8099614 | 2018-04-11 10:14:59 +0200 | [diff] [blame] | 81 | gen7_emit_media_objects(batch, x, y, width, height); |
Xiang, Haihao | bd384c2 | 2013-12-02 12:36:15 +0800 | [diff] [blame] | 82 | |
| 83 | OUT_BATCH(MI_BATCH_BUFFER_END); |
| 84 | |
| 85 | batch_end = batch_align(batch, 8); |
Daniel Vetter | baa6f8b | 2014-08-26 15:03:40 +0200 | [diff] [blame] | 86 | igt_assert(batch_end < BATCH_STATE_SPLIT); |
Xiang, Haihao | bd384c2 | 2013-12-02 12:36:15 +0800 | [diff] [blame] | 87 | |
Katarzyna Dec | 8099614 | 2018-04-11 10:14:59 +0200 | [diff] [blame] | 88 | gen7_render_flush(batch, batch_end); |
Xiang, Haihao | bd384c2 | 2013-12-02 12:36:15 +0800 | [diff] [blame] | 89 | intel_batchbuffer_reset(batch); |
| 90 | } |