Eric Anholt | fbbf124 | 2009-03-27 12:25:09 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2009 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 21 | * DEALINGS IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Eric Anholt <eric@anholt.net> |
| 25 | * |
| 26 | */ |
| 27 | |
Chris Wilson | fa6c275 | 2012-02-20 22:53:26 +0000 | [diff] [blame] | 28 | #ifndef INTEL_GPU_TOOLS_H |
| 29 | #define INTEL_GPU_TOOLS_H |
| 30 | |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 31 | #include <stdint.h> |
Eric Anholt | fbbf124 | 2009-03-27 12:25:09 -0700 | [diff] [blame] | 32 | #include <pciaccess.h> |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 33 | |
Daniel Vetter | bff22f7 | 2014-03-22 19:21:26 +0100 | [diff] [blame] | 34 | /* register access helpers from intel_mmio.c */ |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 35 | extern void *mmio; |
Daniel Vetter | 2d4656f | 2014-03-22 22:23:04 +0100 | [diff] [blame] | 36 | void intel_mmio_use_pci_bar(struct pci_device *pci_dev); |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame^] | 37 | void intel_mmio_use_dump_file(char *file); |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 38 | |
Ben Widawsky | abd7038 | 2011-07-28 13:42:45 -0700 | [diff] [blame] | 39 | int intel_register_access_init(struct pci_device *pci_dev, int safe); |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 40 | void intel_register_access_fini(void); |
| 41 | uint32_t intel_register_read(uint32_t reg); |
| 42 | void intel_register_write(uint32_t reg, uint32_t val); |
Damien Lespiau | 6587f66 | 2013-04-29 18:57:47 +0100 | [diff] [blame] | 43 | int intel_register_access_needs_fakewake(void); |
| 44 | |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame^] | 45 | uint32_t INREG(uint32_t reg); |
| 46 | void OUTREG(uint32_t reg, uint32_t val); |
Daniel Vetter | bff22f7 | 2014-03-22 19:21:26 +0100 | [diff] [blame] | 47 | |
| 48 | /* sideband access functions from intel_iosf.c */ |
Chon Ming Lee | 0b67c0c | 2013-12-04 20:44:33 +0800 | [diff] [blame] | 49 | uint32_t intel_dpio_reg_read(uint32_t reg, int phy); |
| 50 | void intel_dpio_reg_write(uint32_t reg, uint32_t val, int phy); |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 51 | |
Jesse Barnes | 2533959 | 2013-04-16 13:14:58 -0700 | [diff] [blame] | 52 | int intel_punit_read(uint8_t addr, uint32_t *val); |
Jesse Barnes | d6917cf | 2013-04-25 14:43:03 -0700 | [diff] [blame] | 53 | int intel_punit_write(uint8_t addr, uint32_t val); |
Jesse Barnes | 2533959 | 2013-04-16 13:14:58 -0700 | [diff] [blame] | 54 | int intel_nc_read(uint8_t addr, uint32_t *val); |
Jesse Barnes | d6917cf | 2013-04-25 14:43:03 -0700 | [diff] [blame] | 55 | int intel_nc_write(uint8_t addr, uint32_t val); |
Jesse Barnes | 2533959 | 2013-04-16 13:14:58 -0700 | [diff] [blame] | 56 | |
Daniel Vetter | bff22f7 | 2014-03-22 19:21:26 +0100 | [diff] [blame] | 57 | /* register maps from intel_reg_map.c */ |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame^] | 58 | #ifndef __GTK_DOC_IGNORE__ |
| 59 | |
Ben Widawsky | abd7038 | 2011-07-28 13:42:45 -0700 | [diff] [blame] | 60 | #define INTEL_RANGE_RSVD (0<<0) /* Shouldn't be read or written */ |
| 61 | #define INTEL_RANGE_READ (1<<0) |
| 62 | #define INTEL_RANGE_WRITE (1<<1) |
| 63 | #define INTEL_RANGE_RW (INTEL_RANGE_READ | INTEL_RANGE_WRITE) |
| 64 | #define INTEL_RANGE_END (1<<31) |
| 65 | |
| 66 | struct intel_register_range { |
| 67 | uint32_t base; |
| 68 | uint32_t size; |
| 69 | uint32_t flags; |
| 70 | }; |
| 71 | |
| 72 | struct intel_register_map { |
| 73 | struct intel_register_range *map; |
| 74 | uint32_t top; |
| 75 | uint32_t alignment_mask; |
| 76 | }; |
| 77 | struct intel_register_map intel_get_register_map(uint32_t devid); |
Oscar Mateo | 5032e7b | 2013-11-12 11:50:42 +0000 | [diff] [blame] | 78 | struct intel_register_range *intel_get_register_range(struct intel_register_map map, uint32_t offset, uint32_t mode); |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame^] | 79 | #endif /* __GTK_DOC_IGNORE__ */ |
Ben Widawsky | abd7038 | 2011-07-28 13:42:45 -0700 | [diff] [blame] | 80 | |
Chris Wilson | fa6c275 | 2012-02-20 22:53:26 +0000 | [diff] [blame] | 81 | #endif /* INTEL_GPU_TOOLS_H */ |