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Chris Wilson07d59b32011-01-20 22:10:10 +00001/*
2 * Copyright © 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Chris Wilson <chris@chris-wilson.co.uk>
25 *
26 */
27
Thomas Wood804e11f2015-08-17 17:57:43 +010028#include "igt.h"
Chris Wilson07d59b32011-01-20 22:10:10 +000029#include <unistd.h>
30#include <stdlib.h>
31#include <stdint.h>
32#include <stdio.h>
33#include <string.h>
Chris Wilson07d59b32011-01-20 22:10:10 +000034#include <fcntl.h>
35#include <inttypes.h>
36#include <errno.h>
37#include <sys/stat.h>
38#include <sys/ioctl.h>
Chris Wilson07d59b32011-01-20 22:10:10 +000039#include <sys/time.h>
Chris Wilsonb4307092015-07-01 13:53:07 +010040#include <time.h>
Chris Wilson07d59b32011-01-20 22:10:10 +000041#include "drm.h"
Chris Wilson07d59b32011-01-20 22:10:10 +000042
Chris Wilsoncd8d3802015-03-24 09:15:12 +000043#define LOCAL_I915_EXEC_NO_RELOC (1<<11)
44#define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
45
Chris Wilson3a7325e2016-03-08 11:43:31 +000046#define LOCAL_I915_EXEC_BSD_SHIFT (13)
47#define LOCAL_I915_EXEC_BSD_MASK (3 << LOCAL_I915_EXEC_BSD_SHIFT)
Daniel Vetter51f08302012-12-05 19:29:11 +010048
Chris Wilson3a7325e2016-03-08 11:43:31 +000049#define ENGINE_FLAGS (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
Chris Wilson2659cbb2015-03-26 12:09:57 +000050
Chris Wilson3a7325e2016-03-08 11:43:31 +000051static double elapsed(const struct timespec *start, const struct timespec *end)
52{
53 return ((end->tv_sec - start->tv_sec) +
54 (end->tv_nsec - start->tv_nsec)*1e-9);
55}
56
Chris Wilson870c7742016-03-28 15:29:46 +010057static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
58 int timeout, unsigned long *out)
Chris Wilson07d59b32011-01-20 22:10:10 +000059{
60 struct drm_i915_gem_execbuffer2 execbuf;
Chris Wilson3a7325e2016-03-08 11:43:31 +000061 struct drm_i915_gem_exec_object2 obj;
62 struct timespec start, now;
Chris Wilson870c7742016-03-28 15:29:46 +010063 unsigned long count;
Daniel Vetter8f5387e2013-08-13 13:20:58 +020064
Chris Wilson3a7325e2016-03-08 11:43:31 +000065 memset(&obj, 0, sizeof(obj));
66 obj.handle = handle;
Chris Wilson07d59b32011-01-20 22:10:10 +000067
Chris Wilsoncd8d3802015-03-24 09:15:12 +000068 memset(&execbuf, 0, sizeof(execbuf));
Chris Wilson3a7325e2016-03-08 11:43:31 +000069 execbuf.buffers_ptr = (uintptr_t)&obj;
Chris Wilsoncd8d3802015-03-24 09:15:12 +000070 execbuf.buffer_count = 1;
71 execbuf.flags = ring_id;
72 execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
73 execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
Chris Wilson3e2443f2016-03-10 11:50:53 +000074 if (__gem_execbuf(fd, &execbuf)) {
Chris Wilsoncd8d3802015-03-24 09:15:12 +000075 execbuf.flags = ring_id;
Chris Wilson3a7325e2016-03-08 11:43:31 +000076 gem_execbuf(fd, &execbuf);
Chris Wilsoncd8d3802015-03-24 09:15:12 +000077 }
78 gem_sync(fd, handle);
Chris Wilson71f41532016-04-22 16:55:29 +010079 intel_detect_and_clear_missed_interrupts(fd);
Chris Wilsoncd8d3802015-03-24 09:15:12 +000080
Chris Wilson870c7742016-03-28 15:29:46 +010081 count = 0;
Chris Wilson3a7325e2016-03-08 11:43:31 +000082 clock_gettime(CLOCK_MONOTONIC, &start);
83 do {
Chris Wilson870c7742016-03-28 15:29:46 +010084 for (int loop = 0; loop < 1024; loop++)
Chris Wilson3a7325e2016-03-08 11:43:31 +000085 gem_execbuf(fd, &execbuf);
Chris Wilson870c7742016-03-28 15:29:46 +010086
87 count += 1024;
Chris Wilson3a7325e2016-03-08 11:43:31 +000088 clock_gettime(CLOCK_MONOTONIC, &now);
Chris Wilson870c7742016-03-28 15:29:46 +010089 } while (elapsed(&start, &now) < timeout);
Chris Wilson3a7325e2016-03-08 11:43:31 +000090 gem_sync(fd, handle);
91 clock_gettime(CLOCK_MONOTONIC, &now);
Chris Wilson71f41532016-04-22 16:55:29 +010092 igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
Chris Wilson3a7325e2016-03-08 11:43:31 +000093
Chris Wilson870c7742016-03-28 15:29:46 +010094 *out = count;
95 return elapsed(&start, &now);
96}
97
98static void single(int fd, uint32_t handle,
99 unsigned ring_id, const char *ring_name)
100{
101 double time;
102 unsigned long count;
103
104 gem_require_ring(fd, ring_id);
105
106 time = nop_on_ring(fd, handle, ring_id, 20, &count);
107 igt_info("%s: %'lu cycles: %.3fus\n",
108 ring_name, count, time*1e6 / count);
Chris Wilson3a7325e2016-03-08 11:43:31 +0000109}
110
Chris Wilson0aacdac2016-03-09 21:06:16 +0000111static bool ignore_engine(int fd, unsigned engine)
112{
113 if (engine == 0)
114 return true;
115
116 if (gem_has_bsd2(fd) && engine == I915_EXEC_BSD)
117 return true;
118
119 return false;
120}
121
Chris Wilson772393e2016-03-14 14:31:36 +0000122static void all(int fd, uint32_t handle, int timeout)
Chris Wilson3a7325e2016-03-08 11:43:31 +0000123{
124 struct drm_i915_gem_execbuffer2 execbuf;
125 struct drm_i915_gem_exec_object2 obj;
126 struct timespec start, now;
127 unsigned engines[16];
128 unsigned nengine;
129 unsigned engine;
Chris Wilson870c7742016-03-28 15:29:46 +0100130 unsigned long count;
Chris Wilson41a26b52016-03-28 16:26:01 +0100131 double time, max = 0, min = HUGE_VAL, sum = 0;
Chris Wilson870c7742016-03-28 15:29:46 +0100132 const char *name;
Chris Wilson3a7325e2016-03-08 11:43:31 +0000133
134 nengine = 0;
Chris Wilson870c7742016-03-28 15:29:46 +0100135 for_each_engine(fd, engine) {
136 if (ignore_engine(fd, engine))
137 continue;
138
139 time = nop_on_ring(fd, handle, engine, 1, &count) / count;
140 if (time > max) {
141 name = e__->name;
142 max = time;
143 }
Chris Wilson41a26b52016-03-28 16:26:01 +0100144 if (time < min)
145 min = time;
Chris Wilson870c7742016-03-28 15:29:46 +0100146 sum += time;
147 engines[nengine++] = engine;
148 }
Chris Wilson0aacdac2016-03-09 21:06:16 +0000149 igt_require(nengine);
Chris Wilson870c7742016-03-28 15:29:46 +0100150 igt_info("Maximum execution latency on %s, %.3fus, total %.3fus per cycle\n",
151 name, max*1e6, sum*1e6);
Chris Wilson3a7325e2016-03-08 11:43:31 +0000152
153 memset(&obj, 0, sizeof(obj));
154 obj.handle = handle;
155
156 memset(&execbuf, 0, sizeof(execbuf));
157 execbuf.buffers_ptr = (uintptr_t)&obj;
158 execbuf.buffer_count = 1;
159 execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
160 execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
Chris Wilson3e2443f2016-03-10 11:50:53 +0000161 if (__gem_execbuf(fd, &execbuf)) {
Chris Wilson3a7325e2016-03-08 11:43:31 +0000162 execbuf.flags = 0;
163 gem_execbuf(fd, &execbuf);
Chris Wilson07d59b32011-01-20 22:10:10 +0000164 }
Chris Wilson3a7325e2016-03-08 11:43:31 +0000165 gem_sync(fd, handle);
Chris Wilson71f41532016-04-22 16:55:29 +0100166 intel_detect_and_clear_missed_interrupts(fd);
Chris Wilson3a7325e2016-03-08 11:43:31 +0000167
Chris Wilson870c7742016-03-28 15:29:46 +0100168 count = 0;
Chris Wilson3a7325e2016-03-08 11:43:31 +0000169 clock_gettime(CLOCK_MONOTONIC, &start);
170 do {
171 for (int loop = 0; loop < 1024; loop++) {
172 for (int n = 0; n < nengine; n++) {
173 execbuf.flags &= ~ENGINE_FLAGS;
174 execbuf.flags |= engines[n];
175 gem_execbuf(fd, &execbuf);
176 }
177 }
178 count += nengine * 1024;
179 clock_gettime(CLOCK_MONOTONIC, &now);
Chris Wilson772393e2016-03-14 14:31:36 +0000180 } while (elapsed(&start, &now) < timeout); /* Hang detection ~120s */
Chris Wilson3a7325e2016-03-08 11:43:31 +0000181 gem_sync(fd, handle);
182 clock_gettime(CLOCK_MONOTONIC, &now);
Chris Wilson71f41532016-04-22 16:55:29 +0100183 igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
Chris Wilson3a7325e2016-03-08 11:43:31 +0000184
Chris Wilson870c7742016-03-28 15:29:46 +0100185 time = elapsed(&start, &now) / count;
186 igt_info("All (%d engines): %'lu cycles, average %.3fus per cycle\n",
187 nengine, count, 1e6*time);
Chris Wilson41a26b52016-03-28 16:26:01 +0100188
189 /* The rate limiting step is how fast the slowest engine can
190 * its queue of requests, if we wait upon a full ring all dispatch
191 * is frozen. So in general we cannot go faster than the slowest
192 * engine, but we should equally not go any slower.
193 */
Chris Wilson7bd4f912016-04-14 17:03:07 +0100194 igt_assert_f(time < max + 10*min/9, /* ensure parallel execution */
Chris Wilson082fb262016-04-15 10:57:33 +0100195 "Average time (%.3fus) exceeds expecation for parallel execution (min %.3fus, max %.3fus; limit set at %.3fus)\n",
Chris Wilson77b8a5b2016-04-18 10:26:05 +0100196 1e6*time, 1e6*min, 1e6*max, 1e6*(max + 10*min/9));
Daniel Vetterd9d95782012-12-04 17:13:05 +0100197}
Daniel Vetter8f5387e2013-08-13 13:20:58 +0200198
Daniel Vetter071e9ca2013-10-31 16:23:26 +0100199igt_main
Daniel Vetterd9d95782012-12-04 17:13:05 +0100200{
Chris Wilson7e0853c2016-01-27 14:17:53 +0000201 const struct intel_execution_engine *e;
Chris Wilson2659cbb2015-03-26 12:09:57 +0000202 uint32_t handle = 0;
Chris Wilson3a7325e2016-03-08 11:43:31 +0000203 int device = -1;
Daniel Vetterd9d95782012-12-04 17:13:05 +0100204
Chris Wilson2659cbb2015-03-26 12:09:57 +0000205 igt_fixture {
Chris Wilson3a7325e2016-03-08 11:43:31 +0000206 const uint32_t bbe = MI_BATCH_BUFFER_END;
207
Micah Fedkec81d2932015-07-22 21:54:02 +0000208 device = drm_open_driver(DRIVER_INTEL);
Chris Wilson2659cbb2015-03-26 12:09:57 +0000209 handle = gem_create(device, 4096);
Chris Wilson3a7325e2016-03-08 11:43:31 +0000210 gem_write(device, handle, 0, &bbe, sizeof(bbe));
Daniel Vetterd9d95782012-12-04 17:13:05 +0100211
Daniel Vetterbe21fc02016-06-17 16:04:09 +0200212 igt_fork_hang_detector(device);
213 }
Chris Wilson9d61a682016-03-25 18:22:54 +0000214
Chris Wilson772393e2016-03-14 14:31:36 +0000215 igt_subtest("basic")
216 all(device, handle, 10);
217
Chris Wilson7e0853c2016-01-27 14:17:53 +0000218 for (e = intel_execution_engines; e->name; e++)
219 igt_subtest_f("%s", e->name)
Chris Wilson3a7325e2016-03-08 11:43:31 +0000220 single(device, handle, e->exec_id | e->flags, e->name);
221
Chris Wilson772393e2016-03-14 14:31:36 +0000222 igt_subtest("all")
223 all(device, handle, 150);
Daniel Vetterd9d95782012-12-04 17:13:05 +0100224
Daniel Vetterb3880d32013-08-14 18:02:46 +0200225 igt_fixture {
Daniel Vetterbe21fc02016-06-17 16:04:09 +0200226 igt_stop_hang_detector();
Chris Wilson2659cbb2015-03-26 12:09:57 +0000227 gem_close(device, handle);
Chris Wilson2659cbb2015-03-26 12:09:57 +0000228 close(device);
Daniel Vetterb3880d32013-08-14 18:02:46 +0200229 }
Chris Wilson07d59b32011-01-20 22:10:10 +0000230}