blob: 6c81e62bbffcafa1662d972c1fcf6314c321751b [file] [log] [blame]
Chris Wilsonb98bade2013-08-20 21:39:27 +01001/*
2 * Copyright © 2013 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
25#ifndef GPU_PERF_H
26#define GPU_PERF_H
27
Chris Wilsoncc45a9a2013-08-17 17:38:37 +010028#include <stdint.h>
Chris Wilsoneb799b22014-12-21 13:53:27 +000029#include <stdbool.h>
Chris Wilsoncc45a9a2013-08-17 17:38:37 +010030
Chris Wilson8ec80402017-02-23 09:59:01 +000031#define MAX_RINGS 16
Chris Wilsonb20a6b82013-08-22 01:30:02 +010032
Chris Wilsoncc45a9a2013-08-17 17:38:37 +010033struct gpu_perf {
Chris Wilson18478692013-08-22 10:59:58 +000034 const char *error;
Chris Wilsoncc45a9a2013-08-17 17:38:37 +010035 int page_size;
36 int nr_cpus;
37 int nr_events;
38 int *fd;
39 void **map;
40 struct gpu_perf_sample {
41 uint64_t id;
Chris Wilson8cdb5bc2013-08-17 18:24:39 +010042 int (*func)(struct gpu_perf *, const void *);
Chris Wilsoncc45a9a2013-08-17 17:38:37 +010043 } *sample;
44
Chris Wilson474ce532013-08-29 12:01:38 +010045 unsigned flip_complete[MAX_RINGS];
46 unsigned ctx_switch[MAX_RINGS];
47
Chris Wilsoncbbd55a2013-08-17 20:04:11 +010048 struct gpu_perf_comm {
49 struct gpu_perf_comm *next;
50 char name[256];
51 pid_t pid;
Chris Wilsoneb799b22014-12-21 13:53:27 +000052 bool active;
Chris Wilson8ec80402017-02-23 09:59:01 +000053 int nr_requests[MAX_RINGS];
Chris Wilsoncc9de392013-08-17 20:32:58 +010054 void *user_data;
Chris Wilsoneed59ea2013-08-17 21:14:10 +010055
Chris Wilsoneed59ea2013-08-17 21:14:10 +010056 uint64_t wait_time;
Chris Wilson908df372013-08-26 14:11:27 +010057 uint32_t nr_sema;
Chris Wilson2b961d92013-08-29 13:31:24 +010058
59 time_t show;
Chris Wilsoncbbd55a2013-08-17 20:04:11 +010060 } *comm;
Chris Wilson67f533f2013-08-17 22:33:35 +010061 struct gpu_perf_time {
62 struct gpu_perf_time *next;
63 struct gpu_perf_comm *comm;
Chris Wilson959b0c22017-05-10 15:06:44 +010064 uint32_t context;
Chris Wilson67f533f2013-08-17 22:33:35 +010065 uint32_t seqno;
66 uint64_t time;
Chris Wilsonb20a6b82013-08-22 01:30:02 +010067 } *wait[MAX_RINGS];
Chris Wilsoncc45a9a2013-08-17 17:38:37 +010068};
69
70void gpu_perf_init(struct gpu_perf *gp, unsigned flags);
71int gpu_perf_update(struct gpu_perf *gp);
Chris Wilsonb98bade2013-08-20 21:39:27 +010072
73#endif /* GPU_PERF_H */