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Eric Anholtcd9ba0a2009-04-07 16:18:11 -07001/*
2 * Copyright © 2009 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28/** @file gem_pread_after_blit.c
29 *
30 * This is a test of pread's behavior when getting values out of just-drawn-to
31 * buffers.
32 *
33 * The goal is to catch failure in the whole-buffer-flush or
34 * ranged-buffer-flush paths in the kernel.
35 */
36
Thomas Wood804e11f2015-08-17 17:57:43 +010037#include "igt.h"
Eric Anholtcd9ba0a2009-04-07 16:18:11 -070038#include <stdlib.h>
39#include <stdio.h>
40#include <string.h>
Eric Anholtcd9ba0a2009-04-07 16:18:11 -070041#include <fcntl.h>
42#include <inttypes.h>
43#include <errno.h>
44#include <sys/stat.h>
45#include <sys/time.h>
Daniel Vetterf5daeec2014-03-23 13:35:09 +010046
47#include <drm.h>
48
Eric Anholtcd9ba0a2009-04-07 16:18:11 -070049
Thomas Woodb2ac2642014-11-28 11:02:44 +000050IGT_TEST_DESCRIPTION("Test pread behavior when getting values out of"
51 " just-drawn-to buffers.");
52
Eric Anholtcd9ba0a2009-04-07 16:18:11 -070053static drm_intel_bufmgr *bufmgr;
54struct intel_batchbuffer *batch;
55static const int width = 512, height = 512;
56static const int size = 1024 * 1024;
57
58#define PAGE_SIZE 4096
59
60static drm_intel_bo *
61create_bo(uint32_t val)
62{
63 drm_intel_bo *bo;
64 uint32_t *vaddr;
65 int i;
66
67 bo = drm_intel_bo_alloc(bufmgr, "src bo", size, 4096);
68
69 /* Fill the BO with dwords starting at start_val */
70 drm_intel_bo_map(bo, 1);
71 vaddr = bo->virtual;
72
73 for (i = 0; i < 1024 * 1024 / 4; i++)
74 vaddr[i] = val++;
75
76 drm_intel_bo_unmap(bo);
77
78 return bo;
79}
80
81static void
82verify_large_read(drm_intel_bo *bo, uint32_t val)
83{
84 uint32_t buf[size / 4];
85 int i;
86
87 drm_intel_bo_get_subdata(bo, 0, size, buf);
88
89 for (i = 0; i < size / 4; i++) {
Daniel Vetter0b7ce4a2014-05-14 09:56:53 +020090 igt_assert_f(buf[i] == val,
91 "Unexpected value 0x%08x instead of "
92 "0x%08x at offset 0x%08x (%p)\n",
93 buf[i], val, i * 4, buf);
Eric Anholtcd9ba0a2009-04-07 16:18:11 -070094 val++;
95 }
96}
97
98/** This reads at the size that Mesa usees for software fallbacks. */
99static void
100verify_small_read(drm_intel_bo *bo, uint32_t val)
101{
102 uint32_t buf[4096 / 4];
103 int offset, i;
104
105 for (i = 0; i < 4096 / 4; i++)
106 buf[i] = 0x00c0ffee;
107
108 for (offset = 0; offset < size; offset += PAGE_SIZE) {
109 drm_intel_bo_get_subdata(bo, offset, PAGE_SIZE, buf);
110
111 for (i = 0; i < PAGE_SIZE; i += 4) {
Daniel Vetter0b7ce4a2014-05-14 09:56:53 +0200112 igt_assert_f(buf[i / 4] == val,
113 "Unexpected value 0x%08x instead of "
114 "0x%08x at offset 0x%08x\n",
115 buf[i / 4], val, i * 4);
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700116 val++;
117 }
118 }
119}
120
Chris Wilson0a1fc452016-09-13 11:13:14 +0100121typedef igt_hang_t (*do_hang)(int fd);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100122
Chris Wilson0a1fc452016-09-13 11:13:14 +0100123static igt_hang_t no_hang(int fd)
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100124{
Chris Wilson0a1fc452016-09-13 11:13:14 +0100125 return (igt_hang_t){0};
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100126}
127
Chris Wilson0a1fc452016-09-13 11:13:14 +0100128static igt_hang_t bcs_hang(int fd)
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100129{
Daniel Vetter3cd45de2015-02-10 17:46:43 +0100130 return igt_hang_ring(fd, batch->gen >= 6 ? I915_EXEC_BLT : I915_EXEC_DEFAULT);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100131}
132
Chris Wilson24eade02013-08-06 15:03:40 +0100133static void do_test(int fd, int cache_level,
134 drm_intel_bo *src[2],
Chris Wilsonf801b922013-07-20 10:20:52 +0100135 const uint32_t start[2],
136 drm_intel_bo *tmp[2],
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100137 int loop, do_hang do_hang_func)
Chris Wilsonf801b922013-07-20 10:20:52 +0100138{
Chris Wilson0a1fc452016-09-13 11:13:14 +0100139 igt_hang_t hang;
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100140
Chris Wilson24eade02013-08-06 15:03:40 +0100141 if (cache_level != -1) {
Daniel Vetter7553ad62013-08-12 10:43:59 +0200142 gem_set_caching(fd, tmp[0]->handle, cache_level);
143 gem_set_caching(fd, tmp[1]->handle, cache_level);
Chris Wilson24eade02013-08-06 15:03:40 +0100144 }
145
Chris Wilsonf801b922013-07-20 10:20:52 +0100146 do {
147 /* First, do a full-buffer read after blitting */
Daniel Vettereaccd442014-03-13 03:35:02 +0100148 intel_copy_bo(batch, tmp[0], src[0], width*height*4);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100149 hang = do_hang_func(fd);
Chris Wilsonf801b922013-07-20 10:20:52 +0100150 verify_large_read(tmp[0], start[0]);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100151 igt_post_hang_ring(fd, hang);
Daniel Vettereaccd442014-03-13 03:35:02 +0100152 intel_copy_bo(batch, tmp[0], src[1], width*height*4);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100153 hang = do_hang_func(fd);
Chris Wilsonf801b922013-07-20 10:20:52 +0100154 verify_large_read(tmp[0], start[1]);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100155 igt_post_hang_ring(fd, hang);
Chris Wilsonf801b922013-07-20 10:20:52 +0100156
Daniel Vettereaccd442014-03-13 03:35:02 +0100157 intel_copy_bo(batch, tmp[0], src[0], width*height*4);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100158 hang = do_hang_func(fd);
Chris Wilsonf801b922013-07-20 10:20:52 +0100159 verify_small_read(tmp[0], start[0]);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100160 igt_post_hang_ring(fd, hang);
Daniel Vettereaccd442014-03-13 03:35:02 +0100161 intel_copy_bo(batch, tmp[0], src[1], width*height*4);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100162 hang = do_hang_func(fd);
Chris Wilsonf801b922013-07-20 10:20:52 +0100163 verify_small_read(tmp[0], start[1]);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100164 igt_post_hang_ring(fd, hang);
Chris Wilsonf801b922013-07-20 10:20:52 +0100165
Daniel Vettereaccd442014-03-13 03:35:02 +0100166 intel_copy_bo(batch, tmp[0], src[0], width*height*4);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100167 hang = do_hang_func(fd);
Chris Wilsonf801b922013-07-20 10:20:52 +0100168 verify_large_read(tmp[0], start[0]);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100169 igt_post_hang_ring(fd, hang);
Chris Wilsonf801b922013-07-20 10:20:52 +0100170
Daniel Vettereaccd442014-03-13 03:35:02 +0100171 intel_copy_bo(batch, tmp[0], src[0], width*height*4);
172 intel_copy_bo(batch, tmp[1], src[1], width*height*4);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100173 hang = do_hang_func(fd);
Chris Wilsonf801b922013-07-20 10:20:52 +0100174 verify_large_read(tmp[0], start[0]);
175 verify_large_read(tmp[1], start[1]);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100176 igt_post_hang_ring(fd, hang);
Chris Wilsonf801b922013-07-20 10:20:52 +0100177
Daniel Vettereaccd442014-03-13 03:35:02 +0100178 intel_copy_bo(batch, tmp[0], src[0], width*height*4);
179 intel_copy_bo(batch, tmp[1], src[1], width*height*4);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100180 hang = do_hang_func(fd);
Chris Wilsonf801b922013-07-20 10:20:52 +0100181 verify_large_read(tmp[1], start[1]);
182 verify_large_read(tmp[0], start[0]);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100183 igt_post_hang_ring(fd, hang);
Chris Wilsonf801b922013-07-20 10:20:52 +0100184
Daniel Vettereaccd442014-03-13 03:35:02 +0100185 intel_copy_bo(batch, tmp[1], src[0], width*height*4);
186 intel_copy_bo(batch, tmp[0], src[1], width*height*4);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100187 hang = do_hang_func(fd);
Chris Wilsonf801b922013-07-20 10:20:52 +0100188 verify_large_read(tmp[0], start[1]);
189 verify_large_read(tmp[1], start[0]);
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100190 igt_post_hang_ring(fd, hang);
Chris Wilsonf801b922013-07-20 10:20:52 +0100191 } while (--loop);
192}
193
Daniel Vetterb3880d32013-08-14 18:02:46 +0200194drm_intel_bo *src[2], *dst[2];
195int fd;
196
Daniel Vetter071e9ca2013-10-31 16:23:26 +0100197igt_main
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700198{
Chris Wilsonf801b922013-07-20 10:20:52 +0100199 const uint32_t start[2] = {0, 1024 * 1024 / 4};
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100200 const struct {
201 const char *name;
202 int cache;
203 } tests[] = {
204 { "default", -1 },
205 { "uncached", 0 },
206 { "snooped", 1 },
207 { "display", 2 },
208 { NULL, -1 },
209 }, *t;
Chris Wilsonf801b922013-07-20 10:20:52 +0100210
Daniel Vetter1caaf0a2013-08-12 12:17:35 +0200211 igt_skip_on_simulation();
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700212
Daniel Vetterb3880d32013-08-14 18:02:46 +0200213 igt_fixture {
Micah Fedkec81d2932015-07-22 21:54:02 +0000214 fd = drm_open_driver(DRIVER_INTEL);
Chris Wilson537e0b82017-04-03 12:02:17 +0100215 igt_require_gem(fd);
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700216
Daniel Vetterb3880d32013-08-14 18:02:46 +0200217 bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
218 drm_intel_bufmgr_gem_enable_reuse(bufmgr);
219 batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700220
Daniel Vetterb3880d32013-08-14 18:02:46 +0200221 src[0] = create_bo(start[0]);
222 src[1] = create_bo(start[1]);
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700223
Daniel Vetterb3880d32013-08-14 18:02:46 +0200224 dst[0] = drm_intel_bo_alloc(bufmgr, "dst bo", size, 4096);
225 dst[1] = drm_intel_bo_alloc(bufmgr, "dst bo", size, 4096);
226 }
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700227
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100228 for (t = tests; t->name; t++) {
229 igt_subtest_f("%s-normal", t->name)
230 do_test(fd, t->cache, src, start, dst, 1, no_hang);
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700231
Daniel Vetter1caaf0a2013-08-12 12:17:35 +0200232 igt_fork_signal_helper();
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100233 igt_subtest_f("%s-interruptible", t->name)
234 do_test(fd, t->cache, src, start, dst, 100, no_hang);
Daniel Vetter1caaf0a2013-08-12 12:17:35 +0200235 igt_stop_signal_helper();
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700236
Chris Wilson92caf132015-12-16 09:23:56 +0000237 igt_subtest_f("%s-hang", t->name)
Chris Wilson5ae9eca2014-09-04 13:16:52 +0100238 do_test(fd, t->cache, src, start, dst, 1, bcs_hang);
Chris Wilson467796a2013-08-10 15:49:33 +0100239 }
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700240
Daniel Vetterb3880d32013-08-14 18:02:46 +0200241 igt_fixture {
242 drm_intel_bo_unreference(src[0]);
243 drm_intel_bo_unreference(src[1]);
244 drm_intel_bo_unreference(dst[0]);
245 drm_intel_bo_unreference(dst[1]);
246
247 intel_batchbuffer_free(batch);
248 drm_intel_bufmgr_destroy(bufmgr);
249 }
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700250
251 close(fd);
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700252}