Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2009 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
| 21 | * IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Eric Anholt <eric@anholt.net> |
| 25 | * |
| 26 | */ |
| 27 | |
| 28 | /** @file gem_pread_after_blit.c |
| 29 | * |
| 30 | * This is a test of pread's behavior when getting values out of just-drawn-to |
| 31 | * buffers. |
| 32 | * |
| 33 | * The goal is to catch failure in the whole-buffer-flush or |
| 34 | * ranged-buffer-flush paths in the kernel. |
| 35 | */ |
| 36 | |
Thomas Wood | 804e11f | 2015-08-17 17:57:43 +0100 | [diff] [blame] | 37 | #include "igt.h" |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 38 | #include <stdlib.h> |
| 39 | #include <stdio.h> |
| 40 | #include <string.h> |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 41 | #include <fcntl.h> |
| 42 | #include <inttypes.h> |
| 43 | #include <errno.h> |
| 44 | #include <sys/stat.h> |
| 45 | #include <sys/time.h> |
Daniel Vetter | f5daeec | 2014-03-23 13:35:09 +0100 | [diff] [blame] | 46 | |
| 47 | #include <drm.h> |
| 48 | |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 49 | |
Thomas Wood | b2ac264 | 2014-11-28 11:02:44 +0000 | [diff] [blame] | 50 | IGT_TEST_DESCRIPTION("Test pread behavior when getting values out of" |
| 51 | " just-drawn-to buffers."); |
| 52 | |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 53 | static drm_intel_bufmgr *bufmgr; |
| 54 | struct intel_batchbuffer *batch; |
| 55 | static const int width = 512, height = 512; |
| 56 | static const int size = 1024 * 1024; |
| 57 | |
| 58 | #define PAGE_SIZE 4096 |
| 59 | |
| 60 | static drm_intel_bo * |
| 61 | create_bo(uint32_t val) |
| 62 | { |
| 63 | drm_intel_bo *bo; |
| 64 | uint32_t *vaddr; |
| 65 | int i; |
| 66 | |
| 67 | bo = drm_intel_bo_alloc(bufmgr, "src bo", size, 4096); |
| 68 | |
| 69 | /* Fill the BO with dwords starting at start_val */ |
| 70 | drm_intel_bo_map(bo, 1); |
| 71 | vaddr = bo->virtual; |
| 72 | |
| 73 | for (i = 0; i < 1024 * 1024 / 4; i++) |
| 74 | vaddr[i] = val++; |
| 75 | |
| 76 | drm_intel_bo_unmap(bo); |
| 77 | |
| 78 | return bo; |
| 79 | } |
| 80 | |
| 81 | static void |
| 82 | verify_large_read(drm_intel_bo *bo, uint32_t val) |
| 83 | { |
| 84 | uint32_t buf[size / 4]; |
| 85 | int i; |
| 86 | |
| 87 | drm_intel_bo_get_subdata(bo, 0, size, buf); |
| 88 | |
| 89 | for (i = 0; i < size / 4; i++) { |
Daniel Vetter | 0b7ce4a | 2014-05-14 09:56:53 +0200 | [diff] [blame] | 90 | igt_assert_f(buf[i] == val, |
| 91 | "Unexpected value 0x%08x instead of " |
| 92 | "0x%08x at offset 0x%08x (%p)\n", |
| 93 | buf[i], val, i * 4, buf); |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 94 | val++; |
| 95 | } |
| 96 | } |
| 97 | |
| 98 | /** This reads at the size that Mesa usees for software fallbacks. */ |
| 99 | static void |
| 100 | verify_small_read(drm_intel_bo *bo, uint32_t val) |
| 101 | { |
| 102 | uint32_t buf[4096 / 4]; |
| 103 | int offset, i; |
| 104 | |
| 105 | for (i = 0; i < 4096 / 4; i++) |
| 106 | buf[i] = 0x00c0ffee; |
| 107 | |
| 108 | for (offset = 0; offset < size; offset += PAGE_SIZE) { |
| 109 | drm_intel_bo_get_subdata(bo, offset, PAGE_SIZE, buf); |
| 110 | |
| 111 | for (i = 0; i < PAGE_SIZE; i += 4) { |
Daniel Vetter | 0b7ce4a | 2014-05-14 09:56:53 +0200 | [diff] [blame] | 112 | igt_assert_f(buf[i / 4] == val, |
| 113 | "Unexpected value 0x%08x instead of " |
| 114 | "0x%08x at offset 0x%08x\n", |
| 115 | buf[i / 4], val, i * 4); |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 116 | val++; |
| 117 | } |
| 118 | } |
| 119 | } |
| 120 | |
Chris Wilson | 0a1fc45 | 2016-09-13 11:13:14 +0100 | [diff] [blame] | 121 | typedef igt_hang_t (*do_hang)(int fd); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 122 | |
Chris Wilson | 0a1fc45 | 2016-09-13 11:13:14 +0100 | [diff] [blame] | 123 | static igt_hang_t no_hang(int fd) |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 124 | { |
Chris Wilson | 0a1fc45 | 2016-09-13 11:13:14 +0100 | [diff] [blame] | 125 | return (igt_hang_t){0}; |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 126 | } |
| 127 | |
Chris Wilson | 0a1fc45 | 2016-09-13 11:13:14 +0100 | [diff] [blame] | 128 | static igt_hang_t bcs_hang(int fd) |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 129 | { |
Daniel Vetter | 3cd45de | 2015-02-10 17:46:43 +0100 | [diff] [blame] | 130 | return igt_hang_ring(fd, batch->gen >= 6 ? I915_EXEC_BLT : I915_EXEC_DEFAULT); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 131 | } |
| 132 | |
Chris Wilson | 24eade0 | 2013-08-06 15:03:40 +0100 | [diff] [blame] | 133 | static void do_test(int fd, int cache_level, |
| 134 | drm_intel_bo *src[2], |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 135 | const uint32_t start[2], |
| 136 | drm_intel_bo *tmp[2], |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 137 | int loop, do_hang do_hang_func) |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 138 | { |
Chris Wilson | 0a1fc45 | 2016-09-13 11:13:14 +0100 | [diff] [blame] | 139 | igt_hang_t hang; |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 140 | |
Chris Wilson | 24eade0 | 2013-08-06 15:03:40 +0100 | [diff] [blame] | 141 | if (cache_level != -1) { |
Daniel Vetter | 7553ad6 | 2013-08-12 10:43:59 +0200 | [diff] [blame] | 142 | gem_set_caching(fd, tmp[0]->handle, cache_level); |
| 143 | gem_set_caching(fd, tmp[1]->handle, cache_level); |
Chris Wilson | 24eade0 | 2013-08-06 15:03:40 +0100 | [diff] [blame] | 144 | } |
| 145 | |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 146 | do { |
| 147 | /* First, do a full-buffer read after blitting */ |
Daniel Vetter | eaccd44 | 2014-03-13 03:35:02 +0100 | [diff] [blame] | 148 | intel_copy_bo(batch, tmp[0], src[0], width*height*4); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 149 | hang = do_hang_func(fd); |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 150 | verify_large_read(tmp[0], start[0]); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 151 | igt_post_hang_ring(fd, hang); |
Daniel Vetter | eaccd44 | 2014-03-13 03:35:02 +0100 | [diff] [blame] | 152 | intel_copy_bo(batch, tmp[0], src[1], width*height*4); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 153 | hang = do_hang_func(fd); |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 154 | verify_large_read(tmp[0], start[1]); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 155 | igt_post_hang_ring(fd, hang); |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 156 | |
Daniel Vetter | eaccd44 | 2014-03-13 03:35:02 +0100 | [diff] [blame] | 157 | intel_copy_bo(batch, tmp[0], src[0], width*height*4); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 158 | hang = do_hang_func(fd); |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 159 | verify_small_read(tmp[0], start[0]); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 160 | igt_post_hang_ring(fd, hang); |
Daniel Vetter | eaccd44 | 2014-03-13 03:35:02 +0100 | [diff] [blame] | 161 | intel_copy_bo(batch, tmp[0], src[1], width*height*4); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 162 | hang = do_hang_func(fd); |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 163 | verify_small_read(tmp[0], start[1]); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 164 | igt_post_hang_ring(fd, hang); |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 165 | |
Daniel Vetter | eaccd44 | 2014-03-13 03:35:02 +0100 | [diff] [blame] | 166 | intel_copy_bo(batch, tmp[0], src[0], width*height*4); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 167 | hang = do_hang_func(fd); |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 168 | verify_large_read(tmp[0], start[0]); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 169 | igt_post_hang_ring(fd, hang); |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 170 | |
Daniel Vetter | eaccd44 | 2014-03-13 03:35:02 +0100 | [diff] [blame] | 171 | intel_copy_bo(batch, tmp[0], src[0], width*height*4); |
| 172 | intel_copy_bo(batch, tmp[1], src[1], width*height*4); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 173 | hang = do_hang_func(fd); |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 174 | verify_large_read(tmp[0], start[0]); |
| 175 | verify_large_read(tmp[1], start[1]); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 176 | igt_post_hang_ring(fd, hang); |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 177 | |
Daniel Vetter | eaccd44 | 2014-03-13 03:35:02 +0100 | [diff] [blame] | 178 | intel_copy_bo(batch, tmp[0], src[0], width*height*4); |
| 179 | intel_copy_bo(batch, tmp[1], src[1], width*height*4); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 180 | hang = do_hang_func(fd); |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 181 | verify_large_read(tmp[1], start[1]); |
| 182 | verify_large_read(tmp[0], start[0]); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 183 | igt_post_hang_ring(fd, hang); |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 184 | |
Daniel Vetter | eaccd44 | 2014-03-13 03:35:02 +0100 | [diff] [blame] | 185 | intel_copy_bo(batch, tmp[1], src[0], width*height*4); |
| 186 | intel_copy_bo(batch, tmp[0], src[1], width*height*4); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 187 | hang = do_hang_func(fd); |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 188 | verify_large_read(tmp[0], start[1]); |
| 189 | verify_large_read(tmp[1], start[0]); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 190 | igt_post_hang_ring(fd, hang); |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 191 | } while (--loop); |
| 192 | } |
| 193 | |
Daniel Vetter | b3880d3 | 2013-08-14 18:02:46 +0200 | [diff] [blame] | 194 | drm_intel_bo *src[2], *dst[2]; |
| 195 | int fd; |
| 196 | |
Daniel Vetter | 071e9ca | 2013-10-31 16:23:26 +0100 | [diff] [blame] | 197 | igt_main |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 198 | { |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 199 | const uint32_t start[2] = {0, 1024 * 1024 / 4}; |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 200 | const struct { |
| 201 | const char *name; |
| 202 | int cache; |
| 203 | } tests[] = { |
| 204 | { "default", -1 }, |
| 205 | { "uncached", 0 }, |
| 206 | { "snooped", 1 }, |
| 207 | { "display", 2 }, |
| 208 | { NULL, -1 }, |
| 209 | }, *t; |
Chris Wilson | f801b92 | 2013-07-20 10:20:52 +0100 | [diff] [blame] | 210 | |
Daniel Vetter | 1caaf0a | 2013-08-12 12:17:35 +0200 | [diff] [blame] | 211 | igt_skip_on_simulation(); |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 212 | |
Daniel Vetter | b3880d3 | 2013-08-14 18:02:46 +0200 | [diff] [blame] | 213 | igt_fixture { |
Micah Fedke | c81d293 | 2015-07-22 21:54:02 +0000 | [diff] [blame] | 214 | fd = drm_open_driver(DRIVER_INTEL); |
Chris Wilson | 537e0b8 | 2017-04-03 12:02:17 +0100 | [diff] [blame] | 215 | igt_require_gem(fd); |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 216 | |
Daniel Vetter | b3880d3 | 2013-08-14 18:02:46 +0200 | [diff] [blame] | 217 | bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); |
| 218 | drm_intel_bufmgr_gem_enable_reuse(bufmgr); |
| 219 | batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 220 | |
Daniel Vetter | b3880d3 | 2013-08-14 18:02:46 +0200 | [diff] [blame] | 221 | src[0] = create_bo(start[0]); |
| 222 | src[1] = create_bo(start[1]); |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 223 | |
Daniel Vetter | b3880d3 | 2013-08-14 18:02:46 +0200 | [diff] [blame] | 224 | dst[0] = drm_intel_bo_alloc(bufmgr, "dst bo", size, 4096); |
| 225 | dst[1] = drm_intel_bo_alloc(bufmgr, "dst bo", size, 4096); |
| 226 | } |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 227 | |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 228 | for (t = tests; t->name; t++) { |
| 229 | igt_subtest_f("%s-normal", t->name) |
| 230 | do_test(fd, t->cache, src, start, dst, 1, no_hang); |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 231 | |
Daniel Vetter | 1caaf0a | 2013-08-12 12:17:35 +0200 | [diff] [blame] | 232 | igt_fork_signal_helper(); |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 233 | igt_subtest_f("%s-interruptible", t->name) |
| 234 | do_test(fd, t->cache, src, start, dst, 100, no_hang); |
Daniel Vetter | 1caaf0a | 2013-08-12 12:17:35 +0200 | [diff] [blame] | 235 | igt_stop_signal_helper(); |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 236 | |
Chris Wilson | 92caf13 | 2015-12-16 09:23:56 +0000 | [diff] [blame] | 237 | igt_subtest_f("%s-hang", t->name) |
Chris Wilson | 5ae9eca | 2014-09-04 13:16:52 +0100 | [diff] [blame] | 238 | do_test(fd, t->cache, src, start, dst, 1, bcs_hang); |
Chris Wilson | 467796a | 2013-08-10 15:49:33 +0100 | [diff] [blame] | 239 | } |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 240 | |
Daniel Vetter | b3880d3 | 2013-08-14 18:02:46 +0200 | [diff] [blame] | 241 | igt_fixture { |
| 242 | drm_intel_bo_unreference(src[0]); |
| 243 | drm_intel_bo_unreference(src[1]); |
| 244 | drm_intel_bo_unreference(dst[0]); |
| 245 | drm_intel_bo_unreference(dst[1]); |
| 246 | |
| 247 | intel_batchbuffer_free(batch); |
| 248 | drm_intel_bufmgr_destroy(bufmgr); |
| 249 | } |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 250 | |
| 251 | close(fd); |
Eric Anholt | cd9ba0a | 2009-04-07 16:18:11 -0700 | [diff] [blame] | 252 | } |