blob: 5415469254c0db878bb07977769ebcbd4d0f9e68 [file] [log] [blame]
Eric Anholt8c641832009-03-26 17:15:11 -07001/**************************************************************************
2 *
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include <inttypes.h>
29#include <stdlib.h>
30#include <stdio.h>
31#include <string.h>
32#include <assert.h>
Chris Wilson95374222010-04-08 11:56:57 +010033
Eric Anholt8c641832009-03-26 17:15:11 -070034#include "drm.h"
35#include "intel_batchbuffer.h"
36#include "intel_bufmgr.h"
Chris Wilson95374222010-04-08 11:56:57 +010037#include "intel_chipset.h"
38#include "intel_reg.h"
39#include <i915_drm.h>
Eric Anholt8c641832009-03-26 17:15:11 -070040
41void
42intel_batchbuffer_reset(struct intel_batchbuffer *batch)
43{
44 if (batch->bo != NULL) {
45 drm_intel_bo_unreference(batch->bo);
46 batch->bo = NULL;
47 }
48
49 if (!batch->buffer)
50 batch->buffer = malloc(BATCH_SZ);
51
52 batch->bo = drm_intel_bo_alloc(batch->bufmgr, "batchbuffer",
53 BATCH_SZ, 4096);
54
55 batch->map = batch->buffer;
56 batch->size = BATCH_SZ;
57 batch->ptr = batch->map;
58}
59
60struct intel_batchbuffer *
Chris Wilsond4d769a2010-10-26 10:59:18 +010061intel_batchbuffer_alloc(drm_intel_bufmgr *bufmgr, uint32_t devid)
Eric Anholt8c641832009-03-26 17:15:11 -070062{
63 struct intel_batchbuffer *batch = calloc(sizeof(*batch), 1);
64
65 batch->bufmgr = bufmgr;
Chris Wilsond4d769a2010-10-26 10:59:18 +010066 batch->devid = devid;
Eric Anholt8c641832009-03-26 17:15:11 -070067 intel_batchbuffer_reset(batch);
68
69 return batch;
70}
71
72void
73intel_batchbuffer_free(struct intel_batchbuffer *batch)
74{
75 free (batch->buffer);
76
77 drm_intel_bo_unreference(batch->bo);
78 batch->bo = NULL;
79 free(batch);
80}
81
82void
83intel_batchbuffer_flush(struct intel_batchbuffer *batch)
84{
85 unsigned int used = batch->ptr - batch->map;
Chris Wilsond4d769a2010-10-26 10:59:18 +010086 int ring;
Eric Anholt8c641832009-03-26 17:15:11 -070087 int ret;
88
89 if (used == 0)
90 return;
91
92 /* Round batchbuffer usage to 2 DWORDs. */
93 if ((used & 4) == 0) {
94 *(uint32_t *) (batch->ptr) = 0; /* noop */
95 batch->ptr += 4;
96 used = batch->ptr - batch->map;
97 }
98
99 /* Mark the end of the buffer. */
100 *(uint32_t *) (batch->ptr) = MI_BATCH_BUFFER_END; /* noop */
101 batch->ptr += 4;
102 used = batch->ptr - batch->map;
103
104 drm_intel_bo_subdata(batch->bo, 0, used, batch->buffer);
105
106 batch->map = NULL;
107 batch->ptr = NULL;
108
Chris Wilsond4d769a2010-10-26 10:59:18 +0100109 ring = 0;
110 if (IS_GEN6(batch->devid))
111 ring = I915_EXEC_BLT;
112 ret = drm_intel_bo_mrb_exec(batch->bo, used, NULL, 0, 0, ring);
Eric Anholt8c641832009-03-26 17:15:11 -0700113 assert(ret == 0);
114
115 intel_batchbuffer_reset(batch);
116}
117
118
119/* This is the only way buffers get added to the validate list.
120 */
121void
122intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
123 drm_intel_bo *buffer, uint32_t delta,
124 uint32_t read_domains, uint32_t write_domain)
125{
126 int ret;
127
128 if (batch->ptr - batch->map > batch->bo->size)
129 printf("bad relocation ptr %p map %p offset %d size %ld\n",
130 batch->ptr, batch->map, batch->ptr - batch->map,
131 batch->bo->size);
132
133 ret = drm_intel_bo_emit_reloc(batch->bo, batch->ptr - batch->map,
134 buffer, delta,
135 read_domains, write_domain);
136 intel_batchbuffer_emit_dword(batch, buffer->offset + delta);
137 assert(ret == 0);
138}
139
140void
141intel_batchbuffer_data(struct intel_batchbuffer *batch,
142 const void *data, unsigned int bytes)
143{
144 assert((bytes & 3) == 0);
145 intel_batchbuffer_require_space(batch, bytes);
146 memcpy(batch->ptr, data, bytes);
147 batch->ptr += bytes;
148}
Chris Wilson95374222010-04-08 11:56:57 +0100149
150void
151intel_copy_bo(struct intel_batchbuffer *batch,
152 drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
Chris Wilsond4d769a2010-10-26 10:59:18 +0100153 int width, int height)
Chris Wilson95374222010-04-08 11:56:57 +0100154{
155 uint32_t src_tiling, dst_tiling, swizzle;
156 uint32_t src_pitch, dst_pitch;
157 uint32_t cmd_bits = 0;
158
159 drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle);
160 drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle);
161
162 src_pitch = width * 4;
Chris Wilsond4d769a2010-10-26 10:59:18 +0100163 if (IS_965(batch->devid) && src_tiling != I915_TILING_NONE) {
Chris Wilson95374222010-04-08 11:56:57 +0100164 src_pitch /= 4;
165 cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
166 }
167
168 dst_pitch = width * 4;
Chris Wilsond4d769a2010-10-26 10:59:18 +0100169 if (IS_965(batch->devid) && dst_tiling != I915_TILING_NONE) {
Chris Wilson95374222010-04-08 11:56:57 +0100170 dst_pitch /= 4;
171 cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
172 }
173
174 BEGIN_BATCH(8);
175 OUT_BATCH(XY_SRC_COPY_BLT_CMD |
176 XY_SRC_COPY_BLT_WRITE_ALPHA |
177 XY_SRC_COPY_BLT_WRITE_RGB |
178 cmd_bits);
179 OUT_BATCH((3 << 24) | /* 32 bits */
180 (0xcc << 16) | /* copy ROP */
181 dst_pitch);
182 OUT_BATCH(0); /* dst x1,y1 */
183 OUT_BATCH((height << 16) | width); /* dst x2,y2 */
184 OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
185 OUT_BATCH(0); /* src x1,y1 */
186 OUT_BATCH(src_pitch);
187 OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
188 ADVANCE_BATCH();
189
190 intel_batchbuffer_flush(batch);
191}