blob: 40d2bb0b525ae7be837fb1130c45de243a46522e [file] [log] [blame]
Jesse Barnesbbafc3d2009-06-18 18:07:47 -07001/*
2 * Copyright © 2009 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Jesse Barnes <jbarnes@virtuousgeek.org> (based on gem_bad_blit.c)
26 *
27 */
28
29#include <stdlib.h>
30#include <stdio.h>
31#include <string.h>
32#include <assert.h>
33#include <fcntl.h>
34#include <inttypes.h>
35#include <errno.h>
36#include <sys/stat.h>
37#include <sys/time.h>
38#include "drm.h"
39#include "i915_drm.h"
40#include "drmtest.h"
41#include "intel_bufmgr.h"
42#include "intel_batchbuffer.h"
43#include "intel_gpu_tools.h"
44
45static drm_intel_bufmgr *bufmgr;
46struct intel_batchbuffer *batch;
47static int bad_pipe;
48
49static void
50gpu_hang(void)
51{
52 int cmd;
53
54 cmd = bad_pipe ? MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW :
55 MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW;
56
57 BEGIN_BATCH(6);
58 /* The documentation says that the LOAD_SCAN_LINES command
59 * always comes in pairs. Don't ask me why. */
60 OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | (bad_pipe << 20));
61 OUT_BATCH((0 << 16) | 2048);
62 OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | (bad_pipe << 20));
63 OUT_BATCH((0 << 16) | 2048);
64 OUT_BATCH(MI_WAIT_FOR_EVENT | cmd);
65 OUT_BATCH(MI_NOOP);
66 ADVANCE_BATCH();
67
68 intel_batchbuffer_flush(batch);
69}
70
71int main(int argc, char **argv)
72{
73 int fd;
74
75 if (argc != 2) {
76 fprintf(stderr, "usage: %s <disabled pipe number>\n",
77 argv[0]);
78 exit(-1);
79 }
80
81 bad_pipe = atoi(argv[1]);
82
83 fd = drm_open_any();
Jesse Barnesbbafc3d2009-06-18 18:07:47 -070084
85 bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
86 drm_intel_bufmgr_gem_enable_reuse(bufmgr);
Chris Wilsond4d769a2010-10-26 10:59:18 +010087 batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
Jesse Barnesbbafc3d2009-06-18 18:07:47 -070088
89 gpu_hang();
90
91 intel_batchbuffer_free(batch);
92 drm_intel_bufmgr_destroy(bufmgr);
93
94 close(fd);
95
96 return 0;
97}