blob: c9c8b02c7d653497eefd98aa2aa19bb647c338eb [file] [log] [blame]
Eric Anholtcd9ba0a2009-04-07 16:18:11 -07001/*
2 * Copyright © 2009 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28/** @file gem_pread_after_blit.c
29 *
30 * This is a test of pread's behavior when getting values out of just-drawn-to
31 * buffers.
32 *
33 * The goal is to catch failure in the whole-buffer-flush or
34 * ranged-buffer-flush paths in the kernel.
35 */
36
37#include <stdlib.h>
38#include <stdio.h>
39#include <string.h>
40#include <assert.h>
41#include <fcntl.h>
42#include <inttypes.h>
43#include <errno.h>
44#include <sys/stat.h>
45#include <sys/time.h>
46#include "drm.h"
47#include "i915_drm.h"
48#include "drmtest.h"
49#include "intel_bufmgr.h"
50#include "intel_batchbuffer.h"
51#include "intel_gpu_tools.h"
52
53static drm_intel_bufmgr *bufmgr;
54struct intel_batchbuffer *batch;
55static const int width = 512, height = 512;
56static const int size = 1024 * 1024;
57
58#define PAGE_SIZE 4096
59
60static drm_intel_bo *
61create_bo(uint32_t val)
62{
63 drm_intel_bo *bo;
64 uint32_t *vaddr;
65 int i;
66
67 bo = drm_intel_bo_alloc(bufmgr, "src bo", size, 4096);
68
69 /* Fill the BO with dwords starting at start_val */
70 drm_intel_bo_map(bo, 1);
71 vaddr = bo->virtual;
72
73 for (i = 0; i < 1024 * 1024 / 4; i++)
74 vaddr[i] = val++;
75
76 drm_intel_bo_unmap(bo);
77
78 return bo;
79}
80
81static void
82verify_large_read(drm_intel_bo *bo, uint32_t val)
83{
84 uint32_t buf[size / 4];
85 int i;
86
87 drm_intel_bo_get_subdata(bo, 0, size, buf);
88
89 for (i = 0; i < size / 4; i++) {
90 if (buf[i] != val) {
91 fprintf(stderr,
92 "Unexpected value 0x%08x instead of "
93 "0x%08x at offset 0x%08x (%p)\n",
94 buf[i], val, i * 4, buf);
95 abort();
96 }
97 val++;
98 }
99}
100
101/** This reads at the size that Mesa usees for software fallbacks. */
102static void
103verify_small_read(drm_intel_bo *bo, uint32_t val)
104{
105 uint32_t buf[4096 / 4];
106 int offset, i;
107
108 for (i = 0; i < 4096 / 4; i++)
109 buf[i] = 0x00c0ffee;
110
111 for (offset = 0; offset < size; offset += PAGE_SIZE) {
112 drm_intel_bo_get_subdata(bo, offset, PAGE_SIZE, buf);
113
114 for (i = 0; i < PAGE_SIZE; i += 4) {
115 if (buf[i / 4] != val) {
116 fprintf(stderr,
117 "Unexpected value 0x%08x instead of "
118 "0x%08x at offset 0x%08x\n",
119 buf[i / 4], val, i * 4);
120 abort();
121 }
122 val++;
123 }
124 }
125}
126
127int
128main(int argc, char **argv)
129{
130 int fd;
131 drm_intel_bo *src1, *src2, *bo;
132 uint32_t start1 = 0;
133 uint32_t start2 = 1024 * 1024 / 4;
134
135 fd = drm_open_any();
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700136
137 bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
138 drm_intel_bufmgr_gem_enable_reuse(bufmgr);
Chris Wilsond4d769a2010-10-26 10:59:18 +0100139 batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700140
141 src1 = create_bo(start1);
142 src2 = create_bo(start2);
143
144 bo = drm_intel_bo_alloc(bufmgr, "dst bo", size, 4096);
145
146 /* First, do a full-buffer read after blitting */
147 printf("Large read after blit 1\n");
Chris Wilsond4d769a2010-10-26 10:59:18 +0100148 intel_copy_bo(batch, bo, src1, width, height);
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700149 verify_large_read(bo, start1);
150 printf("Large read after blit 2\n");
Chris Wilsond4d769a2010-10-26 10:59:18 +0100151 intel_copy_bo(batch, bo, src2, width, height);
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700152 verify_large_read(bo, start2);
153
154 printf("Small reads after blit 1\n");
Chris Wilsond4d769a2010-10-26 10:59:18 +0100155 intel_copy_bo(batch, bo, src1, width, height);
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700156 verify_small_read(bo, start1);
157 printf("Small reads after blit 2\n");
Chris Wilsond4d769a2010-10-26 10:59:18 +0100158 intel_copy_bo(batch, bo, src2, width, height);
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700159 verify_small_read(bo, start2);
160
161 printf("Large read after blit 3\n");
Chris Wilsond4d769a2010-10-26 10:59:18 +0100162 intel_copy_bo(batch, bo, src1, width, height);
Eric Anholtcd9ba0a2009-04-07 16:18:11 -0700163 verify_large_read(bo, start1);
164
165 drm_intel_bo_unreference(src1);
166 drm_intel_bo_unreference(src2);
167 drm_intel_bo_unreference(bo);
168
169 intel_batchbuffer_free(batch);
170 drm_intel_bufmgr_destroy(bufmgr);
171
172 close(fd);
173
174 return 0;
175}