Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2015 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
| 21 | * IN THE SOFTWARE. |
| 22 | */ |
| 23 | |
| 24 | /** @file gem_read_read_speed.c |
| 25 | * |
| 26 | * This is a test of performance with multiple readers from the same source. |
| 27 | */ |
| 28 | |
Thomas Wood | 804e11f | 2015-08-17 17:57:43 +0100 | [diff] [blame] | 29 | #include "igt.h" |
Chris Wilson | b64d10c | 2016-07-22 17:53:51 +0100 | [diff] [blame] | 30 | #include "igt_sysfs.h" |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 31 | #include <stdlib.h> |
| 32 | #include <stdio.h> |
| 33 | #include <string.h> |
| 34 | #include <fcntl.h> |
| 35 | #include <inttypes.h> |
| 36 | #include <errno.h> |
| 37 | #include <time.h> |
| 38 | #include <sys/stat.h> |
| 39 | #include <sys/time.h> |
| 40 | #include <sys/wait.h> |
| 41 | |
| 42 | #include <drm.h> |
| 43 | |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 44 | #include "intel_bufmgr.h" |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 45 | |
| 46 | IGT_TEST_DESCRIPTION("Test speed of concurrent reads between engines."); |
| 47 | |
| 48 | igt_render_copyfunc_t rendercopy; |
| 49 | struct intel_batchbuffer *batch; |
| 50 | int width, height; |
| 51 | |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 52 | static int semaphores_enabled(int fd) |
| 53 | { |
Chris Wilson | b64d10c | 2016-07-22 17:53:51 +0100 | [diff] [blame] | 54 | bool enabled = false; |
| 55 | int dir; |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 56 | |
Chris Wilson | b64d10c | 2016-07-22 17:53:51 +0100 | [diff] [blame] | 57 | dir = igt_sysfs_open_parameters(fd); |
| 58 | if (dir < 0) |
| 59 | return false; |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 60 | |
Chris Wilson | b64d10c | 2016-07-22 17:53:51 +0100 | [diff] [blame] | 61 | enabled = igt_sysfs_get_boolean(dir, "semaphores"); |
| 62 | close(dir); |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 63 | |
Chris Wilson | b64d10c | 2016-07-22 17:53:51 +0100 | [diff] [blame] | 64 | return enabled; |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 65 | } |
| 66 | |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 67 | static drm_intel_bo *rcs_copy_bo(drm_intel_bo *dst, drm_intel_bo *src) |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 68 | { |
| 69 | struct igt_buf d = { |
| 70 | .bo = dst, |
| 71 | .size = width * height * 4, |
| 72 | .num_tiles = width * height * 4, |
| 73 | .stride = width * 4, |
| 74 | }, s = { |
| 75 | .bo = src, |
| 76 | .size = width * height * 4, |
| 77 | .num_tiles = width * height * 4, |
| 78 | .stride = width * 4, |
| 79 | }; |
| 80 | uint32_t swizzle; |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 81 | drm_intel_bo *bo = batch->bo; |
| 82 | drm_intel_bo_reference(bo); |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 83 | |
| 84 | drm_intel_bo_get_tiling(dst, &d.tiling, &swizzle); |
| 85 | drm_intel_bo_get_tiling(src, &s.tiling, &swizzle); |
| 86 | |
| 87 | rendercopy(batch, NULL, |
| 88 | &s, 0, 0, |
| 89 | width, height, |
| 90 | &d, 0, 0); |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 91 | |
| 92 | return bo; |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 93 | } |
| 94 | |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 95 | static drm_intel_bo *bcs_copy_bo(drm_intel_bo *dst, drm_intel_bo *src) |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 96 | { |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 97 | drm_intel_bo *bo = batch->bo; |
| 98 | drm_intel_bo_reference(bo); |
| 99 | |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 100 | intel_blt_copy(batch, |
| 101 | src, 0, 0, 4*width, |
| 102 | dst, 0, 0, 4*width, |
| 103 | width, height, 32); |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 104 | |
| 105 | return bo; |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 106 | } |
| 107 | |
| 108 | static void |
| 109 | set_bo(drm_intel_bo *bo, uint32_t val) |
| 110 | { |
| 111 | int size = width * height; |
| 112 | uint32_t *vaddr; |
| 113 | |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 114 | do_or_die(drm_intel_bo_map(bo, 1)); |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 115 | vaddr = bo->virtual; |
| 116 | while (size--) |
| 117 | *vaddr++ = val; |
| 118 | drm_intel_bo_unmap(bo); |
| 119 | } |
| 120 | |
| 121 | static double elapsed(const struct timespec *start, |
| 122 | const struct timespec *end, |
| 123 | int loop) |
| 124 | { |
| 125 | return (1e6*(end->tv_sec - start->tv_sec) + (end->tv_nsec - start->tv_nsec)/1000)/loop; |
| 126 | } |
| 127 | |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 128 | static drm_intel_bo *create_bo(drm_intel_bufmgr *bufmgr, |
| 129 | const char *name) |
| 130 | { |
| 131 | uint32_t tiling_mode = I915_TILING_X; |
| 132 | unsigned long pitch; |
| 133 | return drm_intel_bo_alloc_tiled(bufmgr, name, |
| 134 | width, height, 4, |
| 135 | &tiling_mode, &pitch, 0); |
| 136 | } |
| 137 | |
Chris Wilson | 14f70a8 | 2015-12-13 12:46:47 +0000 | [diff] [blame] | 138 | static void run(drm_intel_bufmgr *bufmgr, int _width, int _height, |
| 139 | bool write_bcs, bool write_rcs) |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 140 | { |
| 141 | drm_intel_bo *src = NULL, *bcs = NULL, *rcs = NULL; |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 142 | drm_intel_bo *bcs_batch, *rcs_batch; |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 143 | struct timespec start, end; |
| 144 | int loops = 1000; |
| 145 | |
| 146 | width = _width; |
| 147 | height = _height; |
| 148 | |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 149 | src = create_bo(bufmgr, "src"); |
| 150 | bcs = create_bo(bufmgr, "bcs"); |
| 151 | rcs = create_bo(bufmgr, "rcs"); |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 152 | |
| 153 | set_bo(src, 0xdeadbeef); |
| 154 | |
Chris Wilson | 14f70a8 | 2015-12-13 12:46:47 +0000 | [diff] [blame] | 155 | if (write_bcs) { |
| 156 | bcs_batch = bcs_copy_bo(src, bcs); |
| 157 | } else { |
| 158 | bcs_batch = bcs_copy_bo(bcs, src); |
| 159 | } |
| 160 | if (write_rcs) { |
| 161 | rcs_batch = rcs_copy_bo(src, rcs); |
| 162 | } else { |
| 163 | rcs_batch = rcs_copy_bo(rcs, src); |
| 164 | } |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 165 | |
| 166 | drm_intel_bo_unreference(rcs); |
| 167 | drm_intel_bo_unreference(bcs); |
| 168 | |
| 169 | drm_intel_gem_bo_start_gtt_access(src, true); |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 170 | clock_gettime(CLOCK_MONOTONIC, &start); |
| 171 | for (int i = 0; i < loops; i++) { |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 172 | drm_intel_gem_bo_context_exec(rcs_batch, NULL, 4096, I915_EXEC_RENDER); |
| 173 | drm_intel_gem_bo_context_exec(bcs_batch, NULL, 4096, I915_EXEC_BLT); |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 174 | } |
| 175 | drm_intel_gem_bo_start_gtt_access(src, true); |
| 176 | clock_gettime(CLOCK_MONOTONIC, &end); |
| 177 | |
Chris Wilson | 14f70a8 | 2015-12-13 12:46:47 +0000 | [diff] [blame] | 178 | igt_info("Time to %s-%s %dx%d [%dk]: %7.3fµs\n", |
| 179 | write_bcs ? "write" : "read", |
| 180 | write_rcs ? "write" : "read", |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 181 | width, height, 4*width*height/1024, |
| 182 | elapsed(&start, &end, loops)); |
| 183 | |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 184 | drm_intel_bo_unreference(rcs_batch); |
| 185 | drm_intel_bo_unreference(bcs_batch); |
| 186 | |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 187 | drm_intel_bo_unreference(src); |
| 188 | } |
| 189 | |
| 190 | igt_main |
| 191 | { |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 192 | const int sizes[] = {1, 128, 256, 512, 1024, 2048, 4096, 8192, 0}; |
| 193 | drm_intel_bufmgr *bufmgr = NULL; |
| 194 | int fd, i; |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 195 | |
| 196 | igt_skip_on_simulation(); |
| 197 | |
| 198 | igt_fixture { |
| 199 | int devid; |
| 200 | |
Micah Fedke | c81d293 | 2015-07-22 21:54:02 +0000 | [diff] [blame] | 201 | fd = drm_open_driver(DRIVER_INTEL); |
Chris Wilson | c3268d9 | 2017-04-08 00:32:57 +0100 | [diff] [blame] | 202 | igt_require_gem(fd); |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 203 | |
| 204 | devid = intel_get_drm_devid(fd); |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 205 | igt_require(intel_gen(devid) >= 6); |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 206 | |
| 207 | rendercopy = igt_get_render_copyfunc(devid); |
| 208 | igt_require(rendercopy); |
| 209 | |
| 210 | bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); |
| 211 | igt_assert(bufmgr); |
| 212 | |
| 213 | batch = intel_batchbuffer_alloc(bufmgr, devid); |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 214 | |
| 215 | igt_info("Semaphores: %d\n", semaphores_enabled(fd)); |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 216 | } |
| 217 | |
Chris Wilson | 14f70a8 | 2015-12-13 12:46:47 +0000 | [diff] [blame] | 218 | for (i = 0; sizes[i] != 0; i++) { |
Chris Wilson | 484c1a6 | 2015-03-18 08:33:54 +0000 | [diff] [blame] | 219 | igt_subtest_f("read-read-%dx%d", sizes[i], sizes[i]) |
Chris Wilson | 14f70a8 | 2015-12-13 12:46:47 +0000 | [diff] [blame] | 220 | run(bufmgr, sizes[i], sizes[i], false, false); |
| 221 | igt_subtest_f("read-write-%dx%d", sizes[i], sizes[i]) |
| 222 | run(bufmgr, sizes[i], sizes[i], false, true); |
| 223 | igt_subtest_f("write-read-%dx%d", sizes[i], sizes[i]) |
| 224 | run(bufmgr, sizes[i], sizes[i], true, false); |
| 225 | igt_subtest_f("write-write-%dx%d", sizes[i], sizes[i]) |
| 226 | run(bufmgr, sizes[i], sizes[i], true, true); |
| 227 | } |
Chris Wilson | ed7e334 | 2015-03-16 15:14:14 +0000 | [diff] [blame] | 228 | } |