Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1 | #ifndef GEN7_RENDER_H |
| 2 | #define GEN7_RENDER_H |
| 3 | |
Thomas Wood | d96490a | 2014-06-16 16:21:35 +0100 | [diff] [blame^] | 4 | #include <stdint.h> |
| 5 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 6 | #define INTEL_MASK(high, low) (((1 << ((high) - (low) + 1)) - 1) << (low)) |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 7 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 8 | #define GEN7_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \ |
| 9 | ((Pipeline) << 27) | \ |
| 10 | ((Opcode) << 24) | \ |
| 11 | ((Subopcode) << 16)) |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 12 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 13 | #define GEN7_STATE_BASE_ADDRESS GEN7_3D(0, 1, 1) |
| 14 | #define GEN7_STATE_SIP GEN7_3D(0, 1, 2) |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 15 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 16 | #define GEN7_PIPELINE_SELECT GEN7_3D(1, 1, 4) |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 17 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 18 | #define GEN7_MEDIA_STATE_POINTERS GEN7_3D(2, 0, 0) |
| 19 | #define GEN7_MEDIA_OBJECT GEN7_3D(2, 1, 0) |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 20 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 21 | #define GEN7_3DSTATE_VERTEX_BUFFERS GEN7_3D(3, 0, 8) |
| 22 | #define GEN7_3DSTATE_VERTEX_ELEMENTS GEN7_3D(3, 0, 9) |
| 23 | #define GEN7_3DSTATE_INDEX_BUFFER GEN7_3D(3, 0, 0xa) |
| 24 | #define GEN7_3DSTATE_VF_STATISTICS GEN7_3D(3, 0, 0xb) |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 25 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 26 | #define GEN7_3DSTATE_DRAWING_RECTANGLE GEN7_3D(3, 1, 0) |
| 27 | #define GEN7_3DSTATE_CONSTANT_COLOR GEN7_3D(3, 1, 1) |
| 28 | #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD GEN7_3D(3, 1, 2) |
| 29 | #define GEN7_3DSTATE_CHROMA_KEY GEN7_3D(3, 1, 4) |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 30 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 31 | #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET GEN7_3D(3, 1, 6) |
| 32 | #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN GEN7_3D(3, 1, 7) |
| 33 | #define GEN7_3DSTATE_LINE_STIPPLE GEN7_3D(3, 1, 8) |
| 34 | #define GEN7_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP GEN7_3D(3, 1, 9) |
| 35 | /* These two are BLC and CTG only, not BW or CL */ |
| 36 | #define GEN7_3DSTATE_AA_LINE_PARAMS GEN7_3D(3, 1, 0xa) |
| 37 | #define GEN7_3DSTATE_GS_SVB_INDEX GEN7_3D(3, 1, 0xb) |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 38 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 39 | #define GEN7_3DPRIMITIVE GEN7_3D(3, 3, 0) |
| 40 | |
| 41 | #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS GEN7_3D(3, 0, 0x02) |
| 42 | # define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12) |
| 43 | # define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9) |
| 44 | # define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8) |
| 45 | |
| 46 | #define GEN7_3DSTATE_URB GEN7_3D(3, 0, 0x05) |
| 47 | /* DW1 */ |
| 48 | # define GEN7_3DSTATE_URB_VS_SIZE_SHIFT 16 |
| 49 | # define GEN7_3DSTATE_URB_VS_ENTRIES_SHIFT 0 |
| 50 | /* DW2 */ |
| 51 | # define GEN7_3DSTATE_URB_GS_ENTRIES_SHIFT 8 |
| 52 | # define GEN7_3DSTATE_URB_GS_SIZE_SHIFT 0 |
| 53 | |
| 54 | #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS GEN7_3D(3, 0, 0x0d) |
| 55 | # define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12) |
| 56 | # define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11) |
| 57 | # define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10) |
| 58 | |
| 59 | #define GEN7_3DSTATE_CC_STATE_POINTERS GEN7_3D(3, 0, 0x0e) |
| 60 | |
| 61 | #define GEN7_3DSTATE_VS GEN7_3D(3, 0, 0x10) |
| 62 | |
| 63 | #define GEN7_3DSTATE_GS GEN7_3D(3, 0, 0x11) |
| 64 | /* DW4 */ |
| 65 | # define GEN7_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0 |
| 66 | |
| 67 | #define GEN7_3DSTATE_CLIP GEN7_3D(3, 0, 0x12) |
| 68 | |
| 69 | #define GEN7_3DSTATE_SF GEN7_3D(3, 0, 0x13) |
| 70 | /* DW1 */ |
| 71 | # define GEN7_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22 |
| 72 | # define GEN7_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 |
| 73 | # define GEN7_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 |
| 74 | /* DW2 */ |
| 75 | /* DW3 */ |
| 76 | # define GEN7_3DSTATE_SF_CULL_BOTH (0 << 29) |
| 77 | # define GEN7_3DSTATE_SF_CULL_NONE (1 << 29) |
| 78 | # define GEN7_3DSTATE_SF_CULL_FRONT (2 << 29) |
| 79 | # define GEN7_3DSTATE_SF_CULL_BACK (3 << 29) |
| 80 | /* DW4 */ |
| 81 | # define GEN7_3DSTATE_SF_TRI_PROVOKE_SHIFT 29 |
| 82 | # define GEN7_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 |
| 83 | # define GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 |
| 84 | |
| 85 | #define GEN7_3DSTATE_WM GEN7_3D(3, 0, 0x14) |
| 86 | /* DW1 */ |
| 87 | # define GEN7_WM_STATISTICS_ENABLE (1 << 31) |
| 88 | # define GEN7_WM_DEPTH_CLEAR (1 << 30) |
| 89 | # define GEN7_WM_DISPATCH_ENABLE (1 << 29) |
| 90 | # define GEN7_WM_DEPTH_RESOLVE (1 << 28) |
| 91 | # define GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27) |
| 92 | # define GEN7_WM_KILL_ENABLE (1 << 25) |
| 93 | # define GEN7_WM_PSCDEPTH_OFF (0 << 23) |
| 94 | # define GEN7_WM_PSCDEPTH_ON (1 << 23) |
| 95 | # define GEN7_WM_PSCDEPTH_ON_GE (2 << 23) |
| 96 | # define GEN7_WM_PSCDEPTH_ON_LE (3 << 23) |
| 97 | # define GEN7_WM_USES_SOURCE_DEPTH (1 << 20) |
| 98 | # define GEN7_WM_USES_SOURCE_W (1 << 19) |
| 99 | # define GEN7_WM_POSITION_ZW_PIXEL (0 << 17) |
| 100 | # define GEN7_WM_POSITION_ZW_CENTROID (2 << 17) |
| 101 | # define GEN7_WM_POSITION_ZW_SAMPLE (3 << 17) |
| 102 | # define GEN7_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 16) |
| 103 | # define GEN7_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 15) |
| 104 | # define GEN7_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 14) |
| 105 | # define GEN7_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 13) |
| 106 | # define GEN7_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 12) |
| 107 | # define GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11) |
| 108 | # define GEN7_WM_USES_INPUT_COVERAGE_MASK (1 << 10) |
| 109 | # define GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 8) |
| 110 | # define GEN7_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 8) |
| 111 | # define GEN7_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 8) |
| 112 | # define GEN7_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 8) |
| 113 | # define GEN7_WM_LINE_AA_WIDTH_0_5 (0 << 6) |
| 114 | # define GEN7_WM_LINE_AA_WIDTH_1_0 (1 << 6) |
| 115 | # define GEN7_WM_LINE_AA_WIDTH_2_0 (2 << 6) |
| 116 | # define GEN7_WM_LINE_AA_WIDTH_4_0 (3 << 6) |
| 117 | # define GEN7_WM_POLYGON_STIPPLE_ENABLE (1 << 4) |
| 118 | # define GEN7_WM_LINE_STIPPLE_ENABLE (1 << 3) |
| 119 | # define GEN7_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 2) |
| 120 | # define GEN7_WM_MSRAST_OFF_PIXEL (0 << 0) |
| 121 | # define GEN7_WM_MSRAST_OFF_PATTERN (1 << 0) |
| 122 | # define GEN7_WM_MSRAST_ON_PIXEL (2 << 0) |
| 123 | # define GEN7_WM_MSRAST_ON_PATTERN (3 << 0) |
| 124 | /* DW2 */ |
| 125 | # define GEN7_WM_MSDISPMODE_PERPIXEL (1 << 31) |
| 126 | |
| 127 | |
| 128 | #define GEN7_3DSTATE_CONSTANT_VS GEN7_3D(3, 0, 0x15) |
| 129 | #define GEN7_3DSTATE_CONSTANT_GS GEN7_3D(3, 0, 0x16) |
| 130 | #define GEN7_3DSTATE_CONSTANT_PS GEN7_3D(3, 0, 0x17) |
| 131 | |
| 132 | #define GEN7_3DSTATE_SAMPLE_MASK GEN7_3D(3, 0, 0x18) |
| 133 | |
| 134 | #define GEN7_3DSTATE_MULTISAMPLE GEN7_3D(3, 1, 0x0d) |
| 135 | /* DW1 */ |
| 136 | # define GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) |
| 137 | # define GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) |
| 138 | # define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1) |
| 139 | # define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) |
| 140 | # define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) |
| 141 | |
| 142 | #define PIPELINE_SELECT_3D 0 |
| 143 | #define PIPELINE_SELECT_MEDIA 1 |
| 144 | |
| 145 | /* for GEN7_STATE_BASE_ADDRESS */ |
| 146 | #define BASE_ADDRESS_MODIFY (1 << 0) |
| 147 | |
| 148 | /* for GEN7_PIPE_CONTROL */ |
| 149 | #define GEN7_PIPE_CONTROL GEN7_3D(3, 2, 0) |
| 150 | #define GEN7_PIPE_CONTROL_CS_STALL (1 << 20) |
| 151 | #define GEN7_PIPE_CONTROL_NOWRITE (0 << 14) |
| 152 | #define GEN7_PIPE_CONTROL_WRITE_QWORD (1 << 14) |
| 153 | #define GEN7_PIPE_CONTROL_WRITE_DEPTH (2 << 14) |
| 154 | #define GEN7_PIPE_CONTROL_WRITE_TIME (3 << 14) |
| 155 | #define GEN7_PIPE_CONTROL_DEPTH_STALL (1 << 13) |
| 156 | #define GEN7_PIPE_CONTROL_WC_FLUSH (1 << 12) |
| 157 | #define GEN7_PIPE_CONTROL_IS_FLUSH (1 << 11) |
| 158 | #define GEN7_PIPE_CONTROL_TC_FLUSH (1 << 10) |
| 159 | #define GEN7_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) |
| 160 | #define GEN7_PIPE_CONTROL_GLOBAL_GTT (1 << 2) |
| 161 | #define GEN7_PIPE_CONTROL_LOCAL_PGTT (0 << 2) |
| 162 | #define GEN7_PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1) |
| 163 | #define GEN7_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) |
| 164 | |
| 165 | /* VERTEX_BUFFER_STATE Structure */ |
| 166 | #define GEN7_VB0_BUFFER_INDEX_SHIFT 26 |
| 167 | #define GEN7_VB0_VERTEXDATA (0 << 20) |
| 168 | #define GEN7_VB0_INSTANCEDATA (1 << 20) |
| 169 | #define GEN7_VB0_BUFFER_PITCH_SHIFT 0 |
Mika Kuoppala | d60d4c8 | 2014-04-10 15:15:13 +0300 | [diff] [blame] | 170 | #define GEN7_VB0_NULL_VERTEX_BUFFER (1 << 13) |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 171 | #define GEN7_VB0_ADDRESS_MODIFY_ENABLE (1 << 14) |
| 172 | |
| 173 | /* VERTEX_ELEMENT_STATE Structure */ |
| 174 | #define GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT 26 |
| 175 | #define GEN7_VE0_VALID (1 << 25) |
| 176 | #define GEN7_VE0_FORMAT_SHIFT 16 |
| 177 | #define GEN7_VE0_OFFSET_SHIFT 0 |
| 178 | #define GEN7_VE1_VFCOMPONENT_0_SHIFT 28 |
| 179 | #define GEN7_VE1_VFCOMPONENT_1_SHIFT 24 |
| 180 | #define GEN7_VE1_VFCOMPONENT_2_SHIFT 20 |
| 181 | #define GEN7_VE1_VFCOMPONENT_3_SHIFT 16 |
| 182 | #define GEN7_VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0 |
| 183 | |
| 184 | /* 3DPRIMITIVE bits */ |
| 185 | #define GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) |
| 186 | #define GEN7_3DPRIMITIVE_VERTEX_RANDOM (1 << 15) |
| 187 | |
| 188 | #define GEN7_SVG_CTL 0x7400 |
| 189 | |
| 190 | #define GEN7_SVG_CTL_GS_BA (0 << 8) |
| 191 | #define GEN7_SVG_CTL_SS_BA (1 << 8) |
| 192 | #define GEN7_SVG_CTL_IO_BA (2 << 8) |
| 193 | #define GEN7_SVG_CTL_GS_AUB (3 << 8) |
| 194 | #define GEN7_SVG_CTL_IO_AUB (4 << 8) |
| 195 | #define GEN7_SVG_CTL_SIP (5 << 8) |
| 196 | |
| 197 | #define GEN7_VF_CTL_SNAPSHOT_COMPLETE (1 << 31) |
| 198 | #define GEN7_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8) |
| 199 | #define GEN7_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8) |
| 200 | #define GEN7_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4) |
| 201 | #define GEN7_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4) |
| 202 | #define GEN7_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3) |
| 203 | #define GEN7_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2) |
| 204 | #define GEN7_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1) |
| 205 | #define GEN7_VF_CTL_SNAPSHOT_ENABLE (1 << 0) |
| 206 | |
| 207 | #define GEN7_VF_STRG_VAL 0x7504 |
| 208 | #define GEN7_VF_STR_VL_OVR 0x7508 |
| 209 | #define GEN7_VF_VC_OVR 0x750c |
| 210 | #define GEN7_VF_STR_PSKIP 0x7510 |
| 211 | #define GEN7_VF_MAX_PRIM 0x7514 |
| 212 | #define GEN7_VF_RDATA 0x7518 |
| 213 | |
| 214 | #define GEN7_VS_CTL 0x7600 |
| 215 | #define GEN7_VS_CTL_SNAPSHOT_COMPLETE (1 << 31) |
| 216 | #define GEN7_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8) |
| 217 | #define GEN7_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8) |
| 218 | #define GEN7_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8) |
| 219 | #define GEN7_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8) |
| 220 | #define GEN7_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2) |
| 221 | #define GEN7_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) |
| 222 | #define GEN7_VS_CTL_SNAPSHOT_ENABLE (1 << 0) |
| 223 | |
| 224 | #define GEN7_VS_STRG_VAL 0x7604 |
| 225 | #define GEN7_VS_RDATA 0x7608 |
| 226 | |
| 227 | #define GEN7_SF_CTL 0x7b00 |
| 228 | #define GEN7_SF_CTL_SNAPSHOT_COMPLETE (1 << 31) |
| 229 | #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8) |
| 230 | #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8) |
| 231 | #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8) |
| 232 | #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8) |
| 233 | #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8) |
| 234 | #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8) |
| 235 | #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8) |
| 236 | #define GEN7_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8) |
| 237 | #define GEN7_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4) |
| 238 | #define GEN7_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3) |
| 239 | #define GEN7_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2) |
| 240 | #define GEN7_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) |
| 241 | #define GEN7_SF_CTL_SNAPSHOT_ENABLE (1 << 0) |
| 242 | |
| 243 | #define GEN7_SF_STRG_VAL 0x7b04 |
| 244 | #define GEN7_SF_RDATA 0x7b18 |
| 245 | |
| 246 | #define GEN7_WIZ_CTL 0x7c00 |
| 247 | #define GEN7_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31) |
| 248 | #define GEN7_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16 |
| 249 | #define GEN7_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8) |
| 250 | #define GEN7_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8) |
| 251 | #define GEN7_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8) |
| 252 | #define GEN7_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6) |
| 253 | #define GEN7_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5) |
| 254 | #define GEN7_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4) |
| 255 | #define GEN7_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3) |
| 256 | #define GEN7_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2) |
| 257 | #define GEN7_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) |
| 258 | #define GEN7_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0) |
| 259 | |
| 260 | #define GEN7_WIZ_STRG_VAL 0x7c04 |
| 261 | #define GEN7_WIZ_RDATA 0x7c18 |
| 262 | |
| 263 | #define GEN7_TS_CTL 0x7e00 |
| 264 | #define GEN7_TS_CTL_SNAPSHOT_COMPLETE (1 << 31) |
| 265 | #define GEN7_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8) |
| 266 | #define GEN7_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8) |
| 267 | #define GEN7_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2) |
| 268 | #define GEN7_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1) |
| 269 | #define GEN7_TS_CTL_SNAPSHOT_ENABLE (1 << 0) |
| 270 | |
| 271 | #define GEN7_TS_STRG_VAL 0x7e04 |
| 272 | #define GEN7_TS_RDATA 0x7e08 |
| 273 | |
| 274 | #define GEN7_TD_CTL 0x8000 |
| 275 | #define GEN7_TD_CTL_MUX_SHIFT 8 |
| 276 | #define GEN7_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) |
| 277 | #define GEN7_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) |
| 278 | #define GEN7_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5) |
| 279 | #define GEN7_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4) |
| 280 | #define GEN7_TD_CTL_BREAKPOINT_ENABLE (1 << 2) |
| 281 | #define GEN7_TD_CTL2 0x8004 |
| 282 | #define GEN7_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28) |
| 283 | #define GEN7_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26) |
| 284 | #define GEN7_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25) |
| 285 | #define GEN7_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16 |
| 286 | #define GEN7_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8) |
| 287 | #define GEN7_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7) |
| 288 | #define GEN7_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6) |
| 289 | #define GEN7_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5) |
| 290 | #define GEN7_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4) |
| 291 | #define GEN7_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) |
| 292 | #define GEN7_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0) |
| 293 | #define GEN7_TD_VF_VS_EMSK 0x8008 |
| 294 | #define GEN7_TD_GS_EMSK 0x800c |
| 295 | #define GEN7_TD_CLIP_EMSK 0x8010 |
| 296 | #define GEN7_TD_SF_EMSK 0x8014 |
| 297 | #define GEN7_TD_WIZ_EMSK 0x8018 |
| 298 | #define GEN7_TD_0_6_EHTRG_VAL 0x801c |
| 299 | #define GEN7_TD_0_7_EHTRG_VAL 0x8020 |
| 300 | #define GEN7_TD_0_6_EHTRG_MSK 0x8024 |
| 301 | #define GEN7_TD_0_7_EHTRG_MSK 0x8028 |
| 302 | #define GEN7_TD_RDATA 0x802c |
| 303 | #define GEN7_TD_TS_EMSK 0x8030 |
| 304 | |
| 305 | #define GEN7_EU_CTL 0x8800 |
| 306 | #define GEN7_EU_CTL_SELECT_SHIFT 16 |
| 307 | #define GEN7_EU_CTL_DATA_MUX_SHIFT 8 |
| 308 | #define GEN7_EU_ATT_0 0x8810 |
| 309 | #define GEN7_EU_ATT_1 0x8814 |
| 310 | #define GEN7_EU_ATT_DATA_0 0x8820 |
| 311 | #define GEN7_EU_ATT_DATA_1 0x8824 |
| 312 | #define GEN7_EU_ATT_CLR_0 0x8830 |
| 313 | #define GEN7_EU_ATT_CLR_1 0x8834 |
| 314 | #define GEN7_EU_RDATA 0x8840 |
| 315 | |
| 316 | #define _3DPRIM_POINTLIST 0x01 |
| 317 | #define _3DPRIM_LINELIST 0x02 |
| 318 | #define _3DPRIM_LINESTRIP 0x03 |
| 319 | #define _3DPRIM_TRILIST 0x04 |
| 320 | #define _3DPRIM_TRISTRIP 0x05 |
| 321 | #define _3DPRIM_TRIFAN 0x06 |
| 322 | #define _3DPRIM_QUADLIST 0x07 |
| 323 | #define _3DPRIM_QUADSTRIP 0x08 |
| 324 | #define _3DPRIM_LINELIST_ADJ 0x09 |
| 325 | #define _3DPRIM_LINESTRIP_ADJ 0x0A |
| 326 | #define _3DPRIM_TRILIST_ADJ 0x0B |
| 327 | #define _3DPRIM_TRISTRIP_ADJ 0x0C |
| 328 | #define _3DPRIM_TRISTRIP_REVERSE 0x0D |
| 329 | #define _3DPRIM_POLYGON 0x0E |
| 330 | #define _3DPRIM_RECTLIST 0x0F |
| 331 | #define _3DPRIM_LINELOOP 0x10 |
| 332 | #define _3DPRIM_POINTLIST_BF 0x11 |
| 333 | #define _3DPRIM_LINESTRIP_CONT 0x12 |
| 334 | #define _3DPRIM_LINESTRIP_BF 0x13 |
| 335 | #define _3DPRIM_LINESTRIP_CONT_BF 0x14 |
| 336 | #define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 |
| 337 | |
| 338 | #define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0 |
| 339 | #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 |
| 340 | |
| 341 | #define GEN7_ANISORATIO_2 0 |
| 342 | #define GEN7_ANISORATIO_4 1 |
| 343 | #define GEN7_ANISORATIO_6 2 |
| 344 | #define GEN7_ANISORATIO_8 3 |
| 345 | #define GEN7_ANISORATIO_10 4 |
| 346 | #define GEN7_ANISORATIO_12 5 |
| 347 | #define GEN7_ANISORATIO_14 6 |
| 348 | #define GEN7_ANISORATIO_16 7 |
| 349 | |
| 350 | #define GEN7_BLENDFACTOR_ONE 0x1 |
| 351 | #define GEN7_BLENDFACTOR_SRC_COLOR 0x2 |
| 352 | #define GEN7_BLENDFACTOR_SRC_ALPHA 0x3 |
| 353 | #define GEN7_BLENDFACTOR_DST_ALPHA 0x4 |
| 354 | #define GEN7_BLENDFACTOR_DST_COLOR 0x5 |
| 355 | #define GEN7_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 |
| 356 | #define GEN7_BLENDFACTOR_CONST_COLOR 0x7 |
| 357 | #define GEN7_BLENDFACTOR_CONST_ALPHA 0x8 |
| 358 | #define GEN7_BLENDFACTOR_SRC1_COLOR 0x9 |
| 359 | #define GEN7_BLENDFACTOR_SRC1_ALPHA 0x0A |
| 360 | #define GEN7_BLENDFACTOR_ZERO 0x11 |
| 361 | #define GEN7_BLENDFACTOR_INV_SRC_COLOR 0x12 |
| 362 | #define GEN7_BLENDFACTOR_INV_SRC_ALPHA 0x13 |
| 363 | #define GEN7_BLENDFACTOR_INV_DST_ALPHA 0x14 |
| 364 | #define GEN7_BLENDFACTOR_INV_DST_COLOR 0x15 |
| 365 | #define GEN7_BLENDFACTOR_INV_CONST_COLOR 0x17 |
| 366 | #define GEN7_BLENDFACTOR_INV_CONST_ALPHA 0x18 |
| 367 | #define GEN7_BLENDFACTOR_INV_SRC1_COLOR 0x19 |
| 368 | #define GEN7_BLENDFACTOR_INV_SRC1_ALPHA 0x1A |
| 369 | |
| 370 | #define GEN7_BLENDFUNCTION_ADD 0 |
| 371 | #define GEN7_BLENDFUNCTION_SUBTRACT 1 |
| 372 | #define GEN7_BLENDFUNCTION_REVERSE_SUBTRACT 2 |
| 373 | #define GEN7_BLENDFUNCTION_MIN 3 |
| 374 | #define GEN7_BLENDFUNCTION_MAX 4 |
| 375 | |
| 376 | #define GEN7_ALPHATEST_FORMAT_UNORM8 0 |
| 377 | #define GEN7_ALPHATEST_FORMAT_FLOAT32 1 |
| 378 | |
| 379 | #define GEN7_CHROMAKEY_KILL_ON_ANY_MATCH 0 |
| 380 | #define GEN7_CHROMAKEY_REPLACE_BLACK 1 |
| 381 | |
| 382 | #define GEN7_CLIP_API_OGL 0 |
| 383 | #define GEN7_CLIP_API_DX 1 |
| 384 | |
| 385 | #define GEN7_CLIPMODE_NORMAL 0 |
| 386 | #define GEN7_CLIPMODE_CLIP_ALL 1 |
| 387 | #define GEN7_CLIPMODE_CLIP_NON_REJECTED 2 |
| 388 | #define GEN7_CLIPMODE_REJECT_ALL 3 |
| 389 | #define GEN7_CLIPMODE_ACCEPT_ALL 4 |
| 390 | |
| 391 | #define GEN7_CLIP_NDCSPACE 0 |
| 392 | #define GEN7_CLIP_SCREENSPACE 1 |
| 393 | |
| 394 | #define GEN7_COMPAREFUNCTION_ALWAYS 0 |
| 395 | #define GEN7_COMPAREFUNCTION_NEVER 1 |
| 396 | #define GEN7_COMPAREFUNCTION_LESS 2 |
| 397 | #define GEN7_COMPAREFUNCTION_EQUAL 3 |
| 398 | #define GEN7_COMPAREFUNCTION_LEQUAL 4 |
| 399 | #define GEN7_COMPAREFUNCTION_GREATER 5 |
| 400 | #define GEN7_COMPAREFUNCTION_NOTEQUAL 6 |
| 401 | #define GEN7_COMPAREFUNCTION_GEQUAL 7 |
| 402 | |
| 403 | #define GEN7_COVERAGE_PIXELS_HALF 0 |
| 404 | #define GEN7_COVERAGE_PIXELS_1 1 |
| 405 | #define GEN7_COVERAGE_PIXELS_2 2 |
| 406 | #define GEN7_COVERAGE_PIXELS_4 3 |
| 407 | |
| 408 | #define GEN7_CULLMODE_BOTH 0 |
| 409 | #define GEN7_CULLMODE_NONE 1 |
| 410 | #define GEN7_CULLMODE_FRONT 2 |
| 411 | #define GEN7_CULLMODE_BACK 3 |
| 412 | |
| 413 | #define GEN7_DEFAULTCOLOR_R8G8B8A8_UNORM 0 |
| 414 | #define GEN7_DEFAULTCOLOR_R32G32B32A32_FLOAT 1 |
| 415 | |
| 416 | #define GEN7_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0 |
| 417 | #define GEN7_DEPTHFORMAT_D32_FLOAT 1 |
| 418 | #define GEN7_DEPTHFORMAT_D24_UNORM_S8_UINT 2 |
| 419 | #define GEN7_DEPTHFORMAT_D16_UNORM 5 |
| 420 | |
| 421 | #define GEN7_FLOATING_POINT_IEEE_754 0 |
| 422 | #define GEN7_FLOATING_POINT_NON_IEEE_754 1 |
| 423 | |
| 424 | #define GEN7_FRONTWINDING_CW 0 |
| 425 | #define GEN7_FRONTWINDING_CCW 1 |
| 426 | |
| 427 | #define GEN7_INDEX_BYTE 0 |
| 428 | #define GEN7_INDEX_WORD 1 |
| 429 | #define GEN7_INDEX_DWORD 2 |
| 430 | |
| 431 | #define GEN7_LOGICOPFUNCTION_CLEAR 0 |
| 432 | #define GEN7_LOGICOPFUNCTION_NOR 1 |
| 433 | #define GEN7_LOGICOPFUNCTION_AND_INVERTED 2 |
| 434 | #define GEN7_LOGICOPFUNCTION_COPY_INVERTED 3 |
| 435 | #define GEN7_LOGICOPFUNCTION_AND_REVERSE 4 |
| 436 | #define GEN7_LOGICOPFUNCTION_INVERT 5 |
| 437 | #define GEN7_LOGICOPFUNCTION_XOR 6 |
| 438 | #define GEN7_LOGICOPFUNCTION_NAND 7 |
| 439 | #define GEN7_LOGICOPFUNCTION_AND 8 |
| 440 | #define GEN7_LOGICOPFUNCTION_EQUIV 9 |
| 441 | #define GEN7_LOGICOPFUNCTION_NOOP 10 |
| 442 | #define GEN7_LOGICOPFUNCTION_OR_INVERTED 11 |
| 443 | #define GEN7_LOGICOPFUNCTION_COPY 12 |
| 444 | #define GEN7_LOGICOPFUNCTION_OR_REVERSE 13 |
| 445 | #define GEN7_LOGICOPFUNCTION_OR 14 |
| 446 | #define GEN7_LOGICOPFUNCTION_SET 15 |
| 447 | |
| 448 | #define GEN7_MAPFILTER_NEAREST 0x0 |
| 449 | #define GEN7_MAPFILTER_LINEAR 0x1 |
| 450 | #define GEN7_MAPFILTER_ANISOTROPIC 0x2 |
| 451 | |
| 452 | #define GEN7_MIPFILTER_NONE 0 |
| 453 | #define GEN7_MIPFILTER_NEAREST 1 |
| 454 | #define GEN7_MIPFILTER_LINEAR 3 |
| 455 | |
| 456 | #define GEN7_POLYGON_FRONT_FACING 0 |
| 457 | #define GEN7_POLYGON_BACK_FACING 1 |
| 458 | |
| 459 | #define GEN7_PREFILTER_ALWAYS 0x0 |
| 460 | #define GEN7_PREFILTER_NEVER 0x1 |
| 461 | #define GEN7_PREFILTER_LESS 0x2 |
| 462 | #define GEN7_PREFILTER_EQUAL 0x3 |
| 463 | #define GEN7_PREFILTER_LEQUAL 0x4 |
| 464 | #define GEN7_PREFILTER_GREATER 0x5 |
| 465 | #define GEN7_PREFILTER_NOTEQUAL 0x6 |
| 466 | #define GEN7_PREFILTER_GEQUAL 0x7 |
| 467 | |
| 468 | #define GEN7_PROVOKING_VERTEX_0 0 |
| 469 | #define GEN7_PROVOKING_VERTEX_1 1 |
| 470 | #define GEN7_PROVOKING_VERTEX_2 2 |
| 471 | |
| 472 | #define GEN7_RASTRULE_UPPER_LEFT 0 |
| 473 | #define GEN7_RASTRULE_UPPER_RIGHT 1 |
| 474 | |
| 475 | #define GEN7_RENDERTARGET_CLAMPRANGE_UNORM 0 |
| 476 | #define GEN7_RENDERTARGET_CLAMPRANGE_SNORM 1 |
| 477 | #define GEN7_RENDERTARGET_CLAMPRANGE_FORMAT 2 |
| 478 | |
| 479 | #define GEN7_STENCILOP_KEEP 0 |
| 480 | #define GEN7_STENCILOP_ZERO 1 |
| 481 | #define GEN7_STENCILOP_REPLACE 2 |
| 482 | #define GEN7_STENCILOP_INCRSAT 3 |
| 483 | #define GEN7_STENCILOP_DECRSAT 4 |
| 484 | #define GEN7_STENCILOP_INCR 5 |
| 485 | #define GEN7_STENCILOP_DECR 6 |
| 486 | #define GEN7_STENCILOP_INVERT 7 |
| 487 | |
| 488 | #define GEN7_SURFACE_MIPMAPLAYOUT_BELOW 0 |
| 489 | #define GEN7_SURFACE_MIPMAPLAYOUT_RIGHT 1 |
| 490 | |
| 491 | #define GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 |
| 492 | #define GEN7_SURFACEFORMAT_R32G32B32A32_SINT 0x001 |
| 493 | #define GEN7_SURFACEFORMAT_R32G32B32A32_UINT 0x002 |
| 494 | #define GEN7_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 |
| 495 | #define GEN7_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 |
| 496 | #define GEN7_SURFACEFORMAT_R64G64_FLOAT 0x005 |
| 497 | #define GEN7_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 |
| 498 | #define GEN7_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 |
| 499 | #define GEN7_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 |
| 500 | #define GEN7_SURFACEFORMAT_R32G32B32_FLOAT 0x040 |
| 501 | #define GEN7_SURFACEFORMAT_R32G32B32_SINT 0x041 |
| 502 | #define GEN7_SURFACEFORMAT_R32G32B32_UINT 0x042 |
| 503 | #define GEN7_SURFACEFORMAT_R32G32B32_UNORM 0x043 |
| 504 | #define GEN7_SURFACEFORMAT_R32G32B32_SNORM 0x044 |
| 505 | #define GEN7_SURFACEFORMAT_R32G32B32_SSCALED 0x045 |
| 506 | #define GEN7_SURFACEFORMAT_R32G32B32_USCALED 0x046 |
| 507 | #define GEN7_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 |
| 508 | #define GEN7_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 |
| 509 | #define GEN7_SURFACEFORMAT_R16G16B16A16_SINT 0x082 |
| 510 | #define GEN7_SURFACEFORMAT_R16G16B16A16_UINT 0x083 |
| 511 | #define GEN7_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 |
| 512 | #define GEN7_SURFACEFORMAT_R32G32_FLOAT 0x085 |
| 513 | #define GEN7_SURFACEFORMAT_R32G32_SINT 0x086 |
| 514 | #define GEN7_SURFACEFORMAT_R32G32_UINT 0x087 |
| 515 | #define GEN7_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 |
| 516 | #define GEN7_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 |
| 517 | #define GEN7_SURFACEFORMAT_L32A32_FLOAT 0x08A |
| 518 | #define GEN7_SURFACEFORMAT_R32G32_UNORM 0x08B |
| 519 | #define GEN7_SURFACEFORMAT_R32G32_SNORM 0x08C |
| 520 | #define GEN7_SURFACEFORMAT_R64_FLOAT 0x08D |
| 521 | #define GEN7_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E |
| 522 | #define GEN7_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F |
| 523 | #define GEN7_SURFACEFORMAT_A32X32_FLOAT 0x090 |
| 524 | #define GEN7_SURFACEFORMAT_L32X32_FLOAT 0x091 |
| 525 | #define GEN7_SURFACEFORMAT_I32X32_FLOAT 0x092 |
| 526 | #define GEN7_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 |
| 527 | #define GEN7_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 |
| 528 | #define GEN7_SURFACEFORMAT_R32G32_SSCALED 0x095 |
| 529 | #define GEN7_SURFACEFORMAT_R32G32_USCALED 0x096 |
| 530 | #define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 |
| 531 | #define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 |
| 532 | #define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 |
| 533 | #define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 |
| 534 | #define GEN7_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 |
| 535 | #define GEN7_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 |
| 536 | #define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 |
| 537 | #define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 |
| 538 | #define GEN7_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 |
| 539 | #define GEN7_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA |
| 540 | #define GEN7_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB |
| 541 | #define GEN7_SURFACEFORMAT_R16G16_UNORM 0x0CC |
| 542 | #define GEN7_SURFACEFORMAT_R16G16_SNORM 0x0CD |
| 543 | #define GEN7_SURFACEFORMAT_R16G16_SINT 0x0CE |
| 544 | #define GEN7_SURFACEFORMAT_R16G16_UINT 0x0CF |
| 545 | #define GEN7_SURFACEFORMAT_R16G16_FLOAT 0x0D0 |
| 546 | #define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 |
| 547 | #define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 |
| 548 | #define GEN7_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 |
| 549 | #define GEN7_SURFACEFORMAT_R32_SINT 0x0D6 |
| 550 | #define GEN7_SURFACEFORMAT_R32_UINT 0x0D7 |
| 551 | #define GEN7_SURFACEFORMAT_R32_FLOAT 0x0D8 |
| 552 | #define GEN7_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 |
| 553 | #define GEN7_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA |
| 554 | #define GEN7_SURFACEFORMAT_L16A16_UNORM 0x0DF |
| 555 | #define GEN7_SURFACEFORMAT_I24X8_UNORM 0x0E0 |
| 556 | #define GEN7_SURFACEFORMAT_L24X8_UNORM 0x0E1 |
| 557 | #define GEN7_SURFACEFORMAT_A24X8_UNORM 0x0E2 |
| 558 | #define GEN7_SURFACEFORMAT_I32_FLOAT 0x0E3 |
| 559 | #define GEN7_SURFACEFORMAT_L32_FLOAT 0x0E4 |
| 560 | #define GEN7_SURFACEFORMAT_A32_FLOAT 0x0E5 |
| 561 | #define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 |
| 562 | #define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA |
| 563 | #define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB |
| 564 | #define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC |
| 565 | #define GEN7_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED |
| 566 | #define GEN7_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE |
| 567 | #define GEN7_SURFACEFORMAT_L16A16_FLOAT 0x0F0 |
| 568 | #define GEN7_SURFACEFORMAT_R32_UNORM 0x0F1 |
| 569 | #define GEN7_SURFACEFORMAT_R32_SNORM 0x0F2 |
| 570 | #define GEN7_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 |
| 571 | #define GEN7_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 |
| 572 | #define GEN7_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 |
| 573 | #define GEN7_SURFACEFORMAT_R16G16_SSCALED 0x0F6 |
| 574 | #define GEN7_SURFACEFORMAT_R16G16_USCALED 0x0F7 |
| 575 | #define GEN7_SURFACEFORMAT_R32_SSCALED 0x0F8 |
| 576 | #define GEN7_SURFACEFORMAT_R32_USCALED 0x0F9 |
| 577 | #define GEN7_SURFACEFORMAT_B5G6R5_UNORM 0x100 |
| 578 | #define GEN7_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 |
| 579 | #define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 |
| 580 | #define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 |
| 581 | #define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 |
| 582 | #define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 |
| 583 | #define GEN7_SURFACEFORMAT_R8G8_UNORM 0x106 |
| 584 | #define GEN7_SURFACEFORMAT_R8G8_SNORM 0x107 |
| 585 | #define GEN7_SURFACEFORMAT_R8G8_SINT 0x108 |
| 586 | #define GEN7_SURFACEFORMAT_R8G8_UINT 0x109 |
| 587 | #define GEN7_SURFACEFORMAT_R16_UNORM 0x10A |
| 588 | #define GEN7_SURFACEFORMAT_R16_SNORM 0x10B |
| 589 | #define GEN7_SURFACEFORMAT_R16_SINT 0x10C |
| 590 | #define GEN7_SURFACEFORMAT_R16_UINT 0x10D |
| 591 | #define GEN7_SURFACEFORMAT_R16_FLOAT 0x10E |
| 592 | #define GEN7_SURFACEFORMAT_I16_UNORM 0x111 |
| 593 | #define GEN7_SURFACEFORMAT_L16_UNORM 0x112 |
| 594 | #define GEN7_SURFACEFORMAT_A16_UNORM 0x113 |
| 595 | #define GEN7_SURFACEFORMAT_L8A8_UNORM 0x114 |
| 596 | #define GEN7_SURFACEFORMAT_I16_FLOAT 0x115 |
| 597 | #define GEN7_SURFACEFORMAT_L16_FLOAT 0x116 |
| 598 | #define GEN7_SURFACEFORMAT_A16_FLOAT 0x117 |
| 599 | #define GEN7_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 |
| 600 | #define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A |
| 601 | #define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B |
| 602 | #define GEN7_SURFACEFORMAT_R8G8_SSCALED 0x11C |
| 603 | #define GEN7_SURFACEFORMAT_R8G8_USCALED 0x11D |
| 604 | #define GEN7_SURFACEFORMAT_R16_SSCALED 0x11E |
| 605 | #define GEN7_SURFACEFORMAT_R16_USCALED 0x11F |
| 606 | #define GEN7_SURFACEFORMAT_R8_UNORM 0x140 |
| 607 | #define GEN7_SURFACEFORMAT_R8_SNORM 0x141 |
| 608 | #define GEN7_SURFACEFORMAT_R8_SINT 0x142 |
| 609 | #define GEN7_SURFACEFORMAT_R8_UINT 0x143 |
| 610 | #define GEN7_SURFACEFORMAT_A8_UNORM 0x144 |
| 611 | #define GEN7_SURFACEFORMAT_I8_UNORM 0x145 |
| 612 | #define GEN7_SURFACEFORMAT_L8_UNORM 0x146 |
| 613 | #define GEN7_SURFACEFORMAT_P4A4_UNORM 0x147 |
| 614 | #define GEN7_SURFACEFORMAT_A4P4_UNORM 0x148 |
| 615 | #define GEN7_SURFACEFORMAT_R8_SSCALED 0x149 |
| 616 | #define GEN7_SURFACEFORMAT_R8_USCALED 0x14A |
| 617 | #define GEN7_SURFACEFORMAT_R1_UINT 0x181 |
| 618 | #define GEN7_SURFACEFORMAT_YCRCB_NORMAL 0x182 |
| 619 | #define GEN7_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 |
| 620 | #define GEN7_SURFACEFORMAT_BC1_UNORM 0x186 |
| 621 | #define GEN7_SURFACEFORMAT_BC2_UNORM 0x187 |
| 622 | #define GEN7_SURFACEFORMAT_BC3_UNORM 0x188 |
| 623 | #define GEN7_SURFACEFORMAT_BC4_UNORM 0x189 |
| 624 | #define GEN7_SURFACEFORMAT_BC5_UNORM 0x18A |
| 625 | #define GEN7_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B |
| 626 | #define GEN7_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C |
| 627 | #define GEN7_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D |
| 628 | #define GEN7_SURFACEFORMAT_MONO8 0x18E |
| 629 | #define GEN7_SURFACEFORMAT_YCRCB_SWAPUV 0x18F |
| 630 | #define GEN7_SURFACEFORMAT_YCRCB_SWAPY 0x190 |
| 631 | #define GEN7_SURFACEFORMAT_DXT1_RGB 0x191 |
| 632 | #define GEN7_SURFACEFORMAT_FXT1 0x192 |
| 633 | #define GEN7_SURFACEFORMAT_R8G8B8_UNORM 0x193 |
| 634 | #define GEN7_SURFACEFORMAT_R8G8B8_SNORM 0x194 |
| 635 | #define GEN7_SURFACEFORMAT_R8G8B8_SSCALED 0x195 |
| 636 | #define GEN7_SURFACEFORMAT_R8G8B8_USCALED 0x196 |
| 637 | #define GEN7_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 |
| 638 | #define GEN7_SURFACEFORMAT_R64G64B64_FLOAT 0x198 |
| 639 | #define GEN7_SURFACEFORMAT_BC4_SNORM 0x199 |
| 640 | #define GEN7_SURFACEFORMAT_BC5_SNORM 0x19A |
| 641 | #define GEN7_SURFACEFORMAT_R16G16B16_UNORM 0x19C |
| 642 | #define GEN7_SURFACEFORMAT_R16G16B16_SNORM 0x19D |
| 643 | #define GEN7_SURFACEFORMAT_R16G16B16_SSCALED 0x19E |
| 644 | #define GEN7_SURFACEFORMAT_R16G16B16_USCALED 0x19F |
| 645 | |
| 646 | #define GEN7_SURFACERETURNFORMAT_FLOAT32 0 |
| 647 | #define GEN7_SURFACERETURNFORMAT_S1 1 |
| 648 | |
| 649 | #define GEN7_SURFACE_1D 0 |
| 650 | #define GEN7_SURFACE_2D 1 |
| 651 | #define GEN7_SURFACE_3D 2 |
| 652 | #define GEN7_SURFACE_CUBE 3 |
| 653 | #define GEN7_SURFACE_BUFFER 4 |
| 654 | #define GEN7_SURFACE_NULL 7 |
| 655 | |
| 656 | #define GEN7_BORDER_COLOR_MODE_DEFAULT 0 |
| 657 | #define GEN7_BORDER_COLOR_MODE_LEGACY 1 |
| 658 | |
| 659 | #define GEN7_TEXCOORDMODE_WRAP 0 |
| 660 | #define GEN7_TEXCOORDMODE_MIRROR 1 |
| 661 | #define GEN7_TEXCOORDMODE_CLAMP 2 |
| 662 | #define GEN7_TEXCOORDMODE_CUBE 3 |
| 663 | #define GEN7_TEXCOORDMODE_CLAMP_BORDER 4 |
| 664 | #define GEN7_TEXCOORDMODE_MIRROR_ONCE 5 |
| 665 | |
| 666 | #define GEN7_THREAD_PRIORITY_NORMAL 0 |
| 667 | #define GEN7_THREAD_PRIORITY_HIGH 1 |
| 668 | |
| 669 | #define GEN7_TILEWALK_XMAJOR 0 |
| 670 | #define GEN7_TILEWALK_YMAJOR 1 |
| 671 | |
| 672 | #define GEN7_VERTEX_SUBPIXEL_PRECISION_8BITS 0 |
| 673 | #define GEN7_VERTEX_SUBPIXEL_PRECISION_4BITS 1 |
| 674 | |
| 675 | #define GEN7_VERTEXBUFFER_ACCESS_VERTEXDATA 0 |
| 676 | #define GEN7_VERTEXBUFFER_ACCESS_INSTANCEDATA 1 |
| 677 | |
| 678 | #define GEN7_VFCOMPONENT_NOSTORE 0 |
| 679 | #define GEN7_VFCOMPONENT_STORE_SRC 1 |
| 680 | #define GEN7_VFCOMPONENT_STORE_0 2 |
| 681 | #define GEN7_VFCOMPONENT_STORE_1_FLT 3 |
| 682 | #define GEN7_VFCOMPONENT_STORE_1_INT 4 |
| 683 | #define GEN7_VFCOMPONENT_STORE_VID 5 |
| 684 | #define GEN7_VFCOMPONENT_STORE_IID 6 |
| 685 | #define GEN7_VFCOMPONENT_STORE_PID 7 |
| 686 | |
| 687 | |
| 688 | /* Execution Unit (EU) defines |
| 689 | */ |
| 690 | |
| 691 | #define GEN7_ALIGN_1 0 |
| 692 | #define GEN7_ALIGN_16 1 |
| 693 | |
| 694 | #define GEN7_ADDRESS_DIRECT 0 |
| 695 | #define GEN7_ADDRESS_REGISTER_INDIRECT_REGISTER 1 |
| 696 | |
| 697 | #define GEN7_CHANNEL_X 0 |
| 698 | #define GEN7_CHANNEL_Y 1 |
| 699 | #define GEN7_CHANNEL_Z 2 |
| 700 | #define GEN7_CHANNEL_W 3 |
| 701 | |
| 702 | #define GEN7_COMPRESSION_NONE 0 |
| 703 | #define GEN7_COMPRESSION_2NDHALF 1 |
| 704 | #define GEN7_COMPRESSION_COMPRESSED 2 |
| 705 | |
| 706 | #define GEN7_CONDITIONAL_NONE 0 |
| 707 | #define GEN7_CONDITIONAL_Z 1 |
| 708 | #define GEN7_CONDITIONAL_NZ 2 |
| 709 | #define GEN7_CONDITIONAL_EQ 1 /* Z */ |
| 710 | #define GEN7_CONDITIONAL_NEQ 2 /* NZ */ |
| 711 | #define GEN7_CONDITIONAL_G 3 |
| 712 | #define GEN7_CONDITIONAL_GE 4 |
| 713 | #define GEN7_CONDITIONAL_L 5 |
| 714 | #define GEN7_CONDITIONAL_LE 6 |
| 715 | #define GEN7_CONDITIONAL_C 7 |
| 716 | #define GEN7_CONDITIONAL_O 8 |
| 717 | |
| 718 | #define GEN7_DEBUG_NONE 0 |
| 719 | #define GEN7_DEBUG_BREAKPOINT 1 |
| 720 | |
| 721 | #define GEN7_DEPENDENCY_NORMAL 0 |
| 722 | #define GEN7_DEPENDENCY_NOTCLEARED 1 |
| 723 | #define GEN7_DEPENDENCY_NOTCHECKED 2 |
| 724 | #define GEN7_DEPENDENCY_DISABLE 3 |
| 725 | |
| 726 | #define GEN7_EXECUTE_1 0 |
| 727 | #define GEN7_EXECUTE_2 1 |
| 728 | #define GEN7_EXECUTE_4 2 |
| 729 | #define GEN7_EXECUTE_8 3 |
| 730 | #define GEN7_EXECUTE_16 4 |
| 731 | #define GEN7_EXECUTE_32 5 |
| 732 | |
| 733 | #define GEN7_HORIZONTAL_STRIDE_0 0 |
| 734 | #define GEN7_HORIZONTAL_STRIDE_1 1 |
| 735 | #define GEN7_HORIZONTAL_STRIDE_2 2 |
| 736 | #define GEN7_HORIZONTAL_STRIDE_4 3 |
| 737 | |
| 738 | #define GEN7_INSTRUCTION_NORMAL 0 |
| 739 | #define GEN7_INSTRUCTION_SATURATE 1 |
| 740 | |
| 741 | #define INTEL_MASK_ENABLE 0 |
| 742 | #define INTEL_MASK_DISABLE 1 |
| 743 | |
| 744 | #define GEN7_OPCODE_MOV 1 |
| 745 | #define GEN7_OPCODE_SEL 2 |
| 746 | #define GEN7_OPCODE_NOT 4 |
| 747 | #define GEN7_OPCODE_AND 5 |
| 748 | #define GEN7_OPCODE_OR 6 |
| 749 | #define GEN7_OPCODE_XOR 7 |
| 750 | #define GEN7_OPCODE_SHR 8 |
| 751 | #define GEN7_OPCODE_SHL 9 |
| 752 | #define GEN7_OPCODE_RSR 10 |
| 753 | #define GEN7_OPCODE_RSL 11 |
| 754 | #define GEN7_OPCODE_ASR 12 |
| 755 | #define GEN7_OPCODE_CMP 16 |
| 756 | #define GEN7_OPCODE_JMPI 32 |
| 757 | #define GEN7_OPCODE_IF 34 |
| 758 | #define GEN7_OPCODE_IFF 35 |
| 759 | #define GEN7_OPCODE_ELSE 36 |
| 760 | #define GEN7_OPCODE_ENDIF 37 |
| 761 | #define GEN7_OPCODE_DO 38 |
| 762 | #define GEN7_OPCODE_WHILE 39 |
| 763 | #define GEN7_OPCODE_BREAK 40 |
| 764 | #define GEN7_OPCODE_CONTINUE 41 |
| 765 | #define GEN7_OPCODE_HALT 42 |
| 766 | #define GEN7_OPCODE_MSAVE 44 |
| 767 | #define GEN7_OPCODE_MRESTORE 45 |
| 768 | #define GEN7_OPCODE_PUSH 46 |
| 769 | #define GEN7_OPCODE_POP 47 |
| 770 | #define GEN7_OPCODE_WAIT 48 |
| 771 | #define GEN7_OPCODE_SEND 49 |
| 772 | #define GEN7_OPCODE_ADD 64 |
| 773 | #define GEN7_OPCODE_MUL 65 |
| 774 | #define GEN7_OPCODE_AVG 66 |
| 775 | #define GEN7_OPCODE_FRC 67 |
| 776 | #define GEN7_OPCODE_RNDU 68 |
| 777 | #define GEN7_OPCODE_RNDD 69 |
| 778 | #define GEN7_OPCODE_RNDE 70 |
| 779 | #define GEN7_OPCODE_RNDZ 71 |
| 780 | #define GEN7_OPCODE_MAC 72 |
| 781 | #define GEN7_OPCODE_MACH 73 |
| 782 | #define GEN7_OPCODE_LZD 74 |
| 783 | #define GEN7_OPCODE_SAD2 80 |
| 784 | #define GEN7_OPCODE_SADA2 81 |
| 785 | #define GEN7_OPCODE_DP4 84 |
| 786 | #define GEN7_OPCODE_DPH 85 |
| 787 | #define GEN7_OPCODE_DP3 86 |
| 788 | #define GEN7_OPCODE_DP2 87 |
| 789 | #define GEN7_OPCODE_DPA2 88 |
| 790 | #define GEN7_OPCODE_LINE 89 |
| 791 | #define GEN7_OPCODE_NOP 126 |
| 792 | |
| 793 | #define GEN7_PREDICATE_NONE 0 |
| 794 | #define GEN7_PREDICATE_NORMAL 1 |
| 795 | #define GEN7_PREDICATE_ALIGN1_ANYV 2 |
| 796 | #define GEN7_PREDICATE_ALIGN1_ALLV 3 |
| 797 | #define GEN7_PREDICATE_ALIGN1_ANY2H 4 |
| 798 | #define GEN7_PREDICATE_ALIGN1_ALL2H 5 |
| 799 | #define GEN7_PREDICATE_ALIGN1_ANY4H 6 |
| 800 | #define GEN7_PREDICATE_ALIGN1_ALL4H 7 |
| 801 | #define GEN7_PREDICATE_ALIGN1_ANY8H 8 |
| 802 | #define GEN7_PREDICATE_ALIGN1_ALL8H 9 |
| 803 | #define GEN7_PREDICATE_ALIGN1_ANY16H 10 |
| 804 | #define GEN7_PREDICATE_ALIGN1_ALL16H 11 |
| 805 | #define GEN7_PREDICATE_ALIGN16_REPLICATE_X 2 |
| 806 | #define GEN7_PREDICATE_ALIGN16_REPLICATE_Y 3 |
| 807 | #define GEN7_PREDICATE_ALIGN16_REPLICATE_Z 4 |
| 808 | #define GEN7_PREDICATE_ALIGN16_REPLICATE_W 5 |
| 809 | #define GEN7_PREDICATE_ALIGN16_ANY4H 6 |
| 810 | #define GEN7_PREDICATE_ALIGN16_ALL4H 7 |
| 811 | |
| 812 | #define GEN7_ARCHITECTURE_REGISTER_FILE 0 |
| 813 | #define GEN7_GENERAL_REGISTER_FILE 1 |
| 814 | #define GEN7_MESSAGE_REGISTER_FILE 2 |
| 815 | #define GEN7_IMMEDIATE_VALUE 3 |
| 816 | |
| 817 | #define GEN7_REGISTER_TYPE_UD 0 |
| 818 | #define GEN7_REGISTER_TYPE_D 1 |
| 819 | #define GEN7_REGISTER_TYPE_UW 2 |
| 820 | #define GEN7_REGISTER_TYPE_W 3 |
| 821 | #define GEN7_REGISTER_TYPE_UB 4 |
| 822 | #define GEN7_REGISTER_TYPE_B 5 |
| 823 | #define GEN7_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ |
| 824 | #define GEN7_REGISTER_TYPE_HF 6 |
| 825 | #define GEN7_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ |
| 826 | #define GEN7_REGISTER_TYPE_F 7 |
| 827 | |
| 828 | #define GEN7_ARF_NULL 0x00 |
| 829 | #define GEN7_ARF_ADDRESS 0x10 |
| 830 | #define GEN7_ARF_ACCUMULATOR 0x20 |
| 831 | #define GEN7_ARF_FLAG 0x30 |
| 832 | #define GEN7_ARF_MASK 0x40 |
| 833 | #define GEN7_ARF_MASK_STACK 0x50 |
| 834 | #define GEN7_ARF_MASK_STACK_DEPTH 0x60 |
| 835 | #define GEN7_ARF_STATE 0x70 |
| 836 | #define GEN7_ARF_CONTROL 0x80 |
| 837 | #define GEN7_ARF_NOTIFICATION_COUNT 0x90 |
| 838 | #define GEN7_ARF_IP 0xA0 |
| 839 | |
| 840 | #define GEN7_AMASK 0 |
| 841 | #define GEN7_IMASK 1 |
| 842 | #define GEN7_LMASK 2 |
| 843 | #define GEN7_CMASK 3 |
| 844 | |
| 845 | #define GEN7_THREAD_NORMAL 0 |
| 846 | #define GEN7_THREAD_ATOMIC 1 |
| 847 | #define GEN7_THREAD_SWITCH 2 |
| 848 | |
| 849 | #define GEN7_VERTICAL_STRIDE_0 0 |
| 850 | #define GEN7_VERTICAL_STRIDE_1 1 |
| 851 | #define GEN7_VERTICAL_STRIDE_2 2 |
| 852 | #define GEN7_VERTICAL_STRIDE_4 3 |
| 853 | #define GEN7_VERTICAL_STRIDE_8 4 |
| 854 | #define GEN7_VERTICAL_STRIDE_16 5 |
| 855 | #define GEN7_VERTICAL_STRIDE_32 6 |
| 856 | #define GEN7_VERTICAL_STRIDE_64 7 |
| 857 | #define GEN7_VERTICAL_STRIDE_128 8 |
| 858 | #define GEN7_VERTICAL_STRIDE_256 9 |
| 859 | #define GEN7_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF |
| 860 | |
| 861 | #define GEN7_WIDTH_1 0 |
| 862 | #define GEN7_WIDTH_2 1 |
| 863 | #define GEN7_WIDTH_4 2 |
| 864 | #define GEN7_WIDTH_8 3 |
| 865 | #define GEN7_WIDTH_16 4 |
| 866 | |
| 867 | #define GEN7_STATELESS_BUFFER_BOUNDARY_1K 0 |
| 868 | #define GEN7_STATELESS_BUFFER_BOUNDARY_2K 1 |
| 869 | #define GEN7_STATELESS_BUFFER_BOUNDARY_4K 2 |
| 870 | #define GEN7_STATELESS_BUFFER_BOUNDARY_8K 3 |
| 871 | #define GEN7_STATELESS_BUFFER_BOUNDARY_16K 4 |
| 872 | #define GEN7_STATELESS_BUFFER_BOUNDARY_32K 5 |
| 873 | #define GEN7_STATELESS_BUFFER_BOUNDARY_64K 6 |
| 874 | #define GEN7_STATELESS_BUFFER_BOUNDARY_128K 7 |
| 875 | #define GEN7_STATELESS_BUFFER_BOUNDARY_256K 8 |
| 876 | #define GEN7_STATELESS_BUFFER_BOUNDARY_512K 9 |
| 877 | #define GEN7_STATELESS_BUFFER_BOUNDARY_1M 10 |
| 878 | #define GEN7_STATELESS_BUFFER_BOUNDARY_2M 11 |
| 879 | |
| 880 | #define GEN7_POLYGON_FACING_FRONT 0 |
| 881 | #define GEN7_POLYGON_FACING_BACK 1 |
| 882 | |
| 883 | #define GEN7_MESSAGE_TARGET_NULL 0 |
| 884 | #define GEN7_MESSAGE_TARGET_MATH 1 |
| 885 | #define GEN7_MESSAGE_TARGET_SAMPLER 2 |
| 886 | #define GEN7_MESSAGE_TARGET_GATEWAY 3 |
| 887 | #define GEN7_MESSAGE_TARGET_DATAPORT_READ 4 |
| 888 | #define GEN7_MESSAGE_TARGET_DATAPORT_WRITE 5 |
| 889 | #define GEN7_MESSAGE_TARGET_URB 6 |
| 890 | #define GEN7_MESSAGE_TARGET_THREAD_SPAWNER 7 |
| 891 | |
| 892 | #define GEN7_SAMPLER_RETURN_FORMAT_FLOAT32 0 |
| 893 | #define GEN7_SAMPLER_RETURN_FORMAT_UINT32 2 |
| 894 | #define GEN7_SAMPLER_RETURN_FORMAT_SINT32 3 |
| 895 | |
| 896 | #define GEN7_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 |
| 897 | #define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 |
| 898 | #define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 |
| 899 | #define GEN7_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 |
| 900 | #define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 |
| 901 | #define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 |
| 902 | #define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 |
| 903 | #define GEN7_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 |
| 904 | #define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 |
| 905 | #define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 |
| 906 | #define GEN7_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 |
| 907 | #define GEN7_SAMPLER_MESSAGE_SIMD8_RESINFO 2 |
| 908 | #define GEN7_SAMPLER_MESSAGE_SIMD16_RESINFO 2 |
| 909 | #define GEN7_SAMPLER_MESSAGE_SIMD4X2_LD 3 |
| 910 | #define GEN7_SAMPLER_MESSAGE_SIMD8_LD 3 |
| 911 | #define GEN7_SAMPLER_MESSAGE_SIMD16_LD 3 |
| 912 | |
| 913 | #define GEN7_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 |
| 914 | #define GEN7_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 |
| 915 | #define GEN7_DATAPORT_OWORD_BLOCK_2_OWORDS 2 |
| 916 | #define GEN7_DATAPORT_OWORD_BLOCK_4_OWORDS 3 |
| 917 | #define GEN7_DATAPORT_OWORD_BLOCK_8_OWORDS 4 |
| 918 | |
| 919 | #define GEN7_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 |
| 920 | #define GEN7_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 |
| 921 | |
| 922 | #define GEN7_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 |
| 923 | #define GEN7_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 |
| 924 | |
| 925 | #define GEN7_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 |
| 926 | #define GEN7_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1 |
| 927 | #define GEN7_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2 |
| 928 | #define GEN7_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3 |
| 929 | |
| 930 | #define GEN7_DATAPORT_READ_TARGET_DATA_CACHE 0 |
| 931 | #define GEN7_DATAPORT_READ_TARGET_RENDER_CACHE 1 |
| 932 | #define GEN7_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 |
| 933 | |
| 934 | #define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 |
| 935 | #define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 |
| 936 | #define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 |
| 937 | #define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 |
| 938 | #define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 |
| 939 | |
| 940 | #define GEN7_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0 |
| 941 | #define GEN7_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1 |
| 942 | #define GEN7_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2 |
| 943 | #define GEN7_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3 |
| 944 | #define GEN7_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4 |
| 945 | #define GEN7_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5 |
| 946 | #define GEN7_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7 |
| 947 | |
| 948 | #define GEN7_MATH_FUNCTION_INV 1 |
| 949 | #define GEN7_MATH_FUNCTION_LOG 2 |
| 950 | #define GEN7_MATH_FUNCTION_EXP 3 |
| 951 | #define GEN7_MATH_FUNCTION_SQRT 4 |
| 952 | #define GEN7_MATH_FUNCTION_RSQ 5 |
| 953 | #define GEN7_MATH_FUNCTION_SIN 6 /* was 7 */ |
| 954 | #define GEN7_MATH_FUNCTION_COS 7 /* was 8 */ |
| 955 | #define GEN7_MATH_FUNCTION_SINCOS 8 /* was 6 */ |
| 956 | #define GEN7_MATH_FUNCTION_TAN 9 |
| 957 | #define GEN7_MATH_FUNCTION_POW 10 |
| 958 | #define GEN7_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11 |
| 959 | #define GEN7_MATH_FUNCTION_INT_DIV_QUOTIENT 12 |
| 960 | #define GEN7_MATH_FUNCTION_INT_DIV_REMAINDER 13 |
| 961 | |
| 962 | #define GEN7_MATH_INTEGER_UNSIGNED 0 |
| 963 | #define GEN7_MATH_INTEGER_SIGNED 1 |
| 964 | |
| 965 | #define GEN7_MATH_PRECISION_FULL 0 |
| 966 | #define GEN7_MATH_PRECISION_PARTIAL 1 |
| 967 | |
| 968 | #define GEN7_MATH_SATURATE_NONE 0 |
| 969 | #define GEN7_MATH_SATURATE_SATURATE 1 |
| 970 | |
| 971 | #define GEN7_MATH_DATA_VECTOR 0 |
| 972 | #define GEN7_MATH_DATA_SCALAR 1 |
| 973 | |
| 974 | #define GEN7_URB_OPCODE_WRITE 0 |
| 975 | |
| 976 | #define GEN7_URB_SWIZZLE_NONE 0 |
| 977 | #define GEN7_URB_SWIZZLE_INTERLEAVE 1 |
| 978 | #define GEN7_URB_SWIZZLE_TRANSPOSE 2 |
| 979 | |
| 980 | #define GEN7_SCRATCH_SPACE_SIZE_1K 0 |
| 981 | #define GEN7_SCRATCH_SPACE_SIZE_2K 1 |
| 982 | #define GEN7_SCRATCH_SPACE_SIZE_4K 2 |
| 983 | #define GEN7_SCRATCH_SPACE_SIZE_8K 3 |
| 984 | #define GEN7_SCRATCH_SPACE_SIZE_16K 4 |
| 985 | #define GEN7_SCRATCH_SPACE_SIZE_32K 5 |
| 986 | #define GEN7_SCRATCH_SPACE_SIZE_64K 6 |
| 987 | #define GEN7_SCRATCH_SPACE_SIZE_128K 7 |
| 988 | #define GEN7_SCRATCH_SPACE_SIZE_256K 8 |
| 989 | #define GEN7_SCRATCH_SPACE_SIZE_512K 9 |
| 990 | #define GEN7_SCRATCH_SPACE_SIZE_1M 10 |
| 991 | #define GEN7_SCRATCH_SPACE_SIZE_2M 11 |
| 992 | |
| 993 | /* The hardware supports two different modes for border color. The |
| 994 | * default (OpenGL) mode uses floating-point color channels, while the |
| 995 | * legacy mode uses 4 bytes. |
| 996 | * |
| 997 | * More significantly, the legacy mode respects the components of the |
| 998 | * border color for channels not present in the source, (whereas the |
| 999 | * default mode will ignore the border color's alpha channel and use |
| 1000 | * alpha==1 for an RGB source, for example). |
| 1001 | * |
| 1002 | * The legacy mode matches the semantics specified by the Render |
| 1003 | * extension. |
| 1004 | */ |
| 1005 | struct gen7_sampler_default_border_color { |
| 1006 | float color[4]; |
| 1007 | }; |
| 1008 | |
| 1009 | struct gen7_sampler_legacy_border_color { |
| 1010 | uint8_t color[4]; |
| 1011 | }; |
| 1012 | |
| 1013 | struct gen7_blend_state { |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1014 | struct { |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1015 | uint32_t dest_blend_factor:5; |
| 1016 | uint32_t source_blend_factor:5; |
| 1017 | uint32_t pad3:1; |
| 1018 | uint32_t blend_func:3; |
| 1019 | uint32_t pad2:1; |
| 1020 | uint32_t ia_dest_blend_factor:5; |
| 1021 | uint32_t ia_source_blend_factor:5; |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1022 | uint32_t pad1:1; |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1023 | uint32_t ia_blend_func:3; |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1024 | uint32_t pad0:1; |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1025 | uint32_t ia_blend_enable:1; |
| 1026 | uint32_t blend_enable:1; |
| 1027 | } blend0; |
| 1028 | |
| 1029 | struct { |
| 1030 | uint32_t post_blend_clamp_enable:1; |
| 1031 | uint32_t pre_blend_clamp_enable:1; |
| 1032 | uint32_t clamp_range:2; |
| 1033 | uint32_t pad0:4; |
| 1034 | uint32_t x_dither_offset:2; |
| 1035 | uint32_t y_dither_offset:2; |
| 1036 | uint32_t dither_enable:1; |
| 1037 | uint32_t alpha_test_func:3; |
| 1038 | uint32_t alpha_test_enable:1; |
| 1039 | uint32_t pad1:1; |
| 1040 | uint32_t logic_op_func:4; |
| 1041 | uint32_t logic_op_enable:1; |
| 1042 | uint32_t pad2:1; |
| 1043 | uint32_t write_disable_b:1; |
| 1044 | uint32_t write_disable_g:1; |
| 1045 | uint32_t write_disable_r:1; |
| 1046 | uint32_t write_disable_a:1; |
| 1047 | uint32_t pad3:1; |
| 1048 | uint32_t alpha_to_coverage_dither:1; |
| 1049 | uint32_t alpha_to_one:1; |
| 1050 | uint32_t alpha_to_coverage:1; |
| 1051 | } blend1; |
| 1052 | }; |
| 1053 | |
| 1054 | struct gen7_color_calc_state { |
| 1055 | struct { |
| 1056 | uint32_t alpha_test_format:1; |
| 1057 | uint32_t pad0:14; |
| 1058 | uint32_t round_disable:1; |
| 1059 | uint32_t bf_stencil_ref:8; |
| 1060 | uint32_t stencil_ref:8; |
| 1061 | } cc0; |
| 1062 | |
| 1063 | union { |
| 1064 | float alpha_ref_f; |
| 1065 | struct { |
| 1066 | uint32_t ui:8; |
| 1067 | uint32_t pad0:24; |
| 1068 | } alpha_ref_fi; |
| 1069 | } cc1; |
| 1070 | |
| 1071 | float constant_r; |
| 1072 | float constant_g; |
| 1073 | float constant_b; |
| 1074 | float constant_a; |
| 1075 | }; |
| 1076 | |
| 1077 | struct gen7_depth_stencil_state { |
| 1078 | struct { |
| 1079 | uint32_t pad0:3; |
| 1080 | uint32_t bf_stencil_pass_depth_pass_op:3; |
| 1081 | uint32_t bf_stencil_pass_depth_fail_op:3; |
| 1082 | uint32_t bf_stencil_fail_op:3; |
| 1083 | uint32_t bf_stencil_func:3; |
| 1084 | uint32_t bf_stencil_enable:1; |
| 1085 | uint32_t pad1:2; |
| 1086 | uint32_t stencil_write_enable:1; |
| 1087 | uint32_t stencil_pass_depth_pass_op:3; |
| 1088 | uint32_t stencil_pass_depth_fail_op:3; |
| 1089 | uint32_t stencil_fail_op:3; |
| 1090 | uint32_t stencil_func:3; |
| 1091 | uint32_t stencil_enable:1; |
| 1092 | } ds0; |
| 1093 | |
| 1094 | struct { |
| 1095 | uint32_t bf_stencil_write_mask:8; |
| 1096 | uint32_t bf_stencil_test_mask:8; |
| 1097 | uint32_t stencil_write_mask:8; |
| 1098 | uint32_t stencil_test_mask:8; |
| 1099 | } ds1; |
| 1100 | |
| 1101 | struct { |
| 1102 | uint32_t pad0:26; |
| 1103 | uint32_t depth_write_enable:1; |
| 1104 | uint32_t depth_test_func:3; |
| 1105 | uint32_t pad1:1; |
| 1106 | uint32_t depth_test_enable:1; |
| 1107 | } ds2; |
| 1108 | }; |
| 1109 | |
| 1110 | struct gen7_surface_state { |
| 1111 | struct { |
| 1112 | unsigned int cube_pos_z:1; |
| 1113 | unsigned int cube_neg_z:1; |
| 1114 | unsigned int cube_pos_y:1; |
| 1115 | unsigned int cube_neg_y:1; |
| 1116 | unsigned int cube_pos_x:1; |
| 1117 | unsigned int cube_neg_x:1; |
| 1118 | unsigned int pad2:2; |
| 1119 | unsigned int render_cache_read_write:1; |
| 1120 | unsigned int pad1:1; |
| 1121 | unsigned int surface_array_spacing:1; |
| 1122 | unsigned int vert_line_stride_ofs:1; |
| 1123 | unsigned int vert_line_stride:1; |
| 1124 | unsigned int tile_walk:1; |
| 1125 | unsigned int tiled_surface:1; |
| 1126 | unsigned int horizontal_alignment:1; |
| 1127 | unsigned int vertical_alignment:2; |
| 1128 | unsigned int surface_format:9; /**< BRW_SURFACEFORMAT_x */ |
| 1129 | unsigned int pad0:1; |
| 1130 | unsigned int is_array:1; |
| 1131 | unsigned int surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */ |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1132 | } ss0; |
| 1133 | |
| 1134 | struct { |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1135 | unsigned int base_addr; |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1136 | } ss1; |
| 1137 | |
| 1138 | struct { |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1139 | unsigned int width:14; |
| 1140 | unsigned int pad1:2; |
| 1141 | unsigned int height:14; |
| 1142 | unsigned int pad0:2; |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1143 | } ss2; |
| 1144 | |
| 1145 | struct { |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1146 | unsigned int pitch:18; |
| 1147 | unsigned int pad:3; |
| 1148 | unsigned int depth:11; |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1149 | } ss3; |
| 1150 | |
| 1151 | struct { |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1152 | unsigned int multisample_position_palette_index:3; |
| 1153 | unsigned int num_multisamples:3; |
| 1154 | unsigned int multisampled_surface_storage_format:1; |
| 1155 | unsigned int render_target_view_extent:11; |
| 1156 | unsigned int min_array_elt:11; |
| 1157 | unsigned int rotation:2; |
| 1158 | unsigned int pad0:1; |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1159 | } ss4; |
| 1160 | |
| 1161 | struct { |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1162 | unsigned int mip_count:4; |
| 1163 | unsigned int min_lod:4; |
| 1164 | unsigned int pad1:12; |
| 1165 | unsigned int y_offset:4; |
| 1166 | unsigned int pad0:1; |
| 1167 | unsigned int x_offset:7; |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1168 | } ss5; |
| 1169 | |
| 1170 | struct { |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1171 | unsigned int pad; /* Multisample Control Surface stuff */ |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1172 | } ss6; |
| 1173 | |
| 1174 | struct { |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1175 | unsigned int resource_min_lod:12; |
| 1176 | unsigned int pad0:16; |
| 1177 | unsigned int alpha_clear_color:1; |
| 1178 | unsigned int blue_clear_color:1; |
| 1179 | unsigned int green_clear_color:1; |
| 1180 | unsigned int red_clear_color:1; |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1181 | } ss7; |
| 1182 | }; |
| 1183 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1184 | struct gen7_sampler_state { |
| 1185 | struct { |
| 1186 | unsigned int aniso_algorithm:1; |
| 1187 | unsigned int lod_bias:13; |
| 1188 | unsigned int min_filter:3; |
| 1189 | unsigned int mag_filter:3; |
| 1190 | unsigned int mip_filter:2; |
| 1191 | unsigned int base_level:5; |
| 1192 | unsigned int pad1:1; |
| 1193 | unsigned int lod_preclamp:1; |
| 1194 | unsigned int default_color_mode:1; |
| 1195 | unsigned int pad0:1; |
| 1196 | unsigned int disable:1; |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1197 | } ss0; |
| 1198 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1199 | struct { |
| 1200 | unsigned int cube_control_mode:1; |
| 1201 | unsigned int shadow_function:3; |
| 1202 | unsigned int pad:4; |
| 1203 | unsigned int max_lod:12; |
| 1204 | unsigned int min_lod:12; |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1205 | } ss1; |
| 1206 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1207 | struct { |
| 1208 | unsigned int pad:5; |
| 1209 | unsigned int default_color_pointer:27; |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1210 | } ss2; |
| 1211 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1212 | struct { |
| 1213 | unsigned int r_wrap_mode:3; |
| 1214 | unsigned int t_wrap_mode:3; |
| 1215 | unsigned int s_wrap_mode:3; |
| 1216 | unsigned int pad:1; |
| 1217 | unsigned int non_normalized_coord:1; |
| 1218 | unsigned int trilinear_quality:2; |
| 1219 | unsigned int address_round:6; |
| 1220 | unsigned int max_aniso:3; |
| 1221 | unsigned int chroma_key_mode:1; |
| 1222 | unsigned int chroma_key_index:2; |
| 1223 | unsigned int chroma_key_enable:1; |
| 1224 | unsigned int pad0:6; |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1225 | } ss3; |
| 1226 | }; |
| 1227 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1228 | /* Surface state DW0 */ |
| 1229 | #define GEN7_SURFACE_RC_READ_WRITE (1 << 8) |
| 1230 | #define GEN7_SURFACE_TILED (1 << 14) |
| 1231 | #define GEN7_SURFACE_TILED_Y (1 << 13) |
| 1232 | #define GEN7_SURFACE_FORMAT_SHIFT 18 |
| 1233 | #define GEN7_SURFACE_TYPE_SHIFT 29 |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1234 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1235 | /* Surface state DW2 */ |
| 1236 | #define GEN7_SURFACE_HEIGHT_SHIFT 16 |
| 1237 | #define GEN7_SURFACE_WIDTH_SHIFT 0 |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1238 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1239 | /* Surface state DW3 */ |
| 1240 | #define GEN7_SURFACE_DEPTH_SHIFT 21 |
| 1241 | #define GEN7_SURFACE_PITCH_SHIFT 0 |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1242 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1243 | #define HSW_SWIZZLE_ZERO 0 |
| 1244 | #define HSW_SWIZZLE_ONE 1 |
| 1245 | #define HSW_SWIZZLE_RED 4 |
| 1246 | #define HSW_SWIZZLE_GREEN 5 |
| 1247 | #define HSW_SWIZZLE_BLUE 6 |
| 1248 | #define HSW_SWIZZLE_ALPHA 7 |
| 1249 | #define __HSW_SURFACE_SWIZZLE(r,g,b,a) \ |
| 1250 | ((a) << 16 | (b) << 19 | (g) << 22 | (r) << 25) |
| 1251 | #define HSW_SURFACE_SWIZZLE(r,g,b,a) \ |
| 1252 | __HSW_SURFACE_SWIZZLE(HSW_SWIZZLE_##r, HSW_SWIZZLE_##g, HSW_SWIZZLE_##b, HSW_SWIZZLE_##a) |
| 1253 | |
| 1254 | /* _3DSTATE_VERTEX_BUFFERS on GEN7*/ |
| 1255 | /* DW1 */ |
| 1256 | #define GEN7_VB0_ADDRESS_MODIFYENABLE (1 << 14) |
| 1257 | |
| 1258 | /* _3DPRIMITIVE on GEN7 */ |
| 1259 | /* DW1 */ |
| 1260 | # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8) |
| 1261 | # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8) |
| 1262 | |
| 1263 | #define GEN7_3DSTATE_CLEAR_PARAMS GEN7_3D(3, 0, 0x04) |
| 1264 | #define GEN7_3DSTATE_DEPTH_BUFFER GEN7_3D(3, 0, 0x05) |
| 1265 | # define GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29 |
| 1266 | # define GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18 |
| 1267 | /* DW1 */ |
| 1268 | # define GEN7_3DSTATE_DEPTH_CLEAR_VALID (1 << 15) |
| 1269 | |
| 1270 | #define GEN7_3DSTATE_CONSTANT_HS GEN7_3D(3, 0, 0x19) |
| 1271 | #define GEN7_3DSTATE_CONSTANT_DS GEN7_3D(3, 0, 0x1a) |
| 1272 | |
| 1273 | #define GEN7_3DSTATE_HS GEN7_3D(3, 0, 0x1b) |
| 1274 | #define GEN7_3DSTATE_TE GEN7_3D(3, 0, 0x1c) |
| 1275 | #define GEN7_3DSTATE_DS GEN7_3D(3, 0, 0x1d) |
| 1276 | #define GEN7_3DSTATE_STREAMOUT GEN7_3D(3, 0, 0x1e) |
| 1277 | #define GEN7_3DSTATE_SBE GEN7_3D(3, 0, 0x1f) |
| 1278 | |
| 1279 | /* DW1 */ |
| 1280 | # define GEN7_SBE_SWIZZLE_CONTROL_MODE (1 << 28) |
| 1281 | # define GEN7_SBE_NUM_OUTPUTS_SHIFT 22 |
| 1282 | # define GEN7_SBE_SWIZZLE_ENABLE (1 << 21) |
| 1283 | # define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20) |
| 1284 | # define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11 |
| 1285 | # define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4 |
| 1286 | |
| 1287 | #define GEN7_3DSTATE_PS GEN7_3D(3, 0, 0x20) |
| 1288 | /* DW1: kernel pointer */ |
| 1289 | /* DW2 */ |
| 1290 | # define GEN7_PS_SPF_MODE (1 << 31) |
| 1291 | # define GEN7_PS_VECTOR_MASK_ENABLE (1 << 30) |
| 1292 | # define GEN7_PS_SAMPLER_COUNT_SHIFT 27 |
| 1293 | # define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 |
| 1294 | # define GEN7_PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16) |
| 1295 | # define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16) |
| 1296 | /* DW3: scratch space */ |
| 1297 | /* DW4 */ |
| 1298 | # define IVB_PS_MAX_THREADS_SHIFT 24 |
| 1299 | # define HSW_PS_MAX_THREADS_SHIFT 23 |
| 1300 | # define HSW_PS_SAMPLE_MASK_SHIFT 12 |
| 1301 | # define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11) |
| 1302 | # define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10) |
| 1303 | # define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9) |
| 1304 | # define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE (1 << 7) |
| 1305 | # define GEN7_PS_POSOFFSET_NONE (0 << 3) |
| 1306 | # define GEN7_PS_POSOFFSET_CENTROID (2 << 3) |
| 1307 | # define GEN7_PS_POSOFFSET_SAMPLE (3 << 3) |
| 1308 | # define GEN7_PS_32_DISPATCH_ENABLE (1 << 2) |
| 1309 | # define GEN7_PS_16_DISPATCH_ENABLE (1 << 1) |
| 1310 | # define GEN7_PS_8_DISPATCH_ENABLE (1 << 0) |
| 1311 | /* DW5 */ |
| 1312 | # define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 |
| 1313 | # define GEN7_PS_DISPATCH_START_GRF_SHIFT_1 8 |
| 1314 | # define GEN7_PS_DISPATCH_START_GRF_SHIFT_2 0 |
| 1315 | /* DW6: kernel 1 pointer */ |
| 1316 | /* DW7: kernel 2 pointer */ |
| 1317 | |
| 1318 | #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL GEN7_3D(3, 0, 0x21) |
| 1319 | #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC GEN7_3D(3, 0, 0x23) |
| 1320 | |
| 1321 | #define GEN7_3DSTATE_BLEND_STATE_POINTERS GEN7_3D(3, 0, 0x24) |
| 1322 | #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS GEN7_3D(3, 0, 0x25) |
| 1323 | |
| 1324 | #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS GEN7_3D(3, 0, 0x26) |
| 1325 | #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS GEN7_3D(3, 0, 0x27) |
| 1326 | #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS GEN7_3D(3, 0, 0x28) |
| 1327 | #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS GEN7_3D(3, 0, 0x29) |
| 1328 | #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS GEN7_3D(3, 0, 0x2a) |
| 1329 | |
| 1330 | #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS GEN7_3D(3, 0, 0x2b) |
| 1331 | #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS GEN7_3D(3, 0, 0x2e) |
| 1332 | #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS GEN7_3D(3, 0, 0x2f) |
| 1333 | |
| 1334 | #define GEN7_3DSTATE_URB_VS GEN7_3D(3, 0, 0x30) |
| 1335 | #define GEN7_3DSTATE_URB_HS GEN7_3D(3, 0, 0x31) |
| 1336 | #define GEN7_3DSTATE_URB_DS GEN7_3D(3, 0, 0x32) |
| 1337 | #define GEN7_3DSTATE_URB_GS GEN7_3D(3, 0, 0x33) |
| 1338 | /* DW1 */ |
| 1339 | # define GEN7_URB_ENTRY_NUMBER_SHIFT 0 |
| 1340 | # define GEN7_URB_ENTRY_SIZE_SHIFT 16 |
| 1341 | # define GEN7_URB_STARTING_ADDRESS_SHIFT 25 |
| 1342 | |
| 1343 | #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS GEN7_3D(3, 1, 0x12) |
| 1344 | #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS GEN7_3D(3, 1, 0x16) |
| 1345 | /* DW1 */ |
| 1346 | # define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16 |
| 1347 | |
| 1348 | struct gen7_cc_viewport { |
| 1349 | float min_depth; |
| 1350 | float max_depth; |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1351 | }; |
| 1352 | |
Chris Wilson | 1945e2a | 2012-12-06 17:18:52 +0000 | [diff] [blame] | 1353 | typedef enum { |
| 1354 | SAMPLER_FILTER_NEAREST = 0, |
| 1355 | SAMPLER_FILTER_BILINEAR, |
| 1356 | FILTER_COUNT |
| 1357 | } sampler_filter_t; |
| 1358 | |
| 1359 | typedef enum { |
| 1360 | SAMPLER_EXTEND_NONE = 0, |
| 1361 | SAMPLER_EXTEND_REPEAT, |
| 1362 | SAMPLER_EXTEND_PAD, |
| 1363 | SAMPLER_EXTEND_REFLECT, |
| 1364 | EXTEND_COUNT |
| 1365 | } sampler_extend_t; |
Ben Widawsky | 2234f87 | 2012-06-28 22:42:58 -0700 | [diff] [blame] | 1366 | |
| 1367 | #endif |