Chris Wilson | eb7d60e | 2015-06-17 18:29:49 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright © 2015 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
| 21 | * IN THE SOFTWARE. |
| 22 | * |
| 23 | */ |
| 24 | |
| 25 | /* |
| 26 | * Testcase: Test that only specific ioctl report a wedged GPU. |
| 27 | * |
| 28 | */ |
| 29 | |
| 30 | #include <stdlib.h> |
| 31 | #include <stdio.h> |
| 32 | #include <string.h> |
| 33 | #include <unistd.h> |
| 34 | #include <fcntl.h> |
| 35 | #include <inttypes.h> |
| 36 | #include <errno.h> |
| 37 | #include <sys/ioctl.h> |
| 38 | |
| 39 | #include <drm.h> |
| 40 | |
| 41 | #include "drmtest.h" |
| 42 | #include "ioctl_wrappers.h" |
| 43 | #include "igt_core.h" |
| 44 | #include "igt_aux.h" |
| 45 | #include "igt_gt.h" |
| 46 | |
| 47 | IGT_TEST_DESCRIPTION("Test that specific ioctls report a wedged GPU (EIO)."); |
| 48 | |
| 49 | static bool i915_reset_control(bool enable) |
| 50 | { |
| 51 | const char *path = "/sys/module/i915/parameters/reset"; |
| 52 | int fd, ret; |
| 53 | |
| 54 | igt_debug("%s GPU reset\n", enable ? "Enabling" : "Disabling"); |
| 55 | |
| 56 | fd = open(path, O_RDWR); |
| 57 | igt_require(fd >= 0); |
| 58 | |
| 59 | ret = write(fd, &"NY"[enable], 1) == 1; |
| 60 | close(fd); |
| 61 | |
| 62 | return ret; |
| 63 | } |
| 64 | |
| 65 | static bool i915_wedged_set(void) |
| 66 | { |
| 67 | int fd, ret; |
| 68 | |
| 69 | igt_debug("Triggering GPU reset\n"); |
| 70 | |
| 71 | fd = igt_debugfs_open("i915_wedged", O_RDWR); |
| 72 | igt_require(fd >= 0); |
| 73 | |
| 74 | ret = write(fd, "1\n", 2) == 2; |
| 75 | close(fd); |
| 76 | |
| 77 | return ret; |
| 78 | } |
| 79 | |
| 80 | static void trigger_reset(int fd) |
| 81 | { |
| 82 | igt_assert(i915_wedged_set()); |
| 83 | |
| 84 | /* And just check the gpu is indeed running again */ |
| 85 | igt_debug("Checking that the GPU recovered\n"); |
| 86 | gem_quiescent_gpu(fd); |
| 87 | } |
| 88 | |
| 89 | static void wedge_gpu(int fd) |
| 90 | { |
| 91 | /* First idle the GPU then disable GPU resets before injecting a hang */ |
| 92 | gem_quiescent_gpu(fd); |
| 93 | |
| 94 | igt_require(i915_reset_control(false)); |
| 95 | |
| 96 | igt_debug("Wedging GPU by injecting hang\n"); |
| 97 | igt_post_hang_ring(fd, igt_hang_ring(fd, I915_EXEC_DEFAULT)); |
| 98 | |
| 99 | igt_assert(i915_reset_control(true)); |
| 100 | } |
| 101 | |
| 102 | static int __gem_throttle(int fd) |
| 103 | { |
| 104 | int err = 0; |
| 105 | if (drmIoctl(fd, DRM_IOCTL_I915_GEM_THROTTLE, NULL)) |
| 106 | err = -errno; |
| 107 | return err; |
| 108 | } |
| 109 | |
| 110 | static void test_throttle(int fd) |
| 111 | { |
| 112 | wedge_gpu(fd); |
| 113 | |
| 114 | igt_assert_eq(__gem_throttle(fd), -EIO); |
| 115 | |
| 116 | trigger_reset(fd); |
| 117 | } |
| 118 | |
| 119 | static int __gem_execbuf(int fd, struct drm_i915_gem_execbuffer2 *eb) |
| 120 | { |
| 121 | int err = 0; |
| 122 | if (drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, eb)) |
| 123 | err = -errno; |
| 124 | return err; |
| 125 | } |
| 126 | |
| 127 | static void test_execbuf(int fd) |
| 128 | { |
| 129 | struct drm_i915_gem_execbuffer2 execbuf; |
| 130 | struct drm_i915_gem_exec_object2 exec; |
| 131 | uint32_t tmp[] = { MI_BATCH_BUFFER_END }; |
| 132 | |
| 133 | memset(&exec, 0, sizeof(exec)); |
| 134 | memset(&execbuf, 0, sizeof(execbuf)); |
| 135 | |
| 136 | exec.handle = gem_create(fd, 4096); |
| 137 | gem_write(fd, exec.handle, 0, tmp, sizeof(tmp)); |
| 138 | |
| 139 | execbuf.buffers_ptr = (uintptr_t)&exec; |
| 140 | execbuf.buffer_count = 1; |
| 141 | |
| 142 | wedge_gpu(fd); |
| 143 | |
| 144 | igt_assert_eq(__gem_execbuf(fd, &execbuf), -EIO); |
| 145 | gem_close(fd, exec.handle); |
| 146 | |
| 147 | trigger_reset(fd); |
| 148 | } |
| 149 | |
| 150 | igt_main |
| 151 | { |
| 152 | int fd; |
| 153 | |
| 154 | igt_skip_on_simulation(); |
| 155 | |
| 156 | igt_fixture { |
| 157 | fd = drm_open_any(); |
| 158 | igt_require_hang_ring(fd, -1); |
| 159 | } |
| 160 | |
| 161 | igt_subtest("throttle") |
| 162 | test_throttle(fd); |
| 163 | |
| 164 | igt_subtest("execbuf") |
| 165 | test_execbuf(fd); |
| 166 | |
| 167 | igt_fixture |
| 168 | close(fd); |
| 169 | } |