blob: afb410dc886bcbad26c8b98751aca7b4f02de066 [file] [log] [blame]
Chris Wilsonb68a6422015-11-22 20:50:31 +00001/*
2 * Copyright © 2011-2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Chris Wilson <chris@chris-wilson.co.uk>
25 *
26 */
27
28#include <unistd.h>
29#include <stdlib.h>
30#include <stdint.h>
31#include <stdio.h>
32#include <string.h>
33#include <fcntl.h>
34#include <inttypes.h>
35#include <errno.h>
36#include <sys/stat.h>
37#include <sys/ioctl.h>
38#include <sys/time.h>
39#include <time.h>
40
41#include "drm.h"
42#include "ioctl_wrappers.h"
43#include "drmtest.h"
44#include "igt_aux.h"
45
46static double elapsed(const struct timespec *start,
47 const struct timespec *end)
48{
49 return (end->tv_sec - start->tv_sec) + 1e-9*(end->tv_nsec - start->tv_nsec);
50}
51
52int main(int argc, char **argv)
53{
54 int fd = drm_open_driver(DRIVER_INTEL);
55 uint32_t cpu_write = 0;
56 uint32_t gtt_write = 0;
57 int reps = 13;
58 int size = 1024*1024;
59 uint32_t handle;
60 int c, n;
61
62 while ((c = getopt (argc, argv, "c:g:r:s:")) != -1) {
63 switch (c) {
64 case 'c':
65 cpu_write = *optarg == 'w' ? I915_GEM_DOMAIN_CPU : 0;
66 break;
67 case 'g':
68 gtt_write = *optarg == 'w' ? I915_GEM_DOMAIN_GTT : 0;
69 break;
70
71 case 'r':
72 reps = atoi(optarg);
73 if (reps < 1)
74 reps = 1;
75 break;
76
77 case 's':
78 size = atoi(optarg);
79 if (size < 4096)
80 size = 4096;
81 break;
82
83 default:
84 break;
85 }
86 }
87
88 fprintf(stderr, "size=%d, cpu=%d, gtt=%d\n", size, cpu_write, gtt_write);
89
90 handle = gem_create(fd, size);
91 gem_set_caching(fd, handle, I915_CACHING_NONE);
92
93 for (n = 0; n < reps; n++) {
94 struct timespec start, end;
95 uint64_t count = 0;
96
97 gem_set_domain(fd, handle,
98 I915_GEM_DOMAIN_CPU,
99 cpu_write);
100
101 clock_gettime(CLOCK_MONOTONIC, &start);
102 do {
103 for (c = 0; c < 1000; c++) {
104 gem_set_domain(fd, handle,
105 I915_GEM_DOMAIN_GTT,
106 gtt_write);
107 gem_set_domain(fd, handle,
108 I915_GEM_DOMAIN_CPU,
109 cpu_write);
110 }
111 count += c;
112 clock_gettime(CLOCK_MONOTONIC, &end);
113 } while (end.tv_sec - start.tv_sec < 2);
114
115 printf("%f\n", count / elapsed(&start, &end));
116 }
117
118 return 0;
119}