Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2008 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 21 | * DEALINGS IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Eric Anholt <eric@anholt.net> |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 25 | * Ben Widawsky <ben@bwidawsk.net> |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 26 | * |
| 27 | */ |
| 28 | |
| 29 | #include <unistd.h> |
Alan Coopersmith | 4e3c85f | 2012-01-06 14:37:20 -0800 | [diff] [blame] | 30 | #include <fcntl.h> |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 31 | #include <stdio.h> |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 32 | #include <stdarg.h> |
| 33 | #include <stdlib.h> |
| 34 | #include <stdint.h> |
| 35 | #include <stdbool.h> |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 36 | #include <string.h> |
| 37 | #include <errno.h> |
| 38 | #include <err.h> |
| 39 | #include <assert.h> |
| 40 | #include <sys/ioctl.h> |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 41 | #include <sys/stat.h> |
| 42 | #include <sys/mman.h> |
| 43 | |
Daniel Vetter | c03c6ce | 2014-03-22 21:34:29 +0100 | [diff] [blame] | 44 | #include "intel_io.h" |
Daniel Vetter | 71ac5de | 2014-08-26 15:13:06 +0200 | [diff] [blame] | 45 | #include "igt_core.h" |
Daniel Vetter | 3cd45de | 2015-02-10 17:46:43 +0100 | [diff] [blame] | 46 | #include "igt_gt.h" |
Daniel Vetter | 6cfcd71 | 2014-03-22 20:07:35 +0100 | [diff] [blame] | 47 | #include "intel_chipset.h" |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 48 | |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 49 | /** |
| 50 | * SECTION:intel_io |
Damien Lespiau | 4dca31b | 2015-06-27 11:16:52 +0100 | [diff] [blame] | 51 | * @short_description: Register access and sideband I/O library |
Damien Lespiau | 6ebd8c2 | 2015-06-26 14:28:41 +0100 | [diff] [blame] | 52 | * @title: I/O |
Thomas Wood | f0381d1 | 2015-09-07 09:26:01 +0100 | [diff] [blame] | 53 | * @include: igt.h |
Thomas Wood | 5d80872 | 2015-06-29 11:03:39 +0100 | [diff] [blame] | 54 | * @section_id: intel-gpu-tools-IO |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 55 | * |
| 56 | * This library provides register I/O helpers in both a basic version and a more |
Thomas Wood | 519f377 | 2014-09-26 14:24:52 +0100 | [diff] [blame] | 57 | * fancy version which also handles forcewake and can optionally check registers |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 58 | * against a white-list. All register function are compatible. Hence the same |
| 59 | * code can be used to decode registers with either of them, or also from a dump |
| 60 | * file using intel_mmio_use_dump_file(). |
| 61 | * |
Thomas Wood | 519f377 | 2014-09-26 14:24:52 +0100 | [diff] [blame] | 62 | * Furthermore this library also provides helper functions for accessing the |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 63 | * various sideband interfaces found on Valleyview/Baytrail based platforms. |
| 64 | */ |
| 65 | |
Ben Widawsky | 8904d29 | 2013-02-21 22:05:33 -0800 | [diff] [blame] | 66 | #define FAKEKEY 0x2468ace0 |
| 67 | |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 68 | /** |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 69 | * igt_global_mmio: |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 70 | * |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 71 | * Pointer to the register range, initialized using intel_register_access_init() |
| 72 | * or intel_mmio_use_dump_file(). It is not recommended to use this directly. |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 73 | */ |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 74 | void *igt_global_mmio; |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 75 | |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 76 | static struct _mmio_data { |
| 77 | int inited; |
| 78 | bool safe; |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 79 | uint32_t i915_devid; |
Ben Widawsky | abd7038 | 2011-07-28 13:42:45 -0700 | [diff] [blame] | 80 | struct intel_register_map map; |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 81 | int key; |
| 82 | } mmio_data; |
| 83 | |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 84 | /** |
| 85 | * intel_mmio_use_dump_file: |
| 86 | * @file: name of the register dump file to open |
| 87 | * |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 88 | * Sets up #igt_global_mmio to point at the data contained in @file. This allows |
| 89 | * the same code to get reused for dumping and decoding from running hardware as |
| 90 | * from register dumps. |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 91 | */ |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 92 | void |
Daniel Vetter | 2d4656f | 2014-03-22 22:23:04 +0100 | [diff] [blame] | 93 | intel_mmio_use_dump_file(char *file) |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 94 | { |
| 95 | int fd; |
| 96 | struct stat st; |
| 97 | |
| 98 | fd = open(file, O_RDWR); |
Daniel Vetter | 71ac5de | 2014-08-26 15:13:06 +0200 | [diff] [blame] | 99 | igt_fail_on_f(fd == -1, |
| 100 | "Couldn't open %s\n", file); |
| 101 | |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 102 | fstat(fd, &st); |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 103 | igt_global_mmio = mmap(NULL, st.st_size, PROT_READ|PROT_WRITE, MAP_PRIVATE, fd, 0); |
| 104 | igt_fail_on_f(igt_global_mmio == MAP_FAILED, |
Daniel Vetter | 71ac5de | 2014-08-26 15:13:06 +0200 | [diff] [blame] | 105 | "Couldn't mmap %s\n", file); |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 106 | close(fd); |
| 107 | } |
| 108 | |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 109 | /** |
| 110 | * intel_mmio_use_pci_bar: |
| 111 | * @pci_dev: intel gracphis pci device |
| 112 | * |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 113 | * Sets up #igt_global_mmio to point at the mmio bar. |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 114 | * |
| 115 | * @pci_dev can be obtained from intel_get_pci_device(). |
| 116 | */ |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 117 | void |
Daniel Vetter | 2d4656f | 2014-03-22 22:23:04 +0100 | [diff] [blame] | 118 | intel_mmio_use_pci_bar(struct pci_device *pci_dev) |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 119 | { |
Chris Wilson | 7a02aa4 | 2012-08-26 21:22:15 +0100 | [diff] [blame] | 120 | uint32_t devid, gen; |
| 121 | int mmio_bar, mmio_size; |
Daniel Vetter | 1be3fd7 | 2012-01-09 23:42:19 +0100 | [diff] [blame] | 122 | int error; |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 123 | |
| 124 | devid = pci_dev->device_id; |
Chris Wilson | 41570d9 | 2011-02-14 15:56:14 +0000 | [diff] [blame] | 125 | if (IS_GEN2(devid)) |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 126 | mmio_bar = 1; |
Chris Wilson | 41570d9 | 2011-02-14 15:56:14 +0000 | [diff] [blame] | 127 | else |
| 128 | mmio_bar = 0; |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 129 | |
Chris Wilson | 7a02aa4 | 2012-08-26 21:22:15 +0100 | [diff] [blame] | 130 | gen = intel_gen(devid); |
| 131 | if (gen < 3) |
Daniel Vetter | 50d4675 | 2012-10-12 10:45:52 +0200 | [diff] [blame] | 132 | mmio_size = 512*1024; |
Chris Wilson | 7a02aa4 | 2012-08-26 21:22:15 +0100 | [diff] [blame] | 133 | else if (gen < 5) |
| 134 | mmio_size = 512*1024; |
| 135 | else |
| 136 | mmio_size = 2*1024*1024; |
| 137 | |
Daniel Vetter | 1be3fd7 | 2012-01-09 23:42:19 +0100 | [diff] [blame] | 138 | error = pci_device_map_range (pci_dev, |
Chris Wilson | 7a02aa4 | 2012-08-26 21:22:15 +0100 | [diff] [blame] | 139 | pci_dev->regions[mmio_bar].base_addr, |
| 140 | mmio_size, |
| 141 | PCI_DEV_MAP_FLAG_WRITABLE, |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 142 | &igt_global_mmio); |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 143 | |
Daniel Vetter | 71ac5de | 2014-08-26 15:13:06 +0200 | [diff] [blame] | 144 | igt_fail_on_f(error != 0, |
| 145 | "Couldn't map MMIO region\n"); |
Chris Wilson | 9537422 | 2010-04-08 11:56:57 +0100 | [diff] [blame] | 146 | } |
| 147 | |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 148 | static void |
| 149 | release_forcewake_lock(int fd) |
| 150 | { |
| 151 | close(fd); |
| 152 | } |
| 153 | |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 154 | /** |
| 155 | * intel_register_access_init: |
Thomas Wood | d01ebbd | 2015-06-29 16:47:14 +0100 | [diff] [blame] | 156 | * @pci_dev: intel graphics pci device |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 157 | * @safe: use safe register access tables |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 158 | * |
| 159 | * This initializes the new register access library, which supports forcewake |
| 160 | * handling and also allows register access to be checked with an explicit |
| 161 | * whitelist. |
| 162 | * |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 163 | * It also initializes #igt_global_mmio like intel_mmio_use_pci_bar(). |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 164 | * |
| 165 | * @pci_dev can be obtained from intel_get_pci_device(). |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 166 | */ |
| 167 | int |
Chris Wilson | 83884e9 | 2017-03-21 17:16:03 +0000 | [diff] [blame] | 168 | intel_register_access_init(struct pci_device *pci_dev, int safe, int fd) |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 169 | { |
| 170 | int ret; |
| 171 | |
| 172 | /* after old API is deprecated, remove this */ |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 173 | if (igt_global_mmio == NULL) |
Daniel Vetter | 2d4656f | 2014-03-22 22:23:04 +0100 | [diff] [blame] | 174 | intel_mmio_use_pci_bar(pci_dev); |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 175 | |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 176 | igt_assert(igt_global_mmio != NULL); |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 177 | |
| 178 | if (mmio_data.inited) |
| 179 | return -1; |
| 180 | |
Ben Widawsky | a855489 | 2013-07-27 15:30:41 -0700 | [diff] [blame] | 181 | mmio_data.safe = (safe != 0 && |
| 182 | intel_gen(pci_dev->device_id) >= 4) ? true : false; |
Ben Widawsky | 4c20525 | 2012-01-25 21:04:16 -0800 | [diff] [blame] | 183 | mmio_data.i915_devid = pci_dev->device_id; |
Ben Widawsky | 57bc763 | 2013-05-23 11:09:55 -0700 | [diff] [blame] | 184 | if (mmio_data.safe) |
Ben Widawsky | 4c20525 | 2012-01-25 21:04:16 -0800 | [diff] [blame] | 185 | mmio_data.map = intel_get_register_map(mmio_data.i915_devid); |
| 186 | |
Ben Widawsky | 57bc763 | 2013-05-23 11:09:55 -0700 | [diff] [blame] | 187 | /* Find where the forcewake lock is. Forcewake doesn't exist |
| 188 | * gen < 6, but the debugfs should do the right things for us. |
| 189 | */ |
Chris Wilson | 83884e9 | 2017-03-21 17:16:03 +0000 | [diff] [blame] | 190 | ret = igt_open_forcewake_handle(fd); |
Daniel Vetter | ea18fc1 | 2014-03-14 16:00:22 +0100 | [diff] [blame] | 191 | if (ret == -1) |
Ben Widawsky | 8904d29 | 2013-02-21 22:05:33 -0800 | [diff] [blame] | 192 | mmio_data.key = FAKEKEY; |
Daniel Vetter | ea18fc1 | 2014-03-14 16:00:22 +0100 | [diff] [blame] | 193 | else |
| 194 | mmio_data.key = ret; |
Ben Widawsky | 4c20525 | 2012-01-25 21:04:16 -0800 | [diff] [blame] | 195 | |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 196 | mmio_data.inited++; |
| 197 | return 0; |
| 198 | } |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 199 | |
Ben Widawsky | c7b6ec5 | 2013-04-24 19:05:18 -0700 | [diff] [blame] | 200 | static int |
| 201 | intel_register_access_needs_wake(void) |
| 202 | { |
| 203 | return mmio_data.key != FAKEKEY; |
| 204 | } |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 205 | |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 206 | /** |
| 207 | * intel_register_access_needs_fakewake: |
| 208 | * |
| 209 | * Returns: |
| 210 | * Non-zero when forcewake initialization failed. |
| 211 | */ |
Ben Widawsky | 8be812b | 2013-04-26 14:26:48 -0700 | [diff] [blame] | 212 | int intel_register_access_needs_fakewake(void) |
| 213 | { |
| 214 | return mmio_data.key == FAKEKEY; |
| 215 | } |
| 216 | |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 217 | /** |
| 218 | * intel_register_access_fini: |
| 219 | * |
| 220 | * Clean up the register access helper initialized with |
| 221 | * intel_register_access_init(). |
| 222 | */ |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 223 | void |
| 224 | intel_register_access_fini(void) |
| 225 | { |
Ben Widawsky | c7b6ec5 | 2013-04-24 19:05:18 -0700 | [diff] [blame] | 226 | if (mmio_data.key && intel_register_access_needs_wake()) |
Ben Widawsky | 4c20525 | 2012-01-25 21:04:16 -0800 | [diff] [blame] | 227 | release_forcewake_lock(mmio_data.key); |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 228 | mmio_data.inited--; |
| 229 | } |
| 230 | |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 231 | /** |
| 232 | * intel_register_read: |
| 233 | * @reg: register offset |
| 234 | * |
| 235 | * 32-bit read of the register at @offset. This function only works when the new |
| 236 | * register access helper is initialized with intel_register_access_init(). |
| 237 | * |
| 238 | * Compared to INREG() it can do optional checking with the register access |
| 239 | * white lists. |
| 240 | * |
| 241 | * Returns: |
| 242 | * The value read from the register. |
| 243 | */ |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 244 | uint32_t |
| 245 | intel_register_read(uint32_t reg) |
| 246 | { |
| 247 | struct intel_register_range *range; |
| 248 | uint32_t ret; |
| 249 | |
Daniel Vetter | 71ac5de | 2014-08-26 15:13:06 +0200 | [diff] [blame] | 250 | igt_assert(mmio_data.inited); |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 251 | |
Daniel Vetter | 137f4d4 | 2012-01-24 09:37:51 +0100 | [diff] [blame] | 252 | if (intel_gen(mmio_data.i915_devid) >= 6) |
Daniel Vetter | 71ac5de | 2014-08-26 15:13:06 +0200 | [diff] [blame] | 253 | igt_assert(mmio_data.key != -1); |
Ben Widawsky | abd7038 | 2011-07-28 13:42:45 -0700 | [diff] [blame] | 254 | |
| 255 | if (!mmio_data.safe) |
| 256 | goto read_out; |
| 257 | |
| 258 | range = intel_get_register_range(mmio_data.map, |
| 259 | reg, |
| 260 | INTEL_RANGE_READ); |
| 261 | |
| 262 | if(!range) { |
Daniel Vetter | 71ac5de | 2014-08-26 15:13:06 +0200 | [diff] [blame] | 263 | igt_warn("Register read blocked for safety ""(*0x%08x)\n", reg); |
Ben Widawsky | abd7038 | 2011-07-28 13:42:45 -0700 | [diff] [blame] | 264 | ret = 0xffffffff; |
| 265 | goto out; |
| 266 | } |
| 267 | |
| 268 | read_out: |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 269 | ret = *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg); |
Ben Widawsky | abd7038 | 2011-07-28 13:42:45 -0700 | [diff] [blame] | 270 | out: |
| 271 | return ret; |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 272 | } |
| 273 | |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 274 | /** |
| 275 | * intel_register_write: |
| 276 | * @reg: register offset |
| 277 | * @val: value to write |
| 278 | * |
| 279 | * 32-bit write to the register at @offset. This function only works when the new |
| 280 | * register access helper is initialized with intel_register_access_init(). |
| 281 | * |
Daniel Vetter | aa720ff | 2015-05-06 11:38:06 +0200 | [diff] [blame] | 282 | * Compared to OUTREG() it can do optional checking with the register access |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 283 | * white lists. |
| 284 | */ |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 285 | void |
| 286 | intel_register_write(uint32_t reg, uint32_t val) |
| 287 | { |
| 288 | struct intel_register_range *range; |
| 289 | |
Daniel Vetter | 71ac5de | 2014-08-26 15:13:06 +0200 | [diff] [blame] | 290 | igt_assert(mmio_data.inited); |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 291 | |
Daniel Vetter | 137f4d4 | 2012-01-24 09:37:51 +0100 | [diff] [blame] | 292 | if (intel_gen(mmio_data.i915_devid) >= 6) |
Daniel Vetter | 71ac5de | 2014-08-26 15:13:06 +0200 | [diff] [blame] | 293 | igt_assert(mmio_data.key != -1); |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 294 | |
Ben Widawsky | abd7038 | 2011-07-28 13:42:45 -0700 | [diff] [blame] | 295 | if (!mmio_data.safe) |
| 296 | goto write_out; |
| 297 | |
| 298 | range = intel_get_register_range(mmio_data.map, |
| 299 | reg, |
| 300 | INTEL_RANGE_WRITE); |
| 301 | |
Daniel Vetter | 71ac5de | 2014-08-26 15:13:06 +0200 | [diff] [blame] | 302 | igt_warn_on_f(!range, |
| 303 | "Register write blocked for safety ""(*0x%08x = 0x%x)\n", reg, val); |
Ben Widawsky | abd7038 | 2011-07-28 13:42:45 -0700 | [diff] [blame] | 304 | |
| 305 | write_out: |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 306 | *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg) = val; |
Ben Widawsky | cac8f8b | 2011-07-28 13:40:19 -0700 | [diff] [blame] | 307 | } |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 308 | |
| 309 | |
| 310 | /** |
| 311 | * INREG: |
| 312 | * @reg: register offset |
| 313 | * |
Jani Nikula | 23b7f08 | 2015-04-28 11:52:42 +0300 | [diff] [blame] | 314 | * 32-bit read of the register at offset @reg. This function only works when the |
| 315 | * new register access helper is initialized with intel_register_access_init(). |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 316 | * |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 317 | * This function directly accesses the #igt_global_mmio without safety checks. |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 318 | * |
| 319 | * Returns: |
| 320 | * The value read from the register. |
| 321 | */ |
| 322 | uint32_t INREG(uint32_t reg) |
| 323 | { |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 324 | return *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg); |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 325 | } |
| 326 | |
| 327 | /** |
Jani Nikula | 23b7f08 | 2015-04-28 11:52:42 +0300 | [diff] [blame] | 328 | * INREG16: |
| 329 | * @reg: register offset |
| 330 | * |
| 331 | * 16-bit read of the register at offset @reg. This function only works when the |
| 332 | * new register access helper is initialized with intel_register_access_init(). |
| 333 | * |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 334 | * This function directly accesses the #igt_global_mmio without safety checks. |
Jani Nikula | 23b7f08 | 2015-04-28 11:52:42 +0300 | [diff] [blame] | 335 | * |
| 336 | * Returns: |
| 337 | * The value read from the register. |
| 338 | */ |
| 339 | uint16_t INREG16(uint32_t reg) |
| 340 | { |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 341 | return *(volatile uint16_t *)((volatile char *)igt_global_mmio + reg); |
Jani Nikula | 23b7f08 | 2015-04-28 11:52:42 +0300 | [diff] [blame] | 342 | } |
| 343 | |
| 344 | /** |
| 345 | * INREG8: |
| 346 | * @reg: register offset |
| 347 | * |
| 348 | * 8-bit read of the register at offset @reg. This function only works when the |
| 349 | * new register access helper is initialized with intel_register_access_init(). |
| 350 | * |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 351 | * This function directly accesses the #igt_global_mmio without safety checks. |
Jani Nikula | 23b7f08 | 2015-04-28 11:52:42 +0300 | [diff] [blame] | 352 | * |
| 353 | * Returns: |
| 354 | * The value read from the register. |
| 355 | */ |
| 356 | uint8_t INREG8(uint32_t reg) |
| 357 | { |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 358 | return *((volatile uint8_t *)igt_global_mmio + reg); |
Jani Nikula | 23b7f08 | 2015-04-28 11:52:42 +0300 | [diff] [blame] | 359 | } |
| 360 | |
| 361 | /** |
| 362 | * OUTREG: |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 363 | * @reg: register offset |
| 364 | * @val: value to write |
| 365 | * |
Jani Nikula | 23b7f08 | 2015-04-28 11:52:42 +0300 | [diff] [blame] | 366 | * 32-bit write of @val to the register at offset @reg. This function only works |
| 367 | * when the new register access helper is initialized with |
| 368 | * intel_register_access_init(). |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 369 | * |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 370 | * This function directly accesses the #igt_global_mmio without safety checks. |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 371 | */ |
| 372 | void OUTREG(uint32_t reg, uint32_t val) |
| 373 | { |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 374 | *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg) = val; |
Daniel Vetter | 95e89f0 | 2014-03-22 22:41:28 +0100 | [diff] [blame] | 375 | } |
Jani Nikula | 23b7f08 | 2015-04-28 11:52:42 +0300 | [diff] [blame] | 376 | |
| 377 | /** |
| 378 | * OUTREG16: |
| 379 | * @reg: register offset |
| 380 | * @val: value to write |
| 381 | * |
| 382 | * 16-bit write of @val to the register at offset @reg. This function only works |
| 383 | * when the new register access helper is initialized with |
| 384 | * intel_register_access_init(). |
| 385 | * |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 386 | * This function directly accesses the #igt_global_mmio without safety checks. |
Jani Nikula | 23b7f08 | 2015-04-28 11:52:42 +0300 | [diff] [blame] | 387 | */ |
| 388 | void OUTREG16(uint32_t reg, uint16_t val) |
| 389 | { |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 390 | *(volatile uint16_t *)((volatile char *)igt_global_mmio + reg) = val; |
Jani Nikula | 23b7f08 | 2015-04-28 11:52:42 +0300 | [diff] [blame] | 391 | } |
| 392 | |
| 393 | /** |
| 394 | * OUTREG8: |
| 395 | * @reg: register offset |
| 396 | * @val: value to write |
| 397 | * |
| 398 | * 8-bit write of @val to the register at offset @reg. This function only works |
| 399 | * when the new register access helper is initialized with |
| 400 | * intel_register_access_init(). |
| 401 | * |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 402 | * This function directly accesses the #igt_global_mmio without safety checks. |
Jani Nikula | 23b7f08 | 2015-04-28 11:52:42 +0300 | [diff] [blame] | 403 | */ |
| 404 | void OUTREG8(uint32_t reg, uint8_t val) |
| 405 | { |
Jani Nikula | a734ac2 | 2015-04-28 13:31:30 +0300 | [diff] [blame] | 406 | *((volatile uint8_t *)igt_global_mmio + reg) = val; |
Jani Nikula | 23b7f08 | 2015-04-28 11:52:42 +0300 | [diff] [blame] | 407 | } |